* Re: [PATCH v2 3/5] cxl/pci: Find and register CXL PMU devices
[not found] <20230324171313.18448-4-Jonathan.Cameron@huawei.com>
@ 2023-03-24 21:01 ` kernel test robot
2023-03-27 15:50 ` Jonathan Cameron
0 siblings, 1 reply; 2+ messages in thread
From: kernel test robot @ 2023-03-24 21:01 UTC (permalink / raw)
To: Jonathan Cameron, Liang Kan, linux-cxl, peterz
Cc: llvm, oe-kbuild-all, mingo, acme, mark.rutland, will,
dan.j.williams, linuxarm, linux-perf-users, linux-kernel,
Davidlohr Bueso, Dave Jiang
Hi Jonathan,
I love your patch! Yet something to improve:
[auto build test ERROR on acme/perf/core]
[also build test ERROR on tip/perf/core]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Jonathan-Cameron/cxl-Add-function-to-count-regblocks-of-a-given-type/20230325-011827
base: https://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git perf/core
patch link: https://lore.kernel.org/r/20230324171313.18448-4-Jonathan.Cameron%40huawei.com
patch subject: [PATCH v2 3/5] cxl/pci: Find and register CXL PMU devices
config: arm-randconfig-r023-20230322 (https://download.01.org/0day-ci/archive/20230325/202303250419.FANh4fIC-lkp@intel.com/config)
compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project 67409911353323ca5edf2049ef0df54132fa1ca7)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# https://github.com/intel-lab-lkp/linux/commit/ab99ab31e5c4aa9f68425f3505f22a790d64bfe9
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Jonathan-Cameron/cxl-Add-function-to-count-regblocks-of-a-given-type/20230325-011827
git checkout ab99ab31e5c4aa9f68425f3505f22a790d64bfe9
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/cxl/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202303250419.FANh4fIC-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/cxl/core/port.c:60:20: error: use of undeclared identifier 'cxl_cpmu_type'; did you mean 'cxl_bus_type'?
if (dev->type == &cxl_cpmu_type)
^~~~~~~~~~~~~
cxl_bus_type
drivers/cxl/cxl.h:732:24: note: 'cxl_bus_type' declared here
extern struct bus_type cxl_bus_type;
^
1 error generated.
vim +60 drivers/cxl/core/port.c
40
41 static int cxl_device_id(const struct device *dev)
42 {
43 if (dev->type == &cxl_nvdimm_bridge_type)
44 return CXL_DEVICE_NVDIMM_BRIDGE;
45 if (dev->type == &cxl_nvdimm_type)
46 return CXL_DEVICE_NVDIMM;
47 if (dev->type == CXL_PMEM_REGION_TYPE())
48 return CXL_DEVICE_PMEM_REGION;
49 if (dev->type == CXL_DAX_REGION_TYPE())
50 return CXL_DEVICE_DAX_REGION;
51 if (is_cxl_port(dev)) {
52 if (is_cxl_root(to_cxl_port(dev)))
53 return CXL_DEVICE_ROOT;
54 return CXL_DEVICE_PORT;
55 }
56 if (is_cxl_memdev(dev))
57 return CXL_DEVICE_MEMORY_EXPANDER;
58 if (dev->type == CXL_REGION_TYPE())
59 return CXL_DEVICE_REGION;
> 60 if (dev->type == &cxl_cpmu_type)
61 return CXL_DEVICE_CPMU;
62 return 0;
63 }
64
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH v2 3/5] cxl/pci: Find and register CXL PMU devices
2023-03-24 21:01 ` [PATCH v2 3/5] cxl/pci: Find and register CXL PMU devices kernel test robot
@ 2023-03-27 15:50 ` Jonathan Cameron
0 siblings, 0 replies; 2+ messages in thread
From: Jonathan Cameron @ 2023-03-27 15:50 UTC (permalink / raw)
To: kernel test robot
Cc: Liang Kan, linux-cxl, peterz, llvm, oe-kbuild-all, mingo, acme,
mark.rutland, will, dan.j.williams, linuxarm, linux-perf-users,
linux-kernel, Davidlohr Bueso, Dave Jiang
On Sat, 25 Mar 2023 05:01:09 +0800
kernel test robot <lkp@intel.com> wrote:
> Hi Jonathan,
>
> I love your patch! Yet something to improve:
>
> [auto build test ERROR on acme/perf/core]
> [also build test ERROR on tip/perf/core]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch#_base_tree_information]
>
> url: https://github.com/intel-lab-lkp/linux/commits/Jonathan-Cameron/cxl-Add-function-to-count-regblocks-of-a-given-type/20230325-011827
> base: https://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git perf/core
> patch link: https://lore.kernel.org/r/20230324171313.18448-4-Jonathan.Cameron%40huawei.com
> patch subject: [PATCH v2 3/5] cxl/pci: Find and register CXL PMU devices
> config: arm-randconfig-r023-20230322 (https://download.01.org/0day-ci/archive/20230325/202303250419.FANh4fIC-lkp@intel.com/config)
> compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project 67409911353323ca5edf2049ef0df54132fa1ca7)
> reproduce (this is a W=1 build):
> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # install arm cross compiling tool for clang build
> # apt-get install binutils-arm-linux-gnueabi
> # https://github.com/intel-lab-lkp/linux/commit/ab99ab31e5c4aa9f68425f3505f22a790d64bfe9
> git remote add linux-review https://github.com/intel-lab-lkp/linux
> git fetch --no-tags linux-review Jonathan-Cameron/cxl-Add-function-to-count-regblocks-of-a-given-type/20230325-011827
> git checkout ab99ab31e5c4aa9f68425f3505f22a790d64bfe9
> # save the config file
> mkdir build_dir && cp config build_dir/.config
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm olddefconfig
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/cxl/
>
> If you fix the issue, kindly add following tag where applicable
> | Reported-by: kernel test robot <lkp@intel.com>
> | Link: https://lore.kernel.org/oe-kbuild-all/202303250419.FANh4fIC-lkp@intel.com/
>
> All errors (new ones prefixed by >>):
>
> >> drivers/cxl/core/port.c:60:20: error: use of undeclared identifier 'cxl_cpmu_type'; did you mean 'cxl_bus_type'?
> if (dev->type == &cxl_cpmu_type)
> ^~~~~~~~~~~~~
Definition is under the CXL_REGION ifdef and it shouldn't be.
Moved it up to alongside the nvdimm ones.
> cxl_bus_type
> drivers/cxl/cxl.h:732:24: note: 'cxl_bus_type' declared here
> extern struct bus_type cxl_bus_type;
> ^
> 1 error generated.
>
>
> vim +60 drivers/cxl/core/port.c
>
> 40
> 41 static int cxl_device_id(const struct device *dev)
> 42 {
> 43 if (dev->type == &cxl_nvdimm_bridge_type)
> 44 return CXL_DEVICE_NVDIMM_BRIDGE;
> 45 if (dev->type == &cxl_nvdimm_type)
> 46 return CXL_DEVICE_NVDIMM;
> 47 if (dev->type == CXL_PMEM_REGION_TYPE())
> 48 return CXL_DEVICE_PMEM_REGION;
> 49 if (dev->type == CXL_DAX_REGION_TYPE())
> 50 return CXL_DEVICE_DAX_REGION;
> 51 if (is_cxl_port(dev)) {
> 52 if (is_cxl_root(to_cxl_port(dev)))
> 53 return CXL_DEVICE_ROOT;
> 54 return CXL_DEVICE_PORT;
> 55 }
> 56 if (is_cxl_memdev(dev))
> 57 return CXL_DEVICE_MEMORY_EXPANDER;
> 58 if (dev->type == CXL_REGION_TYPE())
> 59 return CXL_DEVICE_REGION;
> > 60 if (dev->type == &cxl_cpmu_type)
> 61 return CXL_DEVICE_CPMU;
> 62 return 0;
> 63 }
> 64
>
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2023-03-27 16:06 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
[not found] <20230324171313.18448-4-Jonathan.Cameron@huawei.com>
2023-03-24 21:01 ` [PATCH v2 3/5] cxl/pci: Find and register CXL PMU devices kernel test robot
2023-03-27 15:50 ` Jonathan Cameron
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).