* [PATCH v2 1/5] ARM: dts: Remove LPC BMC and Host partitions
2020-10-05 8:28 [PATCH v2 0/5] Remove LPC register partitioning Chia-Wei, Wang
@ 2020-10-05 8:28 ` Chia-Wei, Wang
2020-10-05 8:28 ` [PATCH v2 2/5] soc: aspeed: Fix LPC register offsets Chia-Wei, Wang
` (4 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Chia-Wei, Wang @ 2020-10-05 8:28 UTC (permalink / raw)
To: lee.jones, robh+dt, joel, andrew, minyard, arnd, gregkh,
linus.walleij, haiyue.wang, cyrilbur, rlippert, linux-arm-kernel,
linux-aspeed, linux-kernel, openbmc, linux-gpio
Cc: ryan_chen
The LPC controller has no concept of the BMC and the Host partitions.
A concrete instance is that the HICRB[5:4] are for the I/O port address
configurtaion of KCS channel 1/2. However, the KCS driver cannot access
HICRB for channel 1/2 initialization via syscon regmap interface due to
the parition boundary. (i.e. offset 80h)
In addition, to be backward compatible, the newly added HW control bits
could be located at any reserved bits over the LPC addressing space.
Thereby, this patch removes the lpc-bmc and lpc-host child node and thus
the LPC partitioning.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
---
arch/arm/boot/dts/aspeed-g4.dtsi | 74 +++++++----------
arch/arm/boot/dts/aspeed-g5.dtsi | 135 ++++++++++++++-----------------
arch/arm/boot/dts/aspeed-g6.dtsi | 135 ++++++++++++++-----------------
3 files changed, 148 insertions(+), 196 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 82f0213e3a3c..22996b3c4a00 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -338,58 +338,44 @@
};
lpc: lpc@1e789000 {
- compatible = "aspeed,ast2400-lpc", "simple-mfd";
+ compatible = "aspeed,ast2400-lpc", "simple-mfd", "syscon";
reg = <0x1e789000 0x1000>;
+ reg-io-width = <4>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x1e789000 0x1000>;
- lpc_bmc: lpc-bmc@0 {
- compatible = "aspeed,ast2400-lpc-bmc";
- reg = <0x0 0x80>;
+ lpc_ctrl: lpc-ctrl@80 {
+ compatible = "aspeed,ast2400-lpc-ctrl";
+ reg = <0x80 0x10>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
+ status = "disabled";
};
- lpc_host: lpc-host@80 {
- compatible = "aspeed,ast2400-lpc-host", "simple-mfd", "syscon";
- reg = <0x80 0x1e0>;
- reg-io-width = <4>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x80 0x1e0>;
-
- lpc_ctrl: lpc-ctrl@0 {
- compatible = "aspeed,ast2400-lpc-ctrl";
- reg = <0x0 0x10>;
- clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
- status = "disabled";
- };
-
- lpc_snoop: lpc-snoop@10 {
- compatible = "aspeed,ast2400-lpc-snoop";
- reg = <0x10 0x8>;
- interrupts = <8>;
- status = "disabled";
- };
-
- lhc: lhc@20 {
- compatible = "aspeed,ast2400-lhc";
- reg = <0x20 0x24 0x48 0x8>;
- };
-
- lpc_reset: reset-controller@18 {
- compatible = "aspeed,ast2400-lpc-reset";
- reg = <0x18 0x4>;
- #reset-cells = <1>;
- };
-
- ibt: ibt@c0 {
- compatible = "aspeed,ast2400-ibt-bmc";
- reg = <0xc0 0x18>;
- interrupts = <8>;
- status = "disabled";
- };
+ lpc_snoop: lpc-snoop@90 {
+ compatible = "aspeed,ast2400-lpc-snoop";
+ reg = <0x90 0x8>;
+ interrupts = <8>;
+ status = "disabled";
+ };
+
+ lhc: lhc@a0 {
+ compatible = "aspeed,ast2400-lhc";
+ reg = <0xa0 0x24 0xc8 0x8>;
+ };
+
+ lpc_reset: reset-controller@98 {
+ compatible = "aspeed,ast2400-lpc-reset";
+ reg = <0x98 0x4>;
+ #reset-cells = <1>;
+ };
+
+ ibt: ibt@140 {
+ compatible = "aspeed,ast2400-ibt-bmc";
+ reg = <0x140 0x18>;
+ interrupts = <8>;
+ status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 9c91afb2b404..617efa703207 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -430,90 +430,73 @@
};
lpc: lpc@1e789000 {
- compatible = "aspeed,ast2500-lpc", "simple-mfd";
+ compatible = "aspeed,ast2500-lpc", "simple-mfd", "syscon";
reg = <0x1e789000 0x1000>;
+ reg-io-width = <4>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x1e789000 0x1000>;
- lpc_bmc: lpc-bmc@0 {
- compatible = "aspeed,ast2500-lpc-bmc", "simple-mfd", "syscon";
- reg = <0x0 0x80>;
- reg-io-width = <4>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0x80>;
-
- kcs1: kcs@24 {
- compatible = "aspeed,ast2500-kcs-bmc-v2";
- reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
- interrupts = <8>;
- status = "disabled";
- };
- kcs2: kcs@28 {
- compatible = "aspeed,ast2500-kcs-bmc-v2";
- reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
- interrupts = <8>;
- status = "disabled";
- };
- kcs3: kcs@2c {
- compatible = "aspeed,ast2500-kcs-bmc-v2";
- reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
- interrupts = <8>;
- status = "disabled";
- };
+ kcs1: kcs@24 {
+ compatible = "aspeed,ast2500-kcs-bmc-v2";
+ reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
+ interrupts = <8>;
+ status = "disabled";
+ };
+
+ kcs2: kcs@28 {
+ compatible = "aspeed,ast2500-kcs-bmc-v2";
+ reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
+ interrupts = <8>;
+ status = "disabled";
+ };
+
+ kcs3: kcs@2c {
+ compatible = "aspeed,ast2500-kcs-bmc-v2";
+ reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
+ interrupts = <8>;
+ status = "disabled";
+ };
+
+ kcs4: kcs@114 {
+ compatible = "aspeed,ast2500-kcs-bmc-v2";
+ reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>;
+ interrupts = <8>;
+ status = "disabled";
};
- lpc_host: lpc-host@80 {
- compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
- reg = <0x80 0x1e0>;
- reg-io-width = <4>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x80 0x1e0>;
-
- kcs4: kcs@94 {
- compatible = "aspeed,ast2500-kcs-bmc-v2";
- reg = <0x94 0x1>, <0x98 0x1>, <0x9c 0x1>;
- interrupts = <8>;
- status = "disabled";
- };
-
- lpc_ctrl: lpc-ctrl@0 {
- compatible = "aspeed,ast2500-lpc-ctrl";
- reg = <0x0 0x10>;
- clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
- status = "disabled";
- };
-
- lpc_snoop: lpc-snoop@10 {
- compatible = "aspeed,ast2500-lpc-snoop";
- reg = <0x10 0x8>;
- interrupts = <8>;
- status = "disabled";
- };
-
- lpc_reset: reset-controller@18 {
- compatible = "aspeed,ast2500-lpc-reset";
- reg = <0x18 0x4>;
- #reset-cells = <1>;
- };
-
- lhc: lhc@20 {
- compatible = "aspeed,ast2500-lhc";
- reg = <0x20 0x24 0x48 0x8>;
- };
-
-
- ibt: ibt@c0 {
- compatible = "aspeed,ast2500-ibt-bmc";
- reg = <0xc0 0x18>;
- interrupts = <8>;
- status = "disabled";
- };
+ lpc_ctrl: lpc-ctrl@80 {
+ compatible = "aspeed,ast2500-lpc-ctrl";
+ reg = <0x80 0x10>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
+ status = "disabled";
+ };
+
+ lpc_snoop: lpc-snoop@90 {
+ compatible = "aspeed,ast2500-lpc-snoop";
+ reg = <0x90 0x8>;
+ interrupts = <8>;
+ status = "disabled";
+ };
+
+ lpc_reset: reset-controller@98 {
+ compatible = "aspeed,ast2500-lpc-reset";
+ reg = <0x98 0x4>;
+ #reset-cells = <1>;
+ };
+
+ lhc: lhc@a0 {
+ compatible = "aspeed,ast2500-lhc";
+ reg = <0xa0 0x24 0xc8 0x8>;
+ };
+
+
+ ibt: ibt@140 {
+ compatible = "aspeed,ast2500-ibt-bmc";
+ reg = <0x140 0x18>;
+ interrupts = <8>;
+ status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index b58220a49cbd..8dfb5847fc34 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -449,90 +449,73 @@
};
lpc: lpc@1e789000 {
- compatible = "aspeed,ast2600-lpc", "simple-mfd";
+ compatible = "aspeed,ast2600-lpc", "simple-mfd", "syscon";
reg = <0x1e789000 0x1000>;
+ reg-io-width = <4>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x1e789000 0x1000>;
- lpc_bmc: lpc-bmc@0 {
- compatible = "aspeed,ast2600-lpc-bmc", "simple-mfd", "syscon";
- reg = <0x0 0x80>;
- reg-io-width = <4>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0x80>;
-
- kcs1: kcs@24 {
- compatible = "aspeed,ast2500-kcs-bmc-v2";
- reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
- interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
- kcs_chan = <1>;
- status = "disabled";
- };
- kcs2: kcs@28 {
- compatible = "aspeed,ast2500-kcs-bmc-v2";
- reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
- interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
- kcs3: kcs@2c {
- compatible = "aspeed,ast2500-kcs-bmc-v2";
- reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
- interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
+ kcs1: kcs@24 {
+ compatible = "aspeed,ast2500-kcs-bmc-v2";
+ reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
+ interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ kcs_chan = <1>;
+ status = "disabled";
+ };
+
+ kcs2: kcs@28 {
+ compatible = "aspeed,ast2500-kcs-bmc-v2";
+ reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
+ interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ kcs3: kcs@2c {
+ compatible = "aspeed,ast2500-kcs-bmc-v2";
+ reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ kcs4: kcs@114 {
+ compatible = "aspeed,ast2500-kcs-bmc-v2";
+ reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>;
+ interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ lpc_ctrl: lpc-ctrl@80 {
+ compatible = "aspeed,ast2600-lpc-ctrl";
+ reg = <0x80 0x80>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
+ status = "disabled";
+ };
+
+ lpc_snoop: lpc-snoop@80 {
+ compatible = "aspeed,ast2600-lpc-snoop";
+ reg = <0x80 0x80>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
};
- lpc_host: lpc-host@80 {
- compatible = "aspeed,ast2600-lpc-host", "simple-mfd", "syscon";
- reg = <0x80 0x1e0>;
- reg-io-width = <4>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x80 0x1e0>;
-
- kcs4: kcs@94 {
- compatible = "aspeed,ast2500-kcs-bmc-v2";
- reg = <0x94 0x1>, <0x98 0x1>, <0x9c 0x1>;
- interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- lpc_ctrl: lpc-ctrl@0 {
- compatible = "aspeed,ast2600-lpc-ctrl";
- reg = <0x0 0x80>;
- clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
- status = "disabled";
- };
-
- lpc_snoop: lpc-snoop@0 {
- compatible = "aspeed,ast2600-lpc-snoop";
- reg = <0x0 0x80>;
- interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- lhc: lhc@20 {
- compatible = "aspeed,ast2600-lhc";
- reg = <0x20 0x24 0x48 0x8>;
- };
-
- lpc_reset: reset-controller@18 {
- compatible = "aspeed,ast2600-lpc-reset";
- reg = <0x18 0x4>;
- #reset-cells = <1>;
- };
-
- ibt: ibt@c0 {
- compatible = "aspeed,ast2600-ibt-bmc";
- reg = <0xc0 0x18>;
- interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
+ lhc: lhc@a0 {
+ compatible = "aspeed,ast2600-lhc";
+ reg = <0xa0 0x24 0xc8 0x8>;
+ };
+
+ lpc_reset: reset-controller@98 {
+ compatible = "aspeed,ast2600-lpc-reset";
+ reg = <0x98 0x4>;
+ #reset-cells = <1>;
+ };
+
+ ibt: ibt@140 {
+ compatible = "aspeed,ast2600-ibt-bmc";
+ reg = <0x140 0x18>;
+ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
};
};
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v2 2/5] soc: aspeed: Fix LPC register offsets
2020-10-05 8:28 [PATCH v2 0/5] Remove LPC register partitioning Chia-Wei, Wang
2020-10-05 8:28 ` [PATCH v2 1/5] ARM: dts: Remove LPC BMC and Host partitions Chia-Wei, Wang
@ 2020-10-05 8:28 ` Chia-Wei, Wang
2020-10-05 8:28 ` [PATCH v2 3/5] ipmi: kcs: " Chia-Wei, Wang
` (3 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Chia-Wei, Wang @ 2020-10-05 8:28 UTC (permalink / raw)
To: lee.jones, robh+dt, joel, andrew, minyard, arnd, gregkh,
linus.walleij, haiyue.wang, cyrilbur, rlippert, linux-arm-kernel,
linux-aspeed, linux-kernel, openbmc, linux-gpio
Cc: ryan_chen
The LPC register offsets are fixed to adapt to the LPC DTS change,
where the LPC partitioning is removed.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
---
drivers/soc/aspeed/aspeed-lpc-ctrl.c | 6 +++---
drivers/soc/aspeed/aspeed-lpc-snoop.c | 11 +++++------
2 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/soc/aspeed/aspeed-lpc-ctrl.c b/drivers/soc/aspeed/aspeed-lpc-ctrl.c
index 01ed21e8bfee..36faa0618ada 100644
--- a/drivers/soc/aspeed/aspeed-lpc-ctrl.c
+++ b/drivers/soc/aspeed/aspeed-lpc-ctrl.c
@@ -17,12 +17,12 @@
#define DEVICE_NAME "aspeed-lpc-ctrl"
-#define HICR5 0x0
+#define HICR5 0x80
#define HICR5_ENL2H BIT(8)
#define HICR5_ENFWH BIT(10)
-#define HICR7 0x8
-#define HICR8 0xc
+#define HICR7 0x88
+#define HICR8 0x8c
struct aspeed_lpc_ctrl {
struct miscdevice miscdev;
diff --git a/drivers/soc/aspeed/aspeed-lpc-snoop.c b/drivers/soc/aspeed/aspeed-lpc-snoop.c
index f3d8d53ab84d..7ce5c9fcc73c 100644
--- a/drivers/soc/aspeed/aspeed-lpc-snoop.c
+++ b/drivers/soc/aspeed/aspeed-lpc-snoop.c
@@ -28,26 +28,25 @@
#define NUM_SNOOP_CHANNELS 2
#define SNOOP_FIFO_SIZE 2048
-#define HICR5 0x0
+#define HICR5 0x80
#define HICR5_EN_SNP0W BIT(0)
#define HICR5_ENINT_SNP0W BIT(1)
#define HICR5_EN_SNP1W BIT(2)
#define HICR5_ENINT_SNP1W BIT(3)
-
-#define HICR6 0x4
+#define HICR6 0x84
#define HICR6_STR_SNP0W BIT(0)
#define HICR6_STR_SNP1W BIT(1)
-#define SNPWADR 0x10
+#define SNPWADR 0x90
#define SNPWADR_CH0_MASK GENMASK(15, 0)
#define SNPWADR_CH0_SHIFT 0
#define SNPWADR_CH1_MASK GENMASK(31, 16)
#define SNPWADR_CH1_SHIFT 16
-#define SNPWDR 0x14
+#define SNPWDR 0x94
#define SNPWDR_CH0_MASK GENMASK(7, 0)
#define SNPWDR_CH0_SHIFT 0
#define SNPWDR_CH1_MASK GENMASK(15, 8)
#define SNPWDR_CH1_SHIFT 8
-#define HICRB 0x80
+#define HICRB 0x100
#define HICRB_ENSNP0D BIT(14)
#define HICRB_ENSNP1D BIT(15)
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v2 3/5] ipmi: kcs: aspeed: Fix LPC register offsets
2020-10-05 8:28 [PATCH v2 0/5] Remove LPC register partitioning Chia-Wei, Wang
2020-10-05 8:28 ` [PATCH v2 1/5] ARM: dts: Remove LPC BMC and Host partitions Chia-Wei, Wang
2020-10-05 8:28 ` [PATCH v2 2/5] soc: aspeed: Fix LPC register offsets Chia-Wei, Wang
@ 2020-10-05 8:28 ` Chia-Wei, Wang
2020-10-05 8:28 ` [PATCH v2 4/5] pinctrl: aspeed-g5: " Chia-Wei, Wang
` (2 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Chia-Wei, Wang @ 2020-10-05 8:28 UTC (permalink / raw)
To: lee.jones, robh+dt, joel, andrew, minyard, arnd, gregkh,
linus.walleij, haiyue.wang, cyrilbur, rlippert, linux-arm-kernel,
linux-aspeed, linux-kernel, openbmc, linux-gpio
Cc: ryan_chen
The LPC register offsets are fixed to adapt to the LPC DTS change,
where the LPC partitioning is removed.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
---
drivers/char/ipmi/kcs_bmc_aspeed.c | 13 +++++--------
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/char/ipmi/kcs_bmc_aspeed.c b/drivers/char/ipmi/kcs_bmc_aspeed.c
index a140203c079b..8843cf867a5d 100644
--- a/drivers/char/ipmi/kcs_bmc_aspeed.c
+++ b/drivers/char/ipmi/kcs_bmc_aspeed.c
@@ -27,7 +27,6 @@
#define KCS_CHANNEL_MAX 4
-/* mapped to lpc-bmc@0 IO space */
#define LPC_HICR0 0x000
#define LPC_HICR0_LPC3E BIT(7)
#define LPC_HICR0_LPC2E BIT(6)
@@ -52,15 +51,13 @@
#define LPC_STR1 0x03C
#define LPC_STR2 0x040
#define LPC_STR3 0x044
-
-/* mapped to lpc-host@80 IO space */
-#define LPC_HICRB 0x080
+#define LPC_HICRB 0x100
#define LPC_HICRB_IBFIF4 BIT(1)
#define LPC_HICRB_LPC4E BIT(0)
-#define LPC_LADR4 0x090
-#define LPC_IDR4 0x094
-#define LPC_ODR4 0x098
-#define LPC_STR4 0x09C
+#define LPC_LADR4 0x110
+#define LPC_IDR4 0x114
+#define LPC_ODR4 0x118
+#define LPC_STR4 0x11C
struct aspeed_kcs_bmc {
struct regmap *map;
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v2 4/5] pinctrl: aspeed-g5: Fix LPC register offsets
2020-10-05 8:28 [PATCH v2 0/5] Remove LPC register partitioning Chia-Wei, Wang
` (2 preceding siblings ...)
2020-10-05 8:28 ` [PATCH v2 3/5] ipmi: kcs: " Chia-Wei, Wang
@ 2020-10-05 8:28 ` Chia-Wei, Wang
2020-10-05 8:28 ` [PATCH v2 5/5] dt-bindings: aspeed-lpc: Remove LPC partitioning Chia-Wei, Wang
2020-10-20 6:03 ` [PATCH v2 0/5] Remove LPC register partitioning ChiaWei Wang
5 siblings, 0 replies; 13+ messages in thread
From: Chia-Wei, Wang @ 2020-10-05 8:28 UTC (permalink / raw)
To: lee.jones, robh+dt, joel, andrew, minyard, arnd, gregkh,
linus.walleij, haiyue.wang, cyrilbur, rlippert, linux-arm-kernel,
linux-aspeed, linux-kernel, openbmc, linux-gpio
Cc: ryan_chen
The LPC register offsets are fixed to adapt to the LPC DTS change,
where the LPC partitioning is removed.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
---
drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
index 0cab4c2576e2..98e62333fa54 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
@@ -60,7 +60,7 @@
#define COND2 { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 0, 0 }
/* LHCR0 is offset from the end of the H8S/2168-compatible registers */
-#define LHCR0 0x20
+#define LHCR0 0xa0
#define GFX064 0x64
#define B14 0
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v2 5/5] dt-bindings: aspeed-lpc: Remove LPC partitioning
2020-10-05 8:28 [PATCH v2 0/5] Remove LPC register partitioning Chia-Wei, Wang
` (3 preceding siblings ...)
2020-10-05 8:28 ` [PATCH v2 4/5] pinctrl: aspeed-g5: " Chia-Wei, Wang
@ 2020-10-05 8:28 ` Chia-Wei, Wang
2020-10-26 3:12 ` Andrew Jeffery
2020-10-20 6:03 ` [PATCH v2 0/5] Remove LPC register partitioning ChiaWei Wang
5 siblings, 1 reply; 13+ messages in thread
From: Chia-Wei, Wang @ 2020-10-05 8:28 UTC (permalink / raw)
To: lee.jones, robh+dt, joel, andrew, minyard, arnd, gregkh,
linus.walleij, haiyue.wang, cyrilbur, rlippert, linux-arm-kernel,
linux-aspeed, linux-kernel, openbmc, linux-gpio
Cc: ryan_chen
The LPC controller has no concept of the BMC and the Host partitions.
This patch fixes the documentation by removing the description on LPC
partitions. The register offsets illustrated in the DTS node examples
are also fixed to adapt to the LPC DTS change.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
---
.../devicetree/bindings/mfd/aspeed-lpc.txt | 85 +++----------------
1 file changed, 14 insertions(+), 71 deletions(-)
diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
index a92acf1dd491..866f54a09e09 100644
--- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
+++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
@@ -9,13 +9,7 @@ primary use case of the Aspeed LPC controller is as a slave on the bus
conditions it can also take the role of bus master.
The LPC controller is represented as a multi-function device to account for the
-mix of functionality it provides. The principle split is between the register
-layout at the start of the I/O space which is, to quote the Aspeed datasheet,
-"basically compatible with the [LPC registers from the] popular BMC controller
-H8S/2168[1]", and everything else, where everything else is an eclectic
-collection of functions with a esoteric register layout. "Everything else",
-here labeled the "host" portion of the controller, includes, but is not limited
-to:
+mix of functionality, which includes, but is not limited to:
* An IPMI Block Transfer[2] Controller
@@ -44,8 +38,8 @@ Required properties
===================
- compatible: One of:
- "aspeed,ast2400-lpc", "simple-mfd"
- "aspeed,ast2500-lpc", "simple-mfd"
+ "aspeed,ast2400-lpc", "simple-mfd", "syscon"
+ "aspeed,ast2500-lpc", "simple-mfd", "syscon"
- reg: contains the physical address and length values of the Aspeed
LPC memory region.
@@ -55,66 +49,17 @@ Required properties
- ranges: Maps 0 to the physical address and length of the LPC memory
region
-Required LPC Child nodes
-========================
-
-BMC Node
---------
-
-- compatible: One of:
- "aspeed,ast2400-lpc-bmc"
- "aspeed,ast2500-lpc-bmc"
-
-- reg: contains the physical address and length values of the
- H8S/2168-compatible LPC controller memory region
-
-Host Node
----------
-
-- compatible: One of:
- "aspeed,ast2400-lpc-host", "simple-mfd", "syscon"
- "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"
-
-- reg: contains the address and length values of the host-related
- register space for the Aspeed LPC controller
-
-- #address-cells: <1>
-- #size-cells: <1>
-- ranges: Maps 0 to the address and length of the host-related LPC memory
- region
-
Example:
lpc: lpc@1e789000 {
- compatible = "aspeed,ast2500-lpc", "simple-mfd";
+ compatible = "aspeed,ast2500-lpc", "simple-mfd", "syscon";
reg = <0x1e789000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x1e789000 0x1000>;
-
- lpc_bmc: lpc-bmc@0 {
- compatible = "aspeed,ast2500-lpc-bmc";
- reg = <0x0 0x80>;
- };
-
- lpc_host: lpc-host@80 {
- compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
- reg = <0x80 0x1e0>;
- reg-io-width = <4>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x80 0x1e0>;
- };
};
-BMC Node Children
-==================
-
-
-Host Node Children
-==================
LPC Host Interface Controller
-------------------
@@ -145,14 +90,12 @@ Optional properties:
Example:
-lpc-host@80 {
- lpc_ctrl: lpc-ctrl@0 {
- compatible = "aspeed,ast2500-lpc-ctrl";
- reg = <0x0 0x80>;
- clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
- memory-region = <&flash_memory>;
- flash = <&spi>;
- };
+lpc_ctrl: lpc-ctrl@80 {
+ compatible = "aspeed,ast2500-lpc-ctrl";
+ reg = <0x80 0x80>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
+ memory-region = <&flash_memory>;
+ flash = <&spi>;
};
LPC Host Controller
@@ -174,9 +117,9 @@ Required properties:
Example:
-lhc: lhc@20 {
+lhc: lhc@a0 {
compatible = "aspeed,ast2500-lhc";
- reg = <0x20 0x24 0x48 0x8>;
+ reg = <0xa0 0x24 0xc8 0x8>;
};
LPC reset control
@@ -194,8 +137,8 @@ Required properties:
Example:
-lpc_reset: reset-controller@18 {
+lpc_reset: reset-controller@98 {
compatible = "aspeed,ast2500-lpc-reset";
- reg = <0x18 0x4>;
+ reg = <0x98 0x4>;
#reset-cells = <1>;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v2 5/5] dt-bindings: aspeed-lpc: Remove LPC partitioning
2020-10-05 8:28 ` [PATCH v2 5/5] dt-bindings: aspeed-lpc: Remove LPC partitioning Chia-Wei, Wang
@ 2020-10-26 3:12 ` Andrew Jeffery
2020-10-27 7:14 ` ChiaWei Wang
2020-12-14 2:44 ` ChiaWei Wang
0 siblings, 2 replies; 13+ messages in thread
From: Andrew Jeffery @ 2020-10-26 3:12 UTC (permalink / raw)
To: Chia-Wei, Wang, Rob Herring, Joel Stanley
Cc: Ryan Chen, Corey Minyard, Arnd Bergmann, Greg Kroah-Hartman,
Linus Walleij, linux-kernel, openbmc, linux-gpio, linux-aspeed,
linux-arm-kernel, Lee Jones, Cyril Bur, Haiyue Wang
Hi Wang Chia-Wei,
On Mon, 5 Oct 2020, at 18:58, Chia-Wei, Wang wrote:
> The LPC controller has no concept of the BMC and the Host partitions.
> This patch fixes the documentation by removing the description on LPC
> partitions. The register offsets illustrated in the DTS node examples
> are also fixed to adapt to the LPC DTS change.
>
> Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
The documentation at [1] suggests this should probably be patch 1/5 rather than
5/5, so if you send the series again I'd probably rearrange it. Following the
steps outlined in [1] helps catch Rob's attention in the right way :)
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/submitting-patches.rst?h=v5.9
Rob:
The changes here go some way towards cleaning up mistakes I made in the Aspeed
LPC controller binding. The proposed change is very much not backwards
compatible, but Joel and I don't want to live with the resulting mess in the
drivers of catering to both layouts. Another way we could avoid the driver mess
is to rev all the bindings and immediately drop support for the old compatibles
in the drivers. This creates a bit more churn in the bindings. What are you
willing to accommodate?
All consumers I'm aware of ship the Aspeed BMC dtb in FIT images alongside the
kernel, so while backwards-incompatible changes are rightly frowned upon I feel
we probably wouldn't cause too much damage if we went that path.
Andrew
> ---
> .../devicetree/bindings/mfd/aspeed-lpc.txt | 85 +++----------------
> 1 file changed, 14 insertions(+), 71 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> index a92acf1dd491..866f54a09e09 100644
> --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> @@ -9,13 +9,7 @@ primary use case of the Aspeed LPC controller is as a
> slave on the bus
> conditions it can also take the role of bus master.
>
> The LPC controller is represented as a multi-function device to account for the
> -mix of functionality it provides. The principle split is between the register
> -layout at the start of the I/O space which is, to quote the Aspeed datasheet,
> -"basically compatible with the [LPC registers from the] popular BMC controller
> -H8S/2168[1]", and everything else, where everything else is an eclectic
> -collection of functions with a esoteric register layout. "Everything else",
> -here labeled the "host" portion of the controller, includes, but is not limited
> -to:
> +mix of functionality, which includes, but is not limited to:
>
> * An IPMI Block Transfer[2] Controller
>
> @@ -44,8 +38,8 @@ Required properties
> ===================
>
> - compatible: One of:
> - "aspeed,ast2400-lpc", "simple-mfd"
> - "aspeed,ast2500-lpc", "simple-mfd"
> + "aspeed,ast2400-lpc", "simple-mfd", "syscon"
> + "aspeed,ast2500-lpc", "simple-mfd", "syscon"
>
> - reg: contains the physical address and length values of the Aspeed
> LPC memory region.
> @@ -55,66 +49,17 @@ Required properties
> - ranges: Maps 0 to the physical address and length of the LPC memory
> region
>
> -Required LPC Child nodes
> -========================
> -
> -BMC Node
> ---------
> -
> -- compatible: One of:
> - "aspeed,ast2400-lpc-bmc"
> - "aspeed,ast2500-lpc-bmc"
> -
> -- reg: contains the physical address and length values of the
> - H8S/2168-compatible LPC controller memory region
> -
> -Host Node
> ----------
> -
> -- compatible: One of:
> - "aspeed,ast2400-lpc-host", "simple-mfd", "syscon"
> - "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"
> -
> -- reg: contains the address and length values of the host-related
> - register space for the Aspeed LPC controller
> -
> -- #address-cells: <1>
> -- #size-cells: <1>
> -- ranges: Maps 0 to the address and length of the host-related LPC memory
> - region
> -
> Example:
>
> lpc: lpc@1e789000 {
> - compatible = "aspeed,ast2500-lpc", "simple-mfd";
> + compatible = "aspeed,ast2500-lpc", "simple-mfd", "syscon";
> reg = <0x1e789000 0x1000>;
>
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x1e789000 0x1000>;
> -
> - lpc_bmc: lpc-bmc@0 {
> - compatible = "aspeed,ast2500-lpc-bmc";
> - reg = <0x0 0x80>;
> - };
> -
> - lpc_host: lpc-host@80 {
> - compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
> - reg = <0x80 0x1e0>;
> - reg-io-width = <4>;
> -
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0x0 0x80 0x1e0>;
> - };
> };
>
> -BMC Node Children
> -==================
> -
> -
> -Host Node Children
> -==================
>
> LPC Host Interface Controller
> -------------------
> @@ -145,14 +90,12 @@ Optional properties:
>
> Example:
>
> -lpc-host@80 {
> - lpc_ctrl: lpc-ctrl@0 {
> - compatible = "aspeed,ast2500-lpc-ctrl";
> - reg = <0x0 0x80>;
> - clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
> - memory-region = <&flash_memory>;
> - flash = <&spi>;
> - };
> +lpc_ctrl: lpc-ctrl@80 {
> + compatible = "aspeed,ast2500-lpc-ctrl";
> + reg = <0x80 0x80>;
> + clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
> + memory-region = <&flash_memory>;
> + flash = <&spi>;
> };
>
> LPC Host Controller
> @@ -174,9 +117,9 @@ Required properties:
>
> Example:
>
> -lhc: lhc@20 {
> +lhc: lhc@a0 {
> compatible = "aspeed,ast2500-lhc";
> - reg = <0x20 0x24 0x48 0x8>;
> + reg = <0xa0 0x24 0xc8 0x8>;
> };
>
> LPC reset control
> @@ -194,8 +137,8 @@ Required properties:
>
> Example:
>
> -lpc_reset: reset-controller@18 {
> +lpc_reset: reset-controller@98 {
> compatible = "aspeed,ast2500-lpc-reset";
> - reg = <0x18 0x4>;
> + reg = <0x98 0x4>;
> #reset-cells = <1>;
> };
> --
> 2.17.1
>
>
^ permalink raw reply [flat|nested] 13+ messages in thread* RE: [PATCH v2 5/5] dt-bindings: aspeed-lpc: Remove LPC partitioning
2020-10-26 3:12 ` Andrew Jeffery
@ 2020-10-27 7:14 ` ChiaWei Wang
2020-12-14 2:44 ` ChiaWei Wang
1 sibling, 0 replies; 13+ messages in thread
From: ChiaWei Wang @ 2020-10-27 7:14 UTC (permalink / raw)
To: Andrew Jeffery, Rob Herring, Joel Stanley
Cc: Ryan Chen, Corey Minyard, Arnd Bergmann, Greg Kroah-Hartman,
Linus Walleij, linux-kernel, openbmc, linux-gpio, linux-aspeed,
linux-arm-kernel, Lee Jones, Cyril Bur, Haiyue Wang
Hi Andrew,
> -----Original Message-----
> From: Andrew Jeffery <andrew@aj.id.au>
> Sent: Monday, October 26, 2020 11:12 AM
> To: ChiaWei Wang <chiawei_wang@aspeedtech.com>; Rob Herring
> <robh+dt@kernel.org>; Joel Stanley <joel@jms.id.au>
> Subject: Re: [PATCH v2 5/5] dt-bindings: aspeed-lpc: Remove LPC partitioning
>
> Hi Wang Chia-Wei,
>
> On Mon, 5 Oct 2020, at 18:58, Chia-Wei, Wang wrote:
> > The LPC controller has no concept of the BMC and the Host partitions.
> > This patch fixes the documentation by removing the description on LPC
> > partitions. The register offsets illustrated in the DTS node examples
> > are also fixed to adapt to the LPC DTS change.
> >
> > Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
>
> The documentation at [1] suggests this should probably be patch 1/5 rather
> than 5/5, so if you send the series again I'd probably rearrange it. Following the
> steps outlined in [1] helps catch Rob's attention in the right way :)
>
> [1]
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Docume
> ntation/devicetree/bindings/submitting-patches.rst?h=v5.9
Thanks for pointing out the guideline.
I will rearrange the commits if v3 change is requested.
>
> Rob:
>
> The changes here go some way towards cleaning up mistakes I made in the
> Aspeed LPC controller binding. The proposed change is very much not
> backwards compatible, but Joel and I don't want to live with the resulting mess
> in the drivers of catering to both layouts. Another way we could avoid the
> driver mess is to rev all the bindings and immediately drop support for the old
> compatibles in the drivers. This creates a bit more churn in the bindings. What
> are you willing to accommodate?
>
> All consumers I'm aware of ship the Aspeed BMC dtb in FIT images alongside
> the kernel, so while backwards-incompatible changes are rightly frowned upon
> I feel we probably wouldn't cause too much damage if we went that path.
>
> Andrew
>
> > ---
> > .../devicetree/bindings/mfd/aspeed-lpc.txt | 85 +++----------------
> > 1 file changed, 14 insertions(+), 71 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > index a92acf1dd491..866f54a09e09 100644
> > --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > @@ -9,13 +9,7 @@ primary use case of the Aspeed LPC controller is as a
> > slave on the bus conditions it can also take the role of bus master.
> >
> > The LPC controller is represented as a multi-function device to
> > account for the -mix of functionality it provides. The principle split
> > is between the register -layout at the start of the I/O space which
> > is, to quote the Aspeed datasheet, -"basically compatible with the
> > [LPC registers from the] popular BMC controller -H8S/2168[1]", and
> > everything else, where everything else is an eclectic -collection of
> > functions with a esoteric register layout. "Everything else", -here
> > labeled the "host" portion of the controller, includes, but is not
> > limited
> > -to:
> > +mix of functionality, which includes, but is not limited to:
> >
> > * An IPMI Block Transfer[2] Controller
> >
> > @@ -44,8 +38,8 @@ Required properties
> > ===================
> >
> > - compatible: One of:
> > - "aspeed,ast2400-lpc", "simple-mfd"
> > - "aspeed,ast2500-lpc", "simple-mfd"
> > + "aspeed,ast2400-lpc", "simple-mfd", "syscon"
> > + "aspeed,ast2500-lpc", "simple-mfd", "syscon"
> >
> > - reg: contains the physical address and length values of the Aspeed
> > LPC memory region.
> > @@ -55,66 +49,17 @@ Required properties
> > - ranges: Maps 0 to the physical address and length of the LPC memory
> > region
> >
> > -Required LPC Child nodes
> > -========================
> > -
> > -BMC Node
> > ---------
> > -
> > -- compatible: One of:
> > - "aspeed,ast2400-lpc-bmc"
> > - "aspeed,ast2500-lpc-bmc"
> > -
> > -- reg: contains the physical address and length values of the
> > - H8S/2168-compatible LPC controller memory region
> > -
> > -Host Node
> > ----------
> > -
> > -- compatible: One of:
> > - "aspeed,ast2400-lpc-host", "simple-mfd", "syscon"
> > - "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"
> > -
> > -- reg: contains the address and length values of the host-related
> > - register space for the Aspeed LPC controller
> > -
> > -- #address-cells: <1>
> > -- #size-cells: <1>
> > -- ranges: Maps 0 to the address and length of the host-related LPC
> memory
> > - region
> > -
> > Example:
> >
> > lpc: lpc@1e789000 {
> > - compatible = "aspeed,ast2500-lpc", "simple-mfd";
> > + compatible = "aspeed,ast2500-lpc", "simple-mfd", "syscon";
> > reg = <0x1e789000 0x1000>;
> >
> > #address-cells = <1>;
> > #size-cells = <1>;
> > ranges = <0x0 0x1e789000 0x1000>;
> > -
> > - lpc_bmc: lpc-bmc@0 {
> > - compatible = "aspeed,ast2500-lpc-bmc";
> > - reg = <0x0 0x80>;
> > - };
> > -
> > - lpc_host: lpc-host@80 {
> > - compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
> > - reg = <0x80 0x1e0>;
> > - reg-io-width = <4>;
> > -
> > - #address-cells = <1>;
> > - #size-cells = <1>;
> > - ranges = <0x0 0x80 0x1e0>;
> > - };
> > };
> >
> > -BMC Node Children
> > -==================
> > -
> > -
> > -Host Node Children
> > -==================
> >
> > LPC Host Interface Controller
> > -------------------
> > @@ -145,14 +90,12 @@ Optional properties:
> >
> > Example:
> >
> > -lpc-host@80 {
> > - lpc_ctrl: lpc-ctrl@0 {
> > - compatible = "aspeed,ast2500-lpc-ctrl";
> > - reg = <0x0 0x80>;
> > - clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
> > - memory-region = <&flash_memory>;
> > - flash = <&spi>;
> > - };
> > +lpc_ctrl: lpc-ctrl@80 {
> > + compatible = "aspeed,ast2500-lpc-ctrl";
> > + reg = <0x80 0x80>;
> > + clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
> > + memory-region = <&flash_memory>;
> > + flash = <&spi>;
> > };
> >
> > LPC Host Controller
> > @@ -174,9 +117,9 @@ Required properties:
> >
> > Example:
> >
> > -lhc: lhc@20 {
> > +lhc: lhc@a0 {
> > compatible = "aspeed,ast2500-lhc";
> > - reg = <0x20 0x24 0x48 0x8>;
> > + reg = <0xa0 0x24 0xc8 0x8>;
> > };
> >
> > LPC reset control
> > @@ -194,8 +137,8 @@ Required properties:
> >
> > Example:
> >
> > -lpc_reset: reset-controller@18 {
> > +lpc_reset: reset-controller@98 {
> > compatible = "aspeed,ast2500-lpc-reset";
> > - reg = <0x18 0x4>;
> > + reg = <0x98 0x4>;
> > #reset-cells = <1>;
> > };
> > --
> > 2.17.1
> >
> >
^ permalink raw reply [flat|nested] 13+ messages in thread* RE: [PATCH v2 5/5] dt-bindings: aspeed-lpc: Remove LPC partitioning
2020-10-26 3:12 ` Andrew Jeffery
2020-10-27 7:14 ` ChiaWei Wang
@ 2020-12-14 2:44 ` ChiaWei Wang
2020-12-15 0:12 ` Andrew Jeffery
1 sibling, 1 reply; 13+ messages in thread
From: ChiaWei Wang @ 2020-12-14 2:44 UTC (permalink / raw)
To: Andrew Jeffery, Rob Herring, Joel Stanley
Cc: Ryan Chen, Corey Minyard, Arnd Bergmann, Greg Kroah-Hartman,
Linus Walleij, linux-kernel, openbmc, linux-gpio, linux-aspeed,
linux-arm-kernel, Lee Jones, Cyril Bur, Haiyue Wang
Hi Andrew & Rob,
Do you have any suggestion on this patch?
Or should I send a v3 patch with the commits reordering for the review?
Thanks.
Chiawei
> -----Original Message-----
> From: Andrew Jeffery <andrew@aj.id.au>
> Sent: Monday, October 26, 2020 11:12 AM
> To: ChiaWei Wang <chiawei_wang@aspeedtech.com>; Rob Herring
> <robh+dt@kernel.org>; Joel Stanley <joel@jms.id.au>
> Cc: Ryan Chen <ryan_chen@aspeedtech.com>; Lee Jones
> <lee.jones@linaro.org>; Corey Minyard <minyard@acm.org>; Arnd Bergmann
> <arnd@arndb.de>; Greg Kroah-Hartman <gregkh@linuxfoundation.org>; Linus
> Walleij <linus.walleij@linaro.org>; Haiyue Wang
> <haiyue.wang@linux.intel.com>; Cyril Bur <cyrilbur@gmail.com>; Robert
> Lippert <rlippert@google.com>; linux-arm-kernel@lists.infradead.org;
> linux-aspeed@lists.ozlabs.org; linux-kernel@vger.kernel.org;
> openbmc@lists.ozlabs.org; linux-gpio@vger.kernel.org
> Subject: Re: [PATCH v2 5/5] dt-bindings: aspeed-lpc: Remove LPC partitioning
>
> Hi Wang Chia-Wei,
>
> On Mon, 5 Oct 2020, at 18:58, Chia-Wei, Wang wrote:
> > The LPC controller has no concept of the BMC and the Host partitions.
> > This patch fixes the documentation by removing the description on LPC
> > partitions. The register offsets illustrated in the DTS node examples
> > are also fixed to adapt to the LPC DTS change.
> >
> > Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
>
> The documentation at [1] suggests this should probably be patch 1/5 rather
> than 5/5, so if you send the series again I'd probably rearrange it. Following the
> steps outlined in [1] helps catch Rob's attention in the right way :)
>
> [1]
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Docume
> ntation/devicetree/bindings/submitting-patches.rst?h=v5.9
>
> Rob:
>
> The changes here go some way towards cleaning up mistakes I made in the
> Aspeed LPC controller binding. The proposed change is very much not
> backwards compatible, but Joel and I don't want to live with the resulting mess
> in the drivers of catering to both layouts. Another way we could avoid the
> driver mess is to rev all the bindings and immediately drop support for the old
> compatibles in the drivers. This creates a bit more churn in the bindings. What
> are you willing to accommodate?
>
> All consumers I'm aware of ship the Aspeed BMC dtb in FIT images alongside
> the kernel, so while backwards-incompatible changes are rightly frowned upon
> I feel we probably wouldn't cause too much damage if we went that path.
>
> Andrew
>
> > ---
> > .../devicetree/bindings/mfd/aspeed-lpc.txt | 85 +++----------------
> > 1 file changed, 14 insertions(+), 71 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > index a92acf1dd491..866f54a09e09 100644
> > --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > @@ -9,13 +9,7 @@ primary use case of the Aspeed LPC controller is as a
> > slave on the bus conditions it can also take the role of bus master.
> >
> > The LPC controller is represented as a multi-function device to
> > account for the -mix of functionality it provides. The principle split
> > is between the register -layout at the start of the I/O space which
> > is, to quote the Aspeed datasheet, -"basically compatible with the
> > [LPC registers from the] popular BMC controller -H8S/2168[1]", and
> > everything else, where everything else is an eclectic -collection of
> > functions with a esoteric register layout. "Everything else", -here
> > labeled the "host" portion of the controller, includes, but is not
> > limited
> > -to:
> > +mix of functionality, which includes, but is not limited to:
> >
> > * An IPMI Block Transfer[2] Controller
> >
> > @@ -44,8 +38,8 @@ Required properties
> > ===================
> >
> > - compatible: One of:
> > - "aspeed,ast2400-lpc", "simple-mfd"
> > - "aspeed,ast2500-lpc", "simple-mfd"
> > + "aspeed,ast2400-lpc", "simple-mfd", "syscon"
> > + "aspeed,ast2500-lpc", "simple-mfd", "syscon"
> >
> > - reg: contains the physical address and length values of the Aspeed
> > LPC memory region.
> > @@ -55,66 +49,17 @@ Required properties
> > - ranges: Maps 0 to the physical address and length of the LPC memory
> > region
> >
> > -Required LPC Child nodes
> > -========================
> > -
> > -BMC Node
> > ---------
> > -
> > -- compatible: One of:
> > - "aspeed,ast2400-lpc-bmc"
> > - "aspeed,ast2500-lpc-bmc"
> > -
> > -- reg: contains the physical address and length values of the
> > - H8S/2168-compatible LPC controller memory region
> > -
> > -Host Node
> > ----------
> > -
> > -- compatible: One of:
> > - "aspeed,ast2400-lpc-host", "simple-mfd", "syscon"
> > - "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"
> > -
> > -- reg: contains the address and length values of the host-related
> > - register space for the Aspeed LPC controller
> > -
> > -- #address-cells: <1>
> > -- #size-cells: <1>
> > -- ranges: Maps 0 to the address and length of the host-related LPC
> memory
> > - region
> > -
> > Example:
> >
> > lpc: lpc@1e789000 {
> > - compatible = "aspeed,ast2500-lpc", "simple-mfd";
> > + compatible = "aspeed,ast2500-lpc", "simple-mfd", "syscon";
> > reg = <0x1e789000 0x1000>;
> >
> > #address-cells = <1>;
> > #size-cells = <1>;
> > ranges = <0x0 0x1e789000 0x1000>;
> > -
> > - lpc_bmc: lpc-bmc@0 {
> > - compatible = "aspeed,ast2500-lpc-bmc";
> > - reg = <0x0 0x80>;
> > - };
> > -
> > - lpc_host: lpc-host@80 {
> > - compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
> > - reg = <0x80 0x1e0>;
> > - reg-io-width = <4>;
> > -
> > - #address-cells = <1>;
> > - #size-cells = <1>;
> > - ranges = <0x0 0x80 0x1e0>;
> > - };
> > };
> >
> > -BMC Node Children
> > -==================
> > -
> > -
> > -Host Node Children
> > -==================
> >
> > LPC Host Interface Controller
> > -------------------
> > @@ -145,14 +90,12 @@ Optional properties:
> >
> > Example:
> >
> > -lpc-host@80 {
> > - lpc_ctrl: lpc-ctrl@0 {
> > - compatible = "aspeed,ast2500-lpc-ctrl";
> > - reg = <0x0 0x80>;
> > - clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
> > - memory-region = <&flash_memory>;
> > - flash = <&spi>;
> > - };
> > +lpc_ctrl: lpc-ctrl@80 {
> > + compatible = "aspeed,ast2500-lpc-ctrl";
> > + reg = <0x80 0x80>;
> > + clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
> > + memory-region = <&flash_memory>;
> > + flash = <&spi>;
> > };
> >
> > LPC Host Controller
> > @@ -174,9 +117,9 @@ Required properties:
> >
> > Example:
> >
> > -lhc: lhc@20 {
> > +lhc: lhc@a0 {
> > compatible = "aspeed,ast2500-lhc";
> > - reg = <0x20 0x24 0x48 0x8>;
> > + reg = <0xa0 0x24 0xc8 0x8>;
> > };
> >
> > LPC reset control
> > @@ -194,8 +137,8 @@ Required properties:
> >
> > Example:
> >
> > -lpc_reset: reset-controller@18 {
> > +lpc_reset: reset-controller@98 {
> > compatible = "aspeed,ast2500-lpc-reset";
> > - reg = <0x18 0x4>;
> > + reg = <0x98 0x4>;
> > #reset-cells = <1>;
> > };
> > --
> > 2.17.1
> >
> >
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v2 5/5] dt-bindings: aspeed-lpc: Remove LPC partitioning
2020-12-14 2:44 ` ChiaWei Wang
@ 2020-12-15 0:12 ` Andrew Jeffery
2020-12-15 2:17 ` ChiaWei Wang
0 siblings, 1 reply; 13+ messages in thread
From: Andrew Jeffery @ 2020-12-15 0:12 UTC (permalink / raw)
To: Chia-Wei, Wang, Rob Herring, Joel Stanley
Cc: Ryan Chen, Corey Minyard, Arnd Bergmann, Greg Kroah-Hartman,
Linus Walleij, linux-kernel, linux-gpio, linux-aspeed,
linux-arm-kernel, Lee Jones, openbmc, Haiyue Wang
Hi Chiawei,
On Mon, 14 Dec 2020, at 13:14, ChiaWei Wang wrote:
> Hi Andrew & Rob,
>
> Do you have any suggestion on this patch?
Rob hasn't responded, but I think it will be easier to get an Ack out of him if
we do a v2 of the binding so we're not breaking backwards-compatibility with
the current definition. Concretely:
- compatible: One of:
"aspeed,ast2400-lpc", "simple-mfd"
"aspeed,ast2500-lpc", "simple-mfd"
Becomes something like:
- compatible: One of:
"aspeed,ast2400-lpc-v2", "simple-mfd"
"aspeed,ast2500-lpc-v2", "simple-mfd"
We can convert the in-tree devicetrees, immediately drop support for the
current binding in the drivers, and _only_ support v2 of the binding going
forward. That way your patches stay largely the same, the binding isn't
hamstrung as it is currently, and we're not trying to maintain code to support
the current binding definition - but we're also not pretending that old
devicetrees will work with newer kernels that only support the new binding
definition (which is the problem with your current patch series).
How does that sound?
As to how to implement this, I think we'll need to add some
of_device_is_compatible() checks in the relevant drivers to make sure that
they're using the new LPC binding, such as in
drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c before we fetch the regmap on line
2657.
Sorry that this is dragging out a bit (and for the mess I made).
Cheers,
Andrew
^ permalink raw reply [flat|nested] 13+ messages in thread* RE: [PATCH v2 5/5] dt-bindings: aspeed-lpc: Remove LPC partitioning
2020-12-15 0:12 ` Andrew Jeffery
@ 2020-12-15 2:17 ` ChiaWei Wang
0 siblings, 0 replies; 13+ messages in thread
From: ChiaWei Wang @ 2020-12-15 2:17 UTC (permalink / raw)
To: Andrew Jeffery, Rob Herring, Joel Stanley
Cc: Ryan Chen, Corey Minyard, Arnd Bergmann, Greg Kroah-Hartman,
Linus Walleij, linux-kernel, linux-gpio, linux-aspeed,
linux-arm-kernel, Lee Jones, openbmc, Haiyue Wang
Hi Andrew,
> -----Original Message-----
> From: Andrew Jeffery <andrew@aj.id.au>
> Sent: Tuesday, December 15, 2020 8:12 AM
> To: ChiaWei Wang <chiawei_wang@aspeedtech.com>; Rob Herring
> <robh+dt@kernel.org>; Joel Stanley <joel@jms.id.au>
> Cc: Ryan Chen <ryan_chen@aspeedtech.com>; Lee Jones
> <lee.jones@linaro.org>; Corey Minyard <minyard@acm.org>; Arnd Bergmann
> <arnd@arndb.de>; Greg Kroah-Hartman <gregkh@linuxfoundation.org>; Linus
> Walleij <linus.walleij@linaro.org>; Haiyue Wang
> <haiyue.wang@linux.intel.com>; linux-arm-kernel@lists.infradead.org;
> linux-aspeed@lists.ozlabs.org; linux-kernel@vger.kernel.org;
> openbmc@lists.ozlabs.org; linux-gpio@vger.kernel.org
> Subject: Re: [PATCH v2 5/5] dt-bindings: aspeed-lpc: Remove LPC partitioning
>
> Hi Chiawei,
>
> On Mon, 14 Dec 2020, at 13:14, ChiaWei Wang wrote:
> > Hi Andrew & Rob,
> >
> > Do you have any suggestion on this patch?
>
> Rob hasn't responded, but I think it will be easier to get an Ack out of him if we
> do a v2 of the binding so we're not breaking backwards-compatibility with the
> current definition. Concretely:
>
> - compatible: One of:
> "aspeed,ast2400-lpc", "simple-mfd"
> "aspeed,ast2500-lpc", "simple-mfd"
>
> Becomes something like:
>
> - compatible: One of:
> "aspeed,ast2400-lpc-v2", "simple-mfd"
> "aspeed,ast2500-lpc-v2", "simple-mfd"
>
> We can convert the in-tree devicetrees, immediately drop support for the
> current binding in the drivers, and _only_ support v2 of the binding going
> forward. That way your patches stay largely the same, the binding isn't
> hamstrung as it is currently, and we're not trying to maintain code to support
> the current binding definition - but we're also not pretending that old
> devicetrees will work with newer kernels that only support the new binding
> definition (which is the problem with your current patch series).
>
> How does that sound?
Sounds good. The v2 binding string should be a notification to sync both the new device tree and the new drivers.
I will prepare a v3 patch with this change and the commit reordering suggested.
Thanks,
Chiawei
>
> As to how to implement this, I think we'll need to add some
> of_device_is_compatible() checks in the relevant drivers to make sure that
> they're using the new LPC binding, such as in
> drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c before we fetch the regmap on line
> 2657.
>
> Sorry that this is dragging out a bit (and for the mess I made).
>
> Cheers,
>
> Andrew
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [PATCH v2 0/5] Remove LPC register partitioning
2020-10-05 8:28 [PATCH v2 0/5] Remove LPC register partitioning Chia-Wei, Wang
` (4 preceding siblings ...)
2020-10-05 8:28 ` [PATCH v2 5/5] dt-bindings: aspeed-lpc: Remove LPC partitioning Chia-Wei, Wang
@ 2020-10-20 6:03 ` ChiaWei Wang
2020-10-26 2:45 ` Andrew Jeffery
5 siblings, 1 reply; 13+ messages in thread
From: ChiaWei Wang @ 2020-10-20 6:03 UTC (permalink / raw)
To: lee.jones, robh+dt, joel, andrew, minyard, arnd, gregkh,
linus.walleij, haiyue.wang, cyrilbur, rlippert, linux-arm-kernel,
linux-aspeed, linux-kernel, openbmc, linux-gpio
Cc: BMC-SW
Hi All,
Do you have any comment on the v2 changes?
Thanks.
Chiawei
> -----Original Message-----
> From: ChiaWei Wang <chiawei_wang@aspeedtech.com>
> Sent: Monday, October 5, 2020 4:28 PM
> To: lee.jones@linaro.org; robh+dt@kernel.org; joel@jms.id.au;
> andrew@aj.id.au; minyard@acm.org; arnd@arndb.de;
> gregkh@linuxfoundation.org; linus.walleij@linaro.org;
> haiyue.wang@linux.intel.com; cyrilbur@gmail.com; rlippert@google.com;
> linux-arm-kernel@lists.infradead.org; linux-aspeed@lists.ozlabs.org;
> linux-kernel@vger.kernel.org; openbmc@lists.ozlabs.org;
> linux-gpio@vger.kernel.org
> Subject: [PATCH v2 0/5] Remove LPC register partitioning
>
> The LPC controller has no concept of the BMC and the Host partitions.
> The incorrect partitioning can impose unnecessary range restrictions on
> register access through the syscon regmap interface.
>
> For instance, HICRB contains the I/O port address configuration of KCS channel
> 1/2. However, the KCS#1/#2 drivers cannot access HICRB as it is located at the
> other LPC partition.
>
> In addition, to be backward compatible, the newly added HW control bits could
> be located at any reserved bits over the LPC addressing space.
>
> Thereby, this patch series aims to remove the LPC partitioning for better driver
> development and maintenance.
>
>
> Changes since v1:
> - Add the fix to the aspeed-lpc binding documentation.
>
> Chia-Wei, Wang (5):
> ARM: dts: Remove LPC BMC and Host partitions
> soc: aspeed: Fix LPC register offsets
> ipmi: kcs: aspeed: Fix LPC register offsets
> pinctrl: aspeed-g5: Fix LPC register offsets
> dt-bindings: aspeed-lpc: Remove LPC partitioning
>
> .../devicetree/bindings/mfd/aspeed-lpc.txt | 85 ++---------
> arch/arm/boot/dts/aspeed-g4.dtsi | 74 ++++------
> arch/arm/boot/dts/aspeed-g5.dtsi | 135 ++++++++----------
> arch/arm/boot/dts/aspeed-g6.dtsi | 135 ++++++++----------
> drivers/char/ipmi/kcs_bmc_aspeed.c | 13 +-
> drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 2 +-
> drivers/soc/aspeed/aspeed-lpc-ctrl.c | 6 +-
> drivers/soc/aspeed/aspeed-lpc-snoop.c | 11 +-
> 8 files changed, 176 insertions(+), 285 deletions(-)
>
> --
> 2.17.1
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v2 0/5] Remove LPC register partitioning
2020-10-20 6:03 ` [PATCH v2 0/5] Remove LPC register partitioning ChiaWei Wang
@ 2020-10-26 2:45 ` Andrew Jeffery
0 siblings, 0 replies; 13+ messages in thread
From: Andrew Jeffery @ 2020-10-26 2:45 UTC (permalink / raw)
To: Chia-Wei, Wang, Lee Jones, Rob Herring, Joel Stanley,
Corey Minyard, Arnd Bergmann, Greg Kroah-Hartman, Linus Walleij,
Haiyue Wang, Cyril Bur, Robert Lippert, linux-arm-kernel,
linux-aspeed, linux-kernel, openbmc, linux-gpio
Cc: BMC-SW
On Tue, 20 Oct 2020, at 16:33, ChiaWei Wang wrote:
> Hi All,
>
> Do you have any comment on the v2 changes?
> Thanks.
>
Hmm, seems I'm missing patches 3/5 and 4/5 from my inbox. Weird.
Anyway, sorry for the delay, I'm looking at them now.
Andrew
^ permalink raw reply [flat|nested] 13+ messages in thread