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From: "Chris Chen (TPI)" <Chris.Chen3@flex.com>
To: Andrew Jeffery <andrew@aj.id.au>,
	"Bills, Jason M" <jason.m.bills@linux.intel.com>,
	"openbmc@lists.ozlabs.org" <openbmc@lists.ozlabs.org>
Subject: 回覆: [x86-power-control]: press the power button for a long time that can't force turn off system power
Date: Wed, 18 Aug 2021 11:07:07 +0000	[thread overview]
Message-ID: <DM6PR08MB55140245266AADC189348568DCFF9@DM6PR08MB5514.namprd08.prod.outlook.com> (raw)
In-Reply-To: <8de9006c-a45a-4a24-0afa-c99ced621080@linux.intel.com>

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Hi Andrew,

Understood. Thanks for your explanation.


Hi Jason,

I will take it a shot. Thanks for your sharing.


Regards,
Chris Chen
________________________________
寄件者: openbmc <openbmc-bounces+chris.chen3=flex.com@lists.ozlabs.org> 代表 Bills, Jason M <jason.m.bills@linux.intel.com>
寄件日期: 2021年8月18日 上午 03:04
收件者: openbmc@lists.ozlabs.org <openbmc@lists.ozlabs.org>
主旨: Re: [x86-power-control]: press the power button for a long time that can't force turn off system power



On 8/17/2021 5:30 AM, Andrew Jeffery wrote:
> Hi Chris,
>
> On Tue, 17 Aug 2021, at 20:47, Chris Chen (TPI) wrote:
>> Hi Andrew,
>>
>> That means I'm able to choose one of following 2 options to achieve
>> pass-through behavior when I using x86-power-control package, is my
>> understanding correct?
>>
>> 1. Add code to re-enable GPIOP0 and GPIOP1 into a pass-through function
>> after they are requested as a GPIO function in the x86-power-control
>> package. (Or maybe to create a script with "devmem > 0x1e6e24BC 32
>> 0x0F000000" command that will be run automatically after system up to
>> change register directly.)
>
> This is a hack and should be a last resort. Even then I'd avoid it.
>
> Certainly you should avoid shipping with /dev/mem enabled.
>
>>
>> 2. Modify pinctrl in Kernel that will not disable GPIOP0 and GPIOP1's
>> pass-through function if they already are configured as a pass-through
>> when they are requesting as a GPIO function.
>
> Perhaps, though maybe you should follow up on whether you can drive
> GPIOP1 when it's in pass-through mode. My recollection is you cannot,
> at least for the AST2500 and earlier, in which case both P0 and P1 are
> effectively inputs for the purpose of the GPIO controller despite P1
> being a physical output. This behaviour is probably more confusing than
> it is helpful.
>
> There's also option 3 which is to emulate the pass-through in software,
> as I outlined in my previous email.
This is some of the configuration that I have on my system where the
pass-through is working correctly in x86-power-control:

I have one kernel patch that selects the "pass-through" pin
configuration on startup:
https://urldefense.com/v3/__https://github.com/Intel-BMC/linux/commit/8fe1ac31c13a0e8443c665394112ba407c90ae70__;!!HSntlCg!Ep_IWFI6dHqTAFsDwLYoJ0JYl3PjsE2hcEJQFIkNt1nDgHL9PvJEAWMmDWtE4az1$ .

In x86-power-control, I have the POWER_BUTTON GPIO mapped to GPIOP2, and
I'm able to claim and monitor that GPIO without affecting the
pass-through status.

I have POWER_OUT mapped to GPIOP3 which cannot be held in
x86-power-control as it disables the pass-through when claimed.  So, it
is always released after the power-control action is completed.

Thanks,
-Jason

>
> Hope that helps,
>
> Andrew
>

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      reply	other threads:[~2021-08-18 11:08 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-23 10:28 Chris Chen (TPI)
2021-07-23 20:36 ` Bills, Jason M
2021-07-24  3:04   ` 回覆: " Chris Chen (TPI)
2021-07-26 16:46     ` Bills, Jason M
2021-08-16  3:52       ` Chris Chen (TPI)
2021-08-16  6:30         ` Andrew Jeffery
2021-08-16 10:45           ` 回覆: " Chris Chen (TPI)
2021-08-17  1:57             ` Andrew Jeffery
2021-08-17 11:17               ` Chris Chen (TPI)
2021-08-17 11:30                 ` Andrew Jeffery
2021-08-17 19:04                   ` Bills, Jason M
2021-08-18 11:07                     ` Chris Chen (TPI) [this message]

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