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From: AngeloGioacchino Del Regno  <angelogioacchino.delregno@collabora.com>
To: agross@kernel.org
Cc: andersson@kernel.org, konrad.dybcio@linaro.org, joro@8bytes.org,
	will@kernel.org, robin.murphy@arm.com, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, robdclark@gmail.com,
	linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	marijn.suijten@somainline.org, kernel@collabora.com,
	luca@z3ntu.xyz, a39.skl@gmail.com, phone-devel@vger.kernel.org,
	~postmarketos/upstreaming@lists.sr.ht,
	AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@collabora.com>
Subject: [PATCH v3 3/6] iommu/qcom: Properly reset the IOMMU context
Date: Tue, 15 Nov 2022 11:11:19 +0100	[thread overview]
Message-ID: <20221115101122.155440-4-angelogioacchino.delregno@collabora.com> (raw)
In-Reply-To: <20221115101122.155440-1-angelogioacchino.delregno@collabora.com>

Avoid context faults by resetting the context(s) entirely at
detach_dev() time and also do the same before programming the
context for domain initialization.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
[Marijn: Rebased over next-20221111]
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/iommu/arm/arm-smmu/qcom_iommu.c | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c b/drivers/iommu/arm/arm-smmu/qcom_iommu.c
index 491a8093f3d6..49f4308f1bd2 100644
--- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c
+++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c
@@ -223,6 +223,20 @@ static irqreturn_t qcom_iommu_fault(int irq, void *dev)
 	return IRQ_HANDLED;
 }
 
+static void qcom_iommu_reset_ctx(struct qcom_iommu_ctx *ctx)
+{
+	iommu_writel(ctx, ARM_SMMU_CB_FAR, 0);
+	iommu_writel(ctx, ARM_SMMU_CB_FSR, ARM_SMMU_FSR_FAULT);
+	iommu_writel(ctx, ARM_SMMU_CB_S1_MAIR1, 0);
+	iommu_writel(ctx, ARM_SMMU_CB_PAR, 0);
+	iommu_writel(ctx, ARM_SMMU_CB_S1_MAIR0, 0);
+	iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0);
+	iommu_writel(ctx, ARM_SMMU_CB_TCR2, 0);
+	iommu_writel(ctx, ARM_SMMU_CB_TCR, 0);
+	iommu_writeq(ctx, ARM_SMMU_CB_TTBR0, 0);
+	iommu_writeq(ctx, ARM_SMMU_CB_TTBR1, 0);
+}
+
 static int qcom_iommu_init_domain(struct iommu_domain *domain,
 				  struct qcom_iommu_dev *qcom_iommu,
 				  struct device *dev)
@@ -273,6 +287,8 @@ static int qcom_iommu_init_domain(struct iommu_domain *domain,
 			ctx->secure_init = true;
 		}
 
+		qcom_iommu_reset_ctx(ctx);
+
 		/* TTBRs */
 		iommu_writeq(ctx, ARM_SMMU_CB_TTBR0,
 				pgtbl_cfg.arm_lpae_s1_cfg.ttbr |
@@ -401,8 +417,8 @@ static void qcom_iommu_detach_dev(struct iommu_domain *domain, struct device *de
 	for (i = 0; i < fwspec->num_ids; i++) {
 		struct qcom_iommu_ctx *ctx = to_ctx(qcom_domain, fwspec->ids[i]);
 
-		/* Disable the context bank: */
-		iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0);
+		/* Disable and reset the context bank */
+		qcom_iommu_reset_ctx(ctx);
 
 		ctx->domain = NULL;
 	}
-- 
2.38.1


  parent reply	other threads:[~2022-11-15 10:11 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-15 10:11 [PATCH v3 0/6] Add support for Qualcomm's legacy IOMMU v2 AngeloGioacchino Del Regno
2022-11-15 10:11 ` [PATCH v3 1/6] dt-bindings: iommu: qcom,iommu: Document qcom,ctx-num property AngeloGioacchino Del Regno
2022-11-15 10:11 ` [PATCH v3 2/6] iommu/qcom: Use the asid read from device-tree if specified AngeloGioacchino Del Regno
2023-03-07 16:44   ` Dmitry Baryshkov
2023-03-07 16:47     ` Konrad Dybcio
2023-06-20  9:43     ` AngeloGioacchino Del Regno
2022-11-15 10:11 ` AngeloGioacchino Del Regno [this message]
2023-03-07 16:50   ` [PATCH v3 3/6] iommu/qcom: Properly reset the IOMMU context Dmitry Baryshkov
2022-11-15 10:11 ` [PATCH v3 4/6] iommu/qcom: Index contexts by asid number to allow asid 0 AngeloGioacchino Del Regno
2023-03-07 16:53   ` Dmitry Baryshkov
2022-11-15 10:11 ` [PATCH v3 5/6] dt-bindings: iommu: qcom,iommu: Document QSMMUv2 and MSM8976 compatibles AngeloGioacchino Del Regno
2022-11-16 12:22   ` Krzysztof Kozlowski
2022-11-15 10:11 ` [PATCH v3 6/6] iommu/qcom: Add support for QSMMUv2 and QSMMU-500 secured contexts AngeloGioacchino Del Regno
2023-03-07 16:58   ` Dmitry Baryshkov
2023-02-22  9:57 ` [PATCH v3 0/6] Add support for Qualcomm's legacy IOMMU v2 AngeloGioacchino Del Regno
2023-06-19 21:42   ` Luca Weiss
2023-06-20 10:02     ` AngeloGioacchino Del Regno

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