From: Conor Dooley <conor@kernel.org>
To: Sunil V L <sunilvl@ventanamicro.com>
Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org,
linux-crypto@vger.kernel.org,
platform-driver-x86@vger.kernel.org, llvm@lists.linux.dev,
"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Tom Rix <trix@redhat.com>, Weili Qian <qianweili@huawei.com>,
Herbert Xu <herbert@gondor.apana.org.au>,
Jonathan Corbet <corbet@lwn.net>, Marc Zyngier <maz@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Andrew Jones <ajones@ventanamicro.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Mark Gross <markgross@kernel.org>,
Hans de Goede <hdegoede@redhat.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
Nathan Chancellor <nathan@kernel.org>,
Nick Desaulniers <ndesaulniers@google.com>,
Zhou Wang <wangzhou1@hisilicon.com>,
Palmer Dabbelt <palmer@dabbelt.com>, Len Brown <lenb@kernel.org>,
Maximilian Luz <luzmaximilian@gmail.com>,
"David S . Miller" <davem@davemloft.net>
Subject: Re: [PATCH V4 14/23] RISC-V: cpu: Enable cpuinfo for ACPI systems
Date: Tue, 4 Apr 2023 22:04:56 +0100 [thread overview]
Message-ID: <20230404-overlaid-flatterer-22731133a75f@spud> (raw)
In-Reply-To: <20230404182037.863533-15-sunilvl@ventanamicro.com>
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On Tue, Apr 04, 2023 at 11:50:28PM +0530, Sunil V L wrote:
> On ACPI based platforms, few details like ISA need to be read
> from the ACPI table. Enable cpuinfo on ACPI based systems.
>
> ACPI has nothing similar to DT compatible property for each CPU.
> SBI calls must be used to get vendor/arch/imp ID for any errata.
ecalls are used on DT systems for this too FYI, vendorid/archid/impid
are not contained in the DT.
Otherwise,
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Should probably have given that conditionally last time, sorry about
that.
Thanks,
Conor.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
> arch/riscv/kernel/cpu.c | 30 ++++++++++++++++++++++--------
> 1 file changed, 22 insertions(+), 8 deletions(-)
>
> diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
> index 8400f0cc9704..ace4752516d8 100644
> --- a/arch/riscv/kernel/cpu.c
> +++ b/arch/riscv/kernel/cpu.c
> @@ -3,10 +3,12 @@
> * Copyright (C) 2012 Regents of the University of California
> */
>
> +#include <linux/acpi.h>
> #include <linux/cpu.h>
> #include <linux/init.h>
> #include <linux/seq_file.h>
> #include <linux/of.h>
> +#include <asm/acpi.h>
> #include <asm/csr.h>
> #include <asm/hwcap.h>
> #include <asm/sbi.h>
> @@ -283,23 +285,35 @@ static void c_stop(struct seq_file *m, void *v)
> static int c_show(struct seq_file *m, void *v)
> {
> unsigned long cpu_id = (unsigned long)v - 1;
> - struct device_node *node = of_get_cpu_node(cpu_id, NULL);
> struct riscv_cpuinfo *ci = per_cpu_ptr(&riscv_cpuinfo, cpu_id);
> + struct device_node *node;
> const char *compat, *isa;
>
> seq_printf(m, "processor\t: %lu\n", cpu_id);
> seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id));
> - if (!of_property_read_string(node, "riscv,isa", &isa))
> - print_isa(m, isa);
> - print_mmu(m);
> - if (!of_property_read_string(node, "compatible", &compat)
> - && strcmp(compat, "riscv"))
> - seq_printf(m, "uarch\t\t: %s\n", compat);
> +
> + if (acpi_disabled) {
> + node = of_get_cpu_node(cpu_id, NULL);
> + if (!of_property_read_string(node, "riscv,isa", &isa))
> + print_isa(m, isa);
> +
> + print_mmu(m);
> + if (!of_property_read_string(node, "compatible", &compat) &&
> + strcmp(compat, "riscv"))
> + seq_printf(m, "uarch\t\t: %s\n", compat);
> +
> + of_node_put(node);
> + } else {
> + if (!acpi_get_riscv_isa(NULL, cpu_id, &isa))
> + print_isa(m, isa);
> +
> + print_mmu(m);
> + }
> +
> seq_printf(m, "mvendorid\t: 0x%lx\n", ci->mvendorid);
> seq_printf(m, "marchid\t\t: 0x%lx\n", ci->marchid);
> seq_printf(m, "mimpid\t\t: 0x%lx\n", ci->mimpid);
> seq_puts(m, "\n");
> - of_node_put(node);
>
> return 0;
> }
> --
> 2.34.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
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next prev parent reply other threads:[~2023-04-04 21:05 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-04 18:20 [PATCH V4 00/23] Add basic ACPI support for RISC-V Sunil V L
2023-04-04 18:20 ` [PATCH V4 01/23] riscv: move sbi_init() earlier before jump_label_init() Sunil V L
2023-04-04 18:20 ` [PATCH V4 02/23] ACPICA: MADT: Add RISC-V INTC interrupt controller Sunil V L
2023-04-04 18:20 ` [PATCH V4 03/23] ACPICA: Add structure definitions for RISC-V RHCT Sunil V L
2023-04-04 18:20 ` [PATCH V4 04/23] ACPI: tables: Print RINTC information when MADT is parsed Sunil V L
2023-04-04 18:20 ` [PATCH V4 05/23] ACPI: OSL: Make should_use_kmap() 0 for RISC-V Sunil V L
2023-04-26 16:47 ` Björn Töpel
2023-04-27 9:27 ` Sunil V L
2023-04-27 11:24 ` Björn Töpel
2023-04-04 18:20 ` [PATCH V4 06/23] RISC-V: Add support to build the ACPI core Sunil V L
2023-04-26 18:44 ` Palmer Dabbelt
2023-04-04 18:20 ` [PATCH V4 07/23] ACPI: processor_core: RISC-V: Enable mapping processor to the hartid Sunil V L
2023-04-04 18:20 ` [PATCH V4 08/23] RISC-V: ACPI: Cache and retrieve the RINTC structure Sunil V L
2023-04-04 20:14 ` Conor Dooley
2023-04-05 15:17 ` Andrew Jones
2023-04-06 3:46 ` Sunil V L
2023-04-26 18:45 ` Palmer Dabbelt
2023-04-27 9:22 ` Sunil V L
2023-04-27 10:25 ` Andrew Jones
2023-04-27 10:52 ` Sunil V L
2023-04-27 13:13 ` Andrew Jones
2023-04-04 18:20 ` [PATCH V4 09/23] drivers/acpi: RISC-V: Add RHCT related code Sunil V L
2023-04-26 18:45 ` Palmer Dabbelt
2023-04-04 18:20 ` [PATCH V4 10/23] RISC-V: smpboot: Create wrapper smp_setup() Sunil V L
2023-04-26 18:45 ` Palmer Dabbelt
2023-04-04 18:20 ` [PATCH V4 11/23] RISC-V: smpboot: Add ACPI support in smp_setup() Sunil V L
2023-04-05 14:58 ` Andrew Jones
2023-04-04 18:20 ` [PATCH V4 12/23] RISC-V: cpufeature: Avoid calling riscv_of_processor_hartid() Sunil V L
2023-04-04 20:46 ` Conor Dooley
2023-04-04 18:20 ` [PATCH V4 13/23] RISC-V: cpufeature: Add ACPI support in riscv_fill_hwcap() Sunil V L
2023-04-04 20:57 ` Conor Dooley
2023-04-05 13:35 ` Sunil V L
2023-04-05 14:31 ` Conor Dooley
2023-04-05 15:37 ` Andrew Jones
2023-04-29 10:31 ` Conor Dooley
2023-05-02 1:28 ` Sunil V L
2023-04-04 18:20 ` [PATCH V4 14/23] RISC-V: cpu: Enable cpuinfo for ACPI systems Sunil V L
2023-04-04 21:04 ` Conor Dooley [this message]
2023-04-04 18:20 ` [PATCH V4 15/23] irqchip/riscv-intc: Add ACPI support Sunil V L
2023-04-05 15:48 ` Andrew Jones
2023-04-06 3:47 ` Sunil V L
2023-04-04 18:20 ` [PATCH V4 16/23] clocksource/timer-riscv: Refactor riscv_timer_init_dt() Sunil V L
2023-04-04 21:25 ` Conor Dooley
2023-04-05 10:55 ` Sunil V L
2023-04-04 18:20 ` [PATCH V4 17/23] clocksource/timer-riscv: Add ACPI support Sunil V L
2023-04-04 21:27 ` Conor Dooley
2023-04-04 18:20 ` [PATCH V4 18/23] RISC-V: time.c: Add ACPI support for time_init() Sunil V L
2023-04-04 18:20 ` [PATCH V4 19/23] RISC-V: Add ACPI initialization in setup_arch() Sunil V L
2023-04-04 21:38 ` Conor Dooley
2023-04-05 15:11 ` Sunil V L
2023-04-05 15:30 ` Conor Dooley
2023-04-04 18:20 ` [PATCH V4 20/23] RISC-V: Enable ACPI in defconfig Sunil V L
2023-04-04 21:43 ` Conor Dooley
2023-04-05 10:58 ` Sunil V L
2023-04-04 18:20 ` [PATCH V4 21/23] MAINTAINERS: Add entry for drivers/acpi/riscv Sunil V L
2023-04-04 18:20 ` [PATCH V4 22/23] platform/surface: Disable for RISC-V Sunil V L
2023-04-05 4:19 ` Jessica Clarke
2023-04-05 11:29 ` Sunil V L
2023-04-05 9:33 ` Maximilian Luz
2023-04-05 11:11 ` Sunil V L
2023-04-05 11:35 ` Maximilian Luz
2023-04-04 18:20 ` [PATCH V4 23/23] crypto: hisilicon/qm: Workaround to enable build with RISC-V clang Sunil V L
2023-04-04 21:59 ` Conor Dooley
2023-04-05 10:46 ` Sunil V L
2023-04-05 8:16 ` Arnd Bergmann
2023-04-11 11:42 ` Weili Qian
2023-04-19 14:34 ` Arnd Bergmann
2023-04-04 18:42 ` [PATCH V4 00/23] Add basic ACPI support for RISC-V Conor Dooley
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