From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 02/22] target/arm: Use correct ID register check for aa32_fp16_arith
Date: Tue, 25 Aug 2020 11:06:40 -0700 [thread overview]
Message-ID: <0a7f9574-2d82-9c32-ca37-e5fad0e9bb42@linaro.org> (raw)
In-Reply-To: <20200824142934.20850-3-peter.maydell@linaro.org>
On 8/24/20 7:29 AM, Peter Maydell wrote:
> The aa32_fp16_arith feature check function currently looks at the
> AArch64 ID_AA64PFR0 register. This is (as the comment notes) not
> correct. The bogus check was put in mostly to allow testing of the
> fp16 variants of the VCMLA instructions and it was something of
> a mistake that we allowed them to exist in master.
>
> Switch the feature check function to testing VMFR1.FPHP, which is
> what it ought to be.
>
> This will remove emulation of the VCMLA and VCADD insns from
> AArch32 code running on an AArch64 '-cpu max' using system emulation.
> (They were never enabled for aarch32 linux-user and system-emulation.)
> Since we weren't advertising their existence via the AArch32 ID
> register, well-behaved guests wouldn't have been using them anyway.
>
> Once we have implemented all the AArch32 support for the FP16 extension
> we will advertise it in the MVFR1 ID register field, which will reenable
> these insns along with all the others.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> I don't expect that any guests will have been using these insns,
> but in any case the fp16 work will be all done before the next
> QEMU release and the insns re-enabled...
> ---
> target/arm/cpu.h | 7 +------
> 1 file changed, 1 insertion(+), 6 deletions(-)
Cc qemu-stable, for the bug fix?
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2020-08-25 18:07 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-24 14:29 [PATCH 00/22] target/arm: Implement fp16 for AArch32 VFP Peter Maydell
2020-08-24 14:29 ` [PATCH 01/22] target/arm: Remove local definitions of float constants Peter Maydell
2020-08-25 18:04 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 02/22] target/arm: Use correct ID register check for aa32_fp16_arith Peter Maydell
2020-08-25 18:06 ` Richard Henderson [this message]
2020-08-27 13:46 ` Peter Maydell
2020-08-24 14:29 ` [PATCH 03/22] target/arm: Implement VFP fp16 for VFP_BINOP operations Peter Maydell
2020-08-25 18:14 ` Richard Henderson
2020-08-27 13:39 ` Peter Maydell
2020-08-24 14:29 ` [PATCH 04/22] target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMUL Peter Maydell
2020-08-25 18:18 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 05/22] target/arm: Macroify trans functions for VFMA, VFMS, VFNMA, VFNMS Peter Maydell
2020-08-25 18:19 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 06/22] target/arm: Implement VFP fp16 for fused-multiply-add Peter Maydell
2020-08-25 18:21 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 07/22] target/arm: Macroify uses of do_vfp_2op_sp() and do_vfp_2op_dp() Peter Maydell
2020-08-25 18:22 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 08/22] target/arm: Implement VFP fp16 for VABS, VNEG, VSQRT Peter Maydell
2020-08-25 18:24 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 09/22] target/arm: Implement VFP fp16 for VMOV immediate Peter Maydell
2020-08-25 18:25 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 10/22] target/arm: Implement VFP fp16 VCMP Peter Maydell
2020-08-25 18:39 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 11/22] target/arm: Implement VFP fp16 VLDR and VSTR Peter Maydell
2020-08-25 18:44 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 12/22] target/arm: Implement VFP fp16 VCVT between float and integer Peter Maydell
2020-08-25 18:45 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 13/22] target/arm: Make VFP_CONV_FIX macros take separate float type and float size Peter Maydell
2020-08-25 18:47 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 14/22] target/arm: Use macros instead of open-coding fp16 conversion helpers Peter Maydell
2020-08-25 18:48 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 15/22] target/arm: Implement VFP fp16 VCVT between float and fixed-point Peter Maydell
2020-08-25 18:49 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 16/22] target/arm: Implement VFP vp16 VCVT-with-specified-rounding-mode Peter Maydell
2020-08-25 18:51 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 17/22] target/arm: Implement VFP fp16 VSEL Peter Maydell
2020-08-25 19:19 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 18/22] target/arm: Implement VFP fp16 VRINT* Peter Maydell
2020-08-25 19:21 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 19/22] target/arm: Implement new VFP fp16 insn VINS Peter Maydell
2020-08-25 19:23 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 20/22] target/arm: Implement new VFP fp16 insn VMOVX Peter Maydell
2020-08-25 19:25 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 21/22] target/arm: Implement VFP fp16 VMOV between gp and halfprec registers Peter Maydell
2020-08-25 19:29 ` Richard Henderson
2020-08-24 14:29 ` [PATCH 22/22] target/arm: Enable FP16 in '-cpu max' Peter Maydell
2020-08-25 19:30 ` Richard Henderson
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