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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH 22/22] target/arm: Enable FP16 in '-cpu max'
Date: Mon, 24 Aug 2020 15:29:34 +0100	[thread overview]
Message-ID: <20200824142934.20850-23-peter.maydell@linaro.org> (raw)
In-Reply-To: <20200824142934.20850-1-peter.maydell@linaro.org>

Set the MVFR1 ID register FPHP and SIMDHP fields to indicate
that our "-cpu max" has v8.2-FP16.

TODO: this patch needs to go at the end of the series.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/cpu.c   |  3 ++-
 target/arm/cpu64.c | 10 ++++------
 2 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 6b382fcd60e..c179e0752da 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2143,7 +2143,8 @@ static void arm_max_initfn(Object *obj)
             cpu->isar.id_isar6 = t;
 
             t = cpu->isar.mvfr1;
-            t = FIELD_DP32(t, MVFR1, FPHP, 2);     /* v8.0 FP support */
+            t = FIELD_DP32(t, MVFR1, FPHP, 3);     /* v8.2-FP16 */
+            t = FIELD_DP32(t, MVFR1, SIMDHP, 2);   /* v8.2-FP16 */
             cpu->isar.mvfr1 = t;
 
             t = cpu->isar.mvfr2;
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index dd696183dfb..3c2b3d95993 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -704,12 +704,10 @@ static void aarch64_max_initfn(Object *obj)
         u = FIELD_DP32(u, ID_DFR0, PERFMON, 5); /* v8.4-PMU */
         cpu->isar.id_dfr0 = u;
 
-        /*
-         * FIXME: We do not yet support ARMv8.2-fp16 for AArch32 yet,
-         * so do not set MVFR1.FPHP.  Strictly speaking this is not legal,
-         * but it is also not legal to enable SVE without support for FP16,
-         * and enabling SVE in system mode is more useful in the short term.
-         */
+        u = cpu->isar.mvfr1;
+        u = FIELD_DP32(u, MVFR1, FPHP, 3);      /* v8.2-FP16 */
+        u = FIELD_DP32(u, MVFR1, SIMDHP, 2);    /* v8.2-FP16 */
+        cpu->isar.mvfr1 = u;
 
 #ifdef CONFIG_USER_ONLY
         /* For usermode -cpu max we can use a larger and more efficient DCZ
-- 
2.20.1



  parent reply	other threads:[~2020-08-24 14:41 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-24 14:29 [PATCH 00/22] target/arm: Implement fp16 for AArch32 VFP Peter Maydell
2020-08-24 14:29 ` [PATCH 01/22] target/arm: Remove local definitions of float constants Peter Maydell
2020-08-25 18:04   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 02/22] target/arm: Use correct ID register check for aa32_fp16_arith Peter Maydell
2020-08-25 18:06   ` Richard Henderson
2020-08-27 13:46     ` Peter Maydell
2020-08-24 14:29 ` [PATCH 03/22] target/arm: Implement VFP fp16 for VFP_BINOP operations Peter Maydell
2020-08-25 18:14   ` Richard Henderson
2020-08-27 13:39     ` Peter Maydell
2020-08-24 14:29 ` [PATCH 04/22] target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMUL Peter Maydell
2020-08-25 18:18   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 05/22] target/arm: Macroify trans functions for VFMA, VFMS, VFNMA, VFNMS Peter Maydell
2020-08-25 18:19   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 06/22] target/arm: Implement VFP fp16 for fused-multiply-add Peter Maydell
2020-08-25 18:21   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 07/22] target/arm: Macroify uses of do_vfp_2op_sp() and do_vfp_2op_dp() Peter Maydell
2020-08-25 18:22   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 08/22] target/arm: Implement VFP fp16 for VABS, VNEG, VSQRT Peter Maydell
2020-08-25 18:24   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 09/22] target/arm: Implement VFP fp16 for VMOV immediate Peter Maydell
2020-08-25 18:25   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 10/22] target/arm: Implement VFP fp16 VCMP Peter Maydell
2020-08-25 18:39   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 11/22] target/arm: Implement VFP fp16 VLDR and VSTR Peter Maydell
2020-08-25 18:44   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 12/22] target/arm: Implement VFP fp16 VCVT between float and integer Peter Maydell
2020-08-25 18:45   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 13/22] target/arm: Make VFP_CONV_FIX macros take separate float type and float size Peter Maydell
2020-08-25 18:47   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 14/22] target/arm: Use macros instead of open-coding fp16 conversion helpers Peter Maydell
2020-08-25 18:48   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 15/22] target/arm: Implement VFP fp16 VCVT between float and fixed-point Peter Maydell
2020-08-25 18:49   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 16/22] target/arm: Implement VFP vp16 VCVT-with-specified-rounding-mode Peter Maydell
2020-08-25 18:51   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 17/22] target/arm: Implement VFP fp16 VSEL Peter Maydell
2020-08-25 19:19   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 18/22] target/arm: Implement VFP fp16 VRINT* Peter Maydell
2020-08-25 19:21   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 19/22] target/arm: Implement new VFP fp16 insn VINS Peter Maydell
2020-08-25 19:23   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 20/22] target/arm: Implement new VFP fp16 insn VMOVX Peter Maydell
2020-08-25 19:25   ` Richard Henderson
2020-08-24 14:29 ` [PATCH 21/22] target/arm: Implement VFP fp16 VMOV between gp and halfprec registers Peter Maydell
2020-08-25 19:29   ` Richard Henderson
2020-08-24 14:29 ` Peter Maydell [this message]
2020-08-25 19:30   ` [PATCH 22/22] target/arm: Enable FP16 in '-cpu max' Richard Henderson

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