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From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com
Subject: [Qemu-devel] [PULL 04/31] target/mips: Clean up handling of CP0 register 3
Date: Thu, 29 Aug 2019 12:24:46 +0200	[thread overview]
Message-ID: <1567074313-22998-5-git-send-email-aleksandar.markovic@rt-rk.com> (raw)
In-Reply-To: <1567074313-22998-1-git-send-email-aleksandar.markovic@rt-rk.com>

From: Aleksandar Markovic <amarkovic@wavecomp.com>

Clean up handling of CP0 register 3.

Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1567009614-12438-5-git-send-email-aleksandar.markovic@rt-rk.com>
---
 target/mips/cpu.h       |  1 +
 target/mips/translate.c | 20 ++++++++++----------
 2 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 466f72a..d5b7103 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -302,6 +302,7 @@ typedef struct mips_def_t mips_def_t;
 /* CP0 Register 03 */
 #define CP0_REG03__ENTRYLO1        0
 #define CP0_REG03__GLOBALNUM       1
+#define CP0_REG03__TCOPT           7
 /* CP0 Register 04 */
 #define CP0_REG04__CONTEXT         0
 #define CP0_REG04__USERLOCAL       2
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 66c6207..059f53e 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -6647,7 +6647,7 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         break;
     case CP0_REGISTER_03:
         switch (sel) {
-        case 0:
+        case CP0_REG03__ENTRYLO1:
             CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
             gen_mfhc0_entrylo(arg, offsetof(CPUMIPSState, CP0_EntryLo1));
             register_name = "EntryLo1";
@@ -6728,7 +6728,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         break;
     case CP0_REGISTER_03:
         switch (sel) {
-        case 0:
+        case CP0_REG03__ENTRYLO1:
             CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
             tcg_gen_andi_tl(arg, arg, mask);
             gen_mthc0_entrylo(arg, offsetof(CPUMIPSState, CP0_EntryLo1));
@@ -6947,7 +6947,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         break;
     case CP0_REGISTER_03:
         switch (sel) {
-        case 0:
+        case CP0_REG03__ENTRYLO1:
             {
                 TCGv_i64 tmp = tcg_temp_new_i64();
                 tcg_gen_ld_i64(tmp, cpu_env,
@@ -6964,7 +6964,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             }
             register_name = "EntryLo1";
             break;
-        case 1:
+        case CP0_REG03__GLOBALNUM:
             CP0_CHECK(ctx->vp);
             gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_GlobalNumber));
             register_name = "GlobalNumber";
@@ -7695,11 +7695,11 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         break;
     case CP0_REGISTER_03:
         switch (sel) {
-        case 0:
+        case CP0_REG03__ENTRYLO1:
             gen_helper_mtc0_entrylo1(cpu_env, arg);
             register_name = "EntryLo1";
             break;
-        case 1:
+        case CP0_REG03__GLOBALNUM:
             CP0_CHECK(ctx->vp);
             /* ignored */
             register_name = "GlobalNumber";
@@ -8440,11 +8440,11 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         break;
     case CP0_REGISTER_03:
         switch (sel) {
-        case 0:
+        case CP0_REG03__ENTRYLO1:
             tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EntryLo1));
             register_name = "EntryLo1";
             break;
-        case 1:
+        case CP0_REG03__GLOBALNUM:
             CP0_CHECK(ctx->vp);
             gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_GlobalNumber));
             register_name = "GlobalNumber";
@@ -9153,11 +9153,11 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         break;
     case CP0_REGISTER_03:
         switch (sel) {
-        case 0:
+        case CP0_REG03__ENTRYLO1:
             gen_helper_dmtc0_entrylo1(cpu_env, arg);
             register_name = "EntryLo1";
             break;
-        case 1:
+        case CP0_REG03__GLOBALNUM:
             CP0_CHECK(ctx->vp);
             /* ignored */
             register_name = "GlobalNumber";
-- 
2.7.4



  parent reply	other threads:[~2019-08-29 10:32 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-29 10:24 [Qemu-devel] [PULL 00/31] MIPS queue for August 29th, 2019 Aleksandar Markovic
2019-08-29 10:24 ` [Qemu-devel] [PULL 01/31] target/mips: Clean up handling of CP0 register 0 Aleksandar Markovic
2019-08-29 10:24 ` [Qemu-devel] [PULL 02/31] target/mips: Clean up handling of CP0 register 1 Aleksandar Markovic
2019-08-29 10:24 ` [Qemu-devel] [PULL 03/31] target/mips: Clean up handling of CP0 register 2 Aleksandar Markovic
2019-08-29 10:24 ` Aleksandar Markovic [this message]
2019-08-29 10:24 ` [Qemu-devel] [PULL 05/31] target/mips: Clean up handling of CP0 register 4 Aleksandar Markovic
2019-08-29 10:24 ` [Qemu-devel] [PULL 06/31] target/mips: Clean up handling of CP0 register 5 Aleksandar Markovic
2019-08-29 10:24 ` [Qemu-devel] [PULL 07/31] target/mips: Clean up handling of CP0 register 6 Aleksandar Markovic
2019-08-29 10:24 ` [Qemu-devel] [PULL 08/31] target/mips: Clean up handling of CP0 register 7 Aleksandar Markovic
2019-08-29 10:24 ` [Qemu-devel] [PULL 09/31] target/mips: Clean up handling of CP0 register 8 Aleksandar Markovic
2019-08-29 10:24 ` [Qemu-devel] [PULL 10/31] target/mips: Clean up handling of CP0 register 9 Aleksandar Markovic
2019-08-29 10:24 ` [Qemu-devel] [PULL 11/31] target/mips: Clean up handling of CP0 register 10 Aleksandar Markovic
2019-08-29 10:24 ` [Qemu-devel] [PULL 12/31] target/mips: Clean up handling of CP0 register 11 Aleksandar Markovic
2019-08-29 10:24 ` [Qemu-devel] [PULL 13/31] target/mips: Clean up handling of CP0 register 12 Aleksandar Markovic
2019-08-29 10:24 ` [Qemu-devel] [PULL 14/31] target/mips: Clean up handling of CP0 register 13 Aleksandar Markovic
2019-08-29 10:24 ` [Qemu-devel] [PULL 15/31] target/mips: Clean up handling of CP0 register 14 Aleksandar Markovic
2019-08-29 10:24 ` [Qemu-devel] [PULL 16/31] target/mips: Clean up handling of CP0 register 15 Aleksandar Markovic
2019-08-29 10:24 ` [Qemu-devel] [PULL 17/31] target/mips: Clean up handling of CP0 register 16 Aleksandar Markovic
2019-08-29 10:25 ` [Qemu-devel] [PULL 18/31] target/mips: Clean up handling of CP0 register 17 Aleksandar Markovic
2019-08-29 10:25 ` [Qemu-devel] [PULL 19/31] target/mips: Clean up handling of CP0 register 18 Aleksandar Markovic
2019-08-29 10:25 ` [Qemu-devel] [PULL 20/31] target/mips: Clean up handling of CP0 register 19 Aleksandar Markovic
2019-08-29 10:25 ` [Qemu-devel] [PULL 21/31] target/mips: Clean up handling of CP0 register 20 Aleksandar Markovic
2019-08-29 10:25 ` [Qemu-devel] [PULL 22/31] target/mips: Clean up handling of CP0 register 23 Aleksandar Markovic
2019-08-29 10:25 ` [Qemu-devel] [PULL 23/31] target/mips: Clean up handling of CP0 register 24 Aleksandar Markovic
2019-08-29 10:25 ` [Qemu-devel] [PULL 24/31] target/mips: Clean up handling of CP0 register 25 Aleksandar Markovic
2019-08-29 10:25 ` [Qemu-devel] [PULL 25/31] target/mips: Clean up handling of CP0 register 26 Aleksandar Markovic
2019-08-29 10:25 ` [Qemu-devel] [PULL 26/31] target/mips: Clean up handling of CP0 register 27 Aleksandar Markovic
2019-08-29 10:25 ` [Qemu-devel] [PULL 27/31] target/mips: Clean up handling of CP0 register 28 Aleksandar Markovic
2019-08-29 10:25 ` [Qemu-devel] [PULL 28/31] target/mips: Clean up handling of CP0 register 29 Aleksandar Markovic
2019-08-29 10:25 ` [Qemu-devel] [PULL 29/31] target/mips: Clean up handling of CP0 register 30 Aleksandar Markovic
2019-08-29 10:25 ` [Qemu-devel] [PULL 30/31] target/mips: Clean up handling of CP0 register 31 Aleksandar Markovic
2019-08-29 10:25 ` [Qemu-devel] [PULL 31/31] target/mips: Fix emulation of ST.W in system mode Aleksandar Markovic
2019-09-04 10:24 ` [Qemu-devel] [PULL 00/31] MIPS queue for August 29th, 2019 Peter Maydell

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