From: Andrew Jones <drjones@redhat.com>
To: qemu-devel@nongnu.org, qemu-arm@nongnu.org
Cc: peter.maydell@linaro.org, richard.henderson@linaro.org,
armbru@redhat.com, eric.auger@redhat.com, imammedo@redhat.com,
alex.bennee@linaro.org, Dave.Martin@arm.com
Subject: [Qemu-devel] [PATCH v2 06/14] target/arm: Allow SVE to be disabled via a CPU property
Date: Fri, 21 Jun 2019 18:34:14 +0200 [thread overview]
Message-ID: <20190621163422.6127-7-drjones@redhat.com> (raw)
In-Reply-To: <20190621163422.6127-1-drjones@redhat.com>
Since 97a28b0eeac14 ("target/arm: Allow VFP and Neon to be disabled via
a CPU property") we can disable the 'max' cpu model's VFP and neon
features, but there's no way to disable SVE. Add the 'sve=on|off'
property to give it that flexibility. We also rename
cpu_max_get/set_sve_vq to cpu_max_get/set_sve_max_vq in order for them
to follow the typical *_get/set_<property-name> pattern.
Signed-off-by: Andrew Jones <drjones@redhat.com>
---
target/arm/cpu.c | 10 +++++-
target/arm/cpu64.c | 72 ++++++++++++++++++++++++++++++++++------
target/arm/helper.c | 8 +++--
target/arm/monitor.c | 2 +-
tests/arm-cpu-features.c | 1 +
5 files changed, 78 insertions(+), 15 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 858f668d226e..f08e178fc84b 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -198,7 +198,7 @@ static void arm_cpu_reset(CPUState *s)
env->cp15.cpacr_el1 = deposit64(env->cp15.cpacr_el1, 16, 2, 3);
env->cp15.cptr_el[3] |= CPTR_EZ;
/* with maximum vector length */
- env->vfp.zcr_el[1] = cpu->sve_max_vq - 1;
+ env->vfp.zcr_el[1] = cpu->sve_max_vq ? cpu->sve_max_vq - 1 : 0;
env->vfp.zcr_el[2] = env->vfp.zcr_el[1];
env->vfp.zcr_el[3] = env->vfp.zcr_el[1];
/*
@@ -1129,6 +1129,14 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
cpu->isar.mvfr0 = u;
}
+ if (!cpu->sve_max_vq) {
+ uint64_t t;
+
+ t = cpu->isar.id_aa64pfr0;
+ t = FIELD_DP64(t, ID_AA64PFR0, SVE, 0);
+ cpu->isar.id_aa64pfr0 = t;
+ }
+
if (arm_feature(env, ARM_FEATURE_M) && !cpu->has_dsp) {
uint32_t u;
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 946994838d8a..02ada65f240c 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -257,27 +257,75 @@ static void aarch64_a72_initfn(Object *obj)
define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo);
}
-static void cpu_max_get_sve_vq(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
+static void cpu_max_get_sve_max_vq(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
{
ARMCPU *cpu = ARM_CPU(obj);
visit_type_uint32(v, name, &cpu->sve_max_vq, errp);
}
-static void cpu_max_set_sve_vq(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
+static void cpu_max_set_sve_max_vq(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
{
ARMCPU *cpu = ARM_CPU(obj);
Error *err = NULL;
+ uint32_t value;
- visit_type_uint32(v, name, &cpu->sve_max_vq, &err);
+ visit_type_uint32(v, name, &value, &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
- if (!err && (cpu->sve_max_vq == 0 || cpu->sve_max_vq > ARM_MAX_VQ)) {
- error_setg(&err, "unsupported SVE vector length");
- error_append_hint(&err, "Valid sve-max-vq in range [1-%d]\n",
+ if (!cpu->sve_max_vq) {
+ error_setg(errp, "cannot set sve-max-vq");
+ error_append_hint(errp, "SVE has been disabled with sve=off\n");
+ return;
+ }
+
+ cpu->sve_max_vq = value;
+
+ if (cpu->sve_max_vq == 0 || cpu->sve_max_vq > ARM_MAX_VQ) {
+ error_setg(errp, "unsupported SVE vector length");
+ error_append_hint(errp, "Valid sve-max-vq in range [1-%d]\n",
ARM_MAX_VQ);
}
- error_propagate(errp, err);
+}
+
+static void cpu_arm_get_sve(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+ bool value = !!cpu->sve_max_vq;
+
+ visit_type_bool(v, name, &value, errp);
+}
+
+static void cpu_arm_set_sve(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+ Error *err = NULL;
+ bool value;
+
+ visit_type_bool(v, name, &value, &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+
+ if (value) {
+ /*
+ * We handle the -cpu <cpu>,sve=off,sve=on case by reinitializing,
+ * but otherwise we don't do anything as an sve=on could come after
+ * a sve-max-vq setting.
+ */
+ if (!cpu->sve_max_vq) {
+ cpu->sve_max_vq = ARM_MAX_VQ;
+ }
+ } else {
+ cpu->sve_max_vq = 0;
+ }
}
/* -cpu max: if KVM is enabled, like -cpu host (best possible with this host);
@@ -373,8 +421,10 @@ static void aarch64_max_initfn(Object *obj)
#endif
cpu->sve_max_vq = ARM_MAX_VQ;
- object_property_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_vq,
- cpu_max_set_sve_vq, NULL, NULL, &error_fatal);
+ object_property_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_max_vq,
+ cpu_max_set_sve_max_vq, NULL, NULL, &error_fatal);
+ object_property_add(obj, "sve", "bool", cpu_arm_get_sve,
+ cpu_arm_set_sve, NULL, NULL, &error_fatal);
}
}
diff --git a/target/arm/helper.c b/target/arm/helper.c
index edba94004e0b..f500ccb6d31b 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5314,9 +5314,13 @@ uint32_t sve_zcr_len_for_el(CPUARMState *env, int el)
static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
+ ARMCPU *cpu = env_archcpu(env);
int cur_el = arm_current_el(env);
- int old_len = sve_zcr_len_for_el(env, cur_el);
- int new_len;
+ int old_len, new_len;
+
+ assert(cpu->sve_max_vq);
+
+ old_len = sve_zcr_len_for_el(env, cur_el);
/* Bits other than [3:0] are RAZ/WI. */
QEMU_BUILD_BUG_ON(ARM_MAX_VQ > 16);
diff --git a/target/arm/monitor.c b/target/arm/monitor.c
index 19e3120eef95..157c487a1551 100644
--- a/target/arm/monitor.c
+++ b/target/arm/monitor.c
@@ -90,7 +90,7 @@ GICCapabilityList *qmp_query_gic_capabilities(Error **errp)
}
static const char *cpu_model_advertised_features[] = {
- "aarch64", "pmu",
+ "aarch64", "pmu", "sve",
NULL
};
diff --git a/tests/arm-cpu-features.c b/tests/arm-cpu-features.c
index 31b1c15bb979..509e458e9c2f 100644
--- a/tests/arm-cpu-features.c
+++ b/tests/arm-cpu-features.c
@@ -158,6 +158,7 @@ static void test_query_cpu_model_expansion(const void *data)
if (g_str_equal(qtest_get_arch(), "aarch64")) {
assert_has_feature(qts, "max", "aarch64");
+ assert_has_feature(qts, "max", "sve");
assert_has_feature(qts, "cortex-a57", "pmu");
assert_has_feature(qts, "cortex-a57", "aarch64");
--
2.20.1
next prev parent reply other threads:[~2019-06-21 16:46 UTC|newest]
Thread overview: 95+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-21 16:34 [Qemu-devel] [PATCH v2 00/14] target/arm/kvm: enable SVE in guests Andrew Jones
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 01/14] target/arm/cpu64: Ensure kvm really supports aarch64=off Andrew Jones
2019-06-25 9:35 ` Auger Eric
2019-06-25 13:34 ` Andrew Jones
2019-07-24 12:51 ` Auger Eric
2019-07-24 13:52 ` Andrew Jones
2019-07-24 14:19 ` Auger Eric
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 02/14] target/arm/cpu: Ensure we can use the pmu with kvm Andrew Jones
2019-06-25 9:35 ` Auger Eric
2019-06-26 9:49 ` Richard Henderson
2019-06-26 13:11 ` Andrew Jones
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 03/14] target/arm/monitor: Introduce qmp_query_cpu_model_expansion Andrew Jones
2019-06-26 7:43 ` Auger Eric
2019-06-26 13:26 ` Andrew Jones
2019-07-24 12:51 ` Auger Eric
2019-07-24 14:05 ` Andrew Jones
2019-07-24 14:25 ` Auger Eric
2019-07-24 14:44 ` Andrew Jones
2019-07-24 12:55 ` Auger Eric
2019-07-24 14:13 ` Andrew Jones
2019-07-25 8:04 ` Auger Eric
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 04/14] tests: arm: Introduce cpu feature tests Andrew Jones
2019-07-25 7:54 ` Auger Eric
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 05/14] target/arm/helper: zcr: Add build bug next to value range assumption Andrew Jones
2019-06-24 11:05 ` Dave Martin
2019-06-24 11:30 ` Andrew Jones
2019-06-24 16:03 ` Dave Martin
2019-06-25 6:11 ` Andrew Jones
2019-06-25 6:14 ` Andrew Jones
2019-06-26 10:01 ` Auger Eric
2019-06-26 13:28 ` Andrew Jones
2019-06-26 13:40 ` Auger Eric
2019-06-26 13:58 ` Andrew Jones
2019-06-26 14:06 ` Auger Eric
2019-06-26 10:07 ` Richard Henderson
2019-06-21 16:34 ` Andrew Jones [this message]
2019-06-21 16:55 ` [Qemu-devel] [PATCH v2 06/14] target/arm: Allow SVE to be disabled via a CPU property Philippe Mathieu-Daudé
2019-06-21 17:11 ` Andrew Jones
2019-06-26 10:00 ` Auger Eric
2019-06-26 13:38 ` Andrew Jones
2019-06-26 10:20 ` Richard Henderson
2019-06-26 13:52 ` Andrew Jones
2019-07-17 15:43 ` Andrew Jones
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 07/14] target/arm/cpu64: max cpu: Introduce sve<vl-bits> properties Andrew Jones
2019-06-24 11:05 ` Dave Martin
2019-06-24 11:49 ` Andrew Jones
2019-06-24 12:10 ` Andrew Jones
2019-06-24 16:06 ` Dave Martin
2019-06-26 14:58 ` Auger Eric
2019-06-27 9:40 ` Andrew Jones
2019-06-27 10:51 ` Auger Eric
2019-06-27 11:43 ` Andrew Jones
2019-06-26 16:56 ` Auger Eric
2019-06-27 10:46 ` Andrew Jones
2019-06-27 11:00 ` Auger Eric
2019-06-27 11:47 ` Andrew Jones
2019-06-27 15:16 ` Dave Martin
2019-06-27 16:19 ` Richard Henderson
2019-06-27 16:49 ` Richard Henderson
2019-06-28 7:27 ` Andrew Jones
2019-06-28 8:31 ` Andrew Jones
2019-06-29 0:10 ` Richard Henderson
2019-07-17 8:13 ` Andrew Jones
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 08/14] target/arm/kvm64: Fix error returns Andrew Jones
2019-06-26 10:53 ` Richard Henderson
2019-06-26 11:50 ` Richard Henderson
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 09/14] target/arm/kvm64: Move the get/put of fpsimd registers out Andrew Jones
2019-06-26 10:35 ` Richard Henderson
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 10/14] target/arm/kvm64: Add kvm_arch_get/put_sve Andrew Jones
2019-06-24 11:05 ` Dave Martin
2019-06-24 11:55 ` Andrew Jones
2019-06-24 16:09 ` Dave Martin
2019-06-26 15:22 ` Richard Henderson
2019-06-27 10:59 ` Dave Martin
2019-06-27 11:26 ` Richard Henderson
2019-06-27 15:02 ` Dave Martin
2019-07-17 9:25 ` Andrew Jones
2019-07-17 9:35 ` Andrew Jones
2019-06-27 6:56 ` Auger Eric
2019-06-27 10:59 ` Andrew Jones
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 11/14] target/arm/kvm64: max cpu: Enable SVE when available Andrew Jones
2019-06-26 11:09 ` Richard Henderson
2019-06-27 11:56 ` Andrew Jones
2019-06-28 16:14 ` Auger Eric
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 12/14] target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features Andrew Jones
2019-06-26 11:11 ` Richard Henderson
2019-06-27 7:30 ` Auger Eric
2019-06-27 10:53 ` Andrew Jones
2019-06-27 11:01 ` Dave Martin
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 13/14] target/arm/cpu64: max cpu: Support sve properties with KVM Andrew Jones
2019-06-28 15:55 ` Auger Eric
2019-07-17 8:41 ` Andrew Jones
2019-06-21 16:34 ` [Qemu-devel] [PATCH v2 14/14] target/arm/kvm: host cpu: Add support for sve<vl-bits> properties Andrew Jones
2019-06-27 17:15 ` Auger Eric
2019-06-28 7:05 ` Andrew Jones
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