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* [PATCH v3 0/8] hw: Convert various reset() handler to DeviceReset
@ 2019-10-10 13:15 Philippe Mathieu-Daudé
  2019-10-10 13:15 ` [PATCH v3 1/8] hw/acpi/piix4: Convert reset " Philippe Mathieu-Daudé
                   ` (8 more replies)
  0 siblings, 9 replies; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-10 13:15 UTC (permalink / raw)
  To: Eduardo Habkost, qemu-devel
  Cc: Peter Maydell, Aleksandar Markovic, qemu-block,
	Michael S. Tsirkin, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Li Qiang, qemu-arm, qemu-ppc, Igor Mammedov,
	Marc-André Lureau, John Snow

Only patch 3/8 is missing review:
- hw/ide/piix: Convert reset handler to DeviceReset

Since v2:
- Fixed PIIX_IDE conversion (Li)
- Added more R-b tag.

Since v1:
- Removed the pci-host devices
- Removed the vmcoreinfo conversion (elmarco) but add a comment.
- Added Igor's R-b tag.

Following the thread discussion between Peter/Markus/Damien about
reset handlers:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg617103.html
I started to remove qemu_register_reset() calls from few qdevified
devices (the trivial ones).

Regards,

Phil.

v2: https://lists.gnu.org/archive/html/qemu-devel/2019-10/msg01677.html
v1: https://lists.gnu.org/archive/html/qemu-devel/2019-09/msg06367.html

Philippe Mathieu-Daudé (8):
  hw/acpi/piix4: Convert reset handler to DeviceReset
  hw/isa/piix4: Convert reset handler to DeviceReset
  hw/ide/piix: Convert reset handler to DeviceReset
  hw/ide/sii3112: Convert reset handler to DeviceReset
  hw/ide/via82c: Convert reset handler to DeviceReset
  hw/isa/vt82c686: Convert reset handler to DeviceReset
  hw/input/lm832x: Convert reset handler to DeviceReset
  hw/misc/vmcoreinfo: Add comment about reset handler

 hw/acpi/piix4.c      |  7 +++----
 hw/ide/piix.c        |  9 ++++-----
 hw/ide/sii3112.c     |  7 +++----
 hw/ide/via.c         | 10 ++++------
 hw/input/lm832x.c    | 12 +++++-------
 hw/isa/piix4.c       |  7 +++----
 hw/isa/vt82c686.c    | 11 ++++-------
 hw/misc/vmcoreinfo.c |  4 ++++
 8 files changed, 30 insertions(+), 37 deletions(-)

-- 
2.21.0



^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH v3 1/8] hw/acpi/piix4: Convert reset handler to DeviceReset
  2019-10-10 13:15 [PATCH v3 0/8] hw: Convert various reset() handler to DeviceReset Philippe Mathieu-Daudé
@ 2019-10-10 13:15 ` " Philippe Mathieu-Daudé
  2019-10-10 13:15 ` [PATCH v3 2/8] hw/isa/piix4: " Philippe Mathieu-Daudé
                   ` (7 subsequent siblings)
  8 siblings, 0 replies; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-10 13:15 UTC (permalink / raw)
  To: Eduardo Habkost, qemu-devel
  Cc: Peter Maydell, Aleksandar Markovic, qemu-block,
	Michael S. Tsirkin, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Li Qiang, qemu-arm, qemu-ppc, Igor Mammedov,
	Marc-André Lureau, John Snow

The PIIX4/PM is a PCI device within the PIIX4 chipset, it will be reset
when the PCI bus it stands on is reset.

Convert its reset handler into a proper Device reset method.

Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 hw/acpi/piix4.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index 5742c3df87..4e079b39bd 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -27,7 +27,6 @@
 #include "hw/pci/pci.h"
 #include "hw/qdev-properties.h"
 #include "hw/acpi/acpi.h"
-#include "sysemu/reset.h"
 #include "sysemu/runstate.h"
 #include "sysemu/sysemu.h"
 #include "qapi/error.h"
@@ -344,9 +343,9 @@ static const VMStateDescription vmstate_acpi = {
     }
 };
 
-static void piix4_reset(void *opaque)
+static void piix4_pm_reset(DeviceState *dev)
 {
-    PIIX4PMState *s = opaque;
+    PIIX4PMState *s = PIIX4_PM(dev);
     PCIDevice *d = PCI_DEVICE(s);
     uint8_t *pci_conf = d->config;
 
@@ -542,7 +541,6 @@ static void piix4_pm_realize(PCIDevice *dev, Error **errp)
 
     s->machine_ready.notify = piix4_pm_machine_ready;
     qemu_add_machine_init_done_notifier(&s->machine_ready);
-    qemu_register_reset(piix4_reset, s);
 
     piix4_acpi_system_hot_add_init(pci_address_space_io(dev),
                                    pci_get_bus(dev), s);
@@ -692,6 +690,7 @@ static void piix4_pm_class_init(ObjectClass *klass, void *data)
     k->device_id = PCI_DEVICE_ID_INTEL_82371AB_3;
     k->revision = 0x03;
     k->class_id = PCI_CLASS_BRIDGE_OTHER;
+    dc->reset = piix4_pm_reset;
     dc->desc = "PM";
     dc->vmsd = &vmstate_acpi;
     dc->props = piix4_pm_properties;
-- 
2.21.0



^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH v3 2/8] hw/isa/piix4: Convert reset handler to DeviceReset
  2019-10-10 13:15 [PATCH v3 0/8] hw: Convert various reset() handler to DeviceReset Philippe Mathieu-Daudé
  2019-10-10 13:15 ` [PATCH v3 1/8] hw/acpi/piix4: Convert reset " Philippe Mathieu-Daudé
@ 2019-10-10 13:15 ` " Philippe Mathieu-Daudé
  2019-10-10 13:15 ` [PATCH v3 3/8] hw/ide/piix: " Philippe Mathieu-Daudé
                   ` (6 subsequent siblings)
  8 siblings, 0 replies; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-10 13:15 UTC (permalink / raw)
  To: Eduardo Habkost, qemu-devel
  Cc: Peter Maydell, Aleksandar Markovic, qemu-block,
	Michael S. Tsirkin, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Li Qiang, qemu-arm, qemu-ppc, Igor Mammedov,
	Marc-André Lureau, John Snow

The PIIX4/ISA is a PCI device within the PIIX4 chipset, it will be reset
when the PCI bus it stands on is reset.

Convert its reset handler into a proper Device reset method.

Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 hw/isa/piix4.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index 3294056cd5..890d999abf 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -28,7 +28,6 @@
 #include "hw/isa/isa.h"
 #include "hw/sysbus.h"
 #include "migration/vmstate.h"
-#include "sysemu/reset.h"
 
 PCIDevice *piix4_dev;
 
@@ -40,9 +39,9 @@ typedef struct PIIX4State {
 #define PIIX4_PCI_DEVICE(obj) \
     OBJECT_CHECK(PIIX4State, (obj), TYPE_PIIX4_PCI_DEVICE)
 
-static void piix4_reset(void *opaque)
+static void piix4_isa_reset(DeviceState *dev)
 {
-    PIIX4State *d = opaque;
+    PIIX4State *d = PIIX4_PCI_DEVICE(dev);
     uint8_t *pci_conf = d->dev.config;
 
     pci_conf[0x04] = 0x07; // master, memory and I/O
@@ -97,7 +96,6 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
         return;
     }
     piix4_dev = &d->dev;
-    qemu_register_reset(piix4_reset, d);
 }
 
 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn)
@@ -118,6 +116,7 @@ static void piix4_class_init(ObjectClass *klass, void *data)
     k->vendor_id = PCI_VENDOR_ID_INTEL;
     k->device_id = PCI_DEVICE_ID_INTEL_82371AB_0;
     k->class_id = PCI_CLASS_BRIDGE_ISA;
+    dc->reset = piix4_isa_reset;
     dc->desc = "ISA bridge";
     dc->vmsd = &vmstate_piix4;
     /*
-- 
2.21.0



^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH v3 3/8] hw/ide/piix: Convert reset handler to DeviceReset
  2019-10-10 13:15 [PATCH v3 0/8] hw: Convert various reset() handler to DeviceReset Philippe Mathieu-Daudé
  2019-10-10 13:15 ` [PATCH v3 1/8] hw/acpi/piix4: Convert reset " Philippe Mathieu-Daudé
  2019-10-10 13:15 ` [PATCH v3 2/8] hw/isa/piix4: " Philippe Mathieu-Daudé
@ 2019-10-10 13:15 ` " Philippe Mathieu-Daudé
  2019-10-11  0:50   ` Li Qiang
  2019-10-10 13:15 ` [PATCH v3 4/8] hw/ide/sii3112: " Philippe Mathieu-Daudé
                   ` (5 subsequent siblings)
  8 siblings, 1 reply; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-10 13:15 UTC (permalink / raw)
  To: Eduardo Habkost, qemu-devel
  Cc: Peter Maydell, Aleksandar Markovic, qemu-block,
	Michael S. Tsirkin, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Li Qiang, qemu-arm, qemu-ppc, Igor Mammedov,
	Marc-André Lureau, John Snow

The PIIX/IDE is a PCI device within a PIIX chipset, it will be reset
when the PCI bus it stands on is reset.

Convert its reset handler into a proper Device reset method.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
v3: Also convert PIIX4 (Li Qiang)
---
 hw/ide/piix.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index fba6bc8bff..db313dd3b1 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -30,7 +30,6 @@
 #include "sysemu/block-backend.h"
 #include "sysemu/blockdev.h"
 #include "sysemu/dma.h"
-#include "sysemu/reset.h"
 
 #include "hw/ide/pci.h"
 #include "trace.h"
@@ -103,9 +102,9 @@ static void bmdma_setup_bar(PCIIDEState *d)
     }
 }
 
-static void piix3_reset(void *opaque)
+static void piix_ide_reset(DeviceState *dev)
 {
-    PCIIDEState *d = opaque;
+    PCIIDEState *d = PCI_IDE(dev);
     PCIDevice *pd = PCI_DEVICE(d);
     uint8_t *pci_conf = pd->config;
     int i;
@@ -154,8 +153,6 @@ static void pci_piix_ide_realize(PCIDevice *dev, Error **errp)
 
     pci_conf[PCI_CLASS_PROG] = 0x80; // legacy ATA mode
 
-    qemu_register_reset(piix3_reset, d);
-
     bmdma_setup_bar(d);
     pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar);
 
@@ -247,6 +244,7 @@ static void piix3_ide_class_init(ObjectClass *klass, void *data)
     DeviceClass *dc = DEVICE_CLASS(klass);
     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 
+    dc->reset = piix_ide_reset;
     k->realize = pci_piix_ide_realize;
     k->exit = pci_piix_ide_exitfn;
     k->vendor_id = PCI_VENDOR_ID_INTEL;
@@ -273,6 +271,7 @@ static void piix4_ide_class_init(ObjectClass *klass, void *data)
     DeviceClass *dc = DEVICE_CLASS(klass);
     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 
+    dc->reset = piix_ide_reset;
     k->realize = pci_piix_ide_realize;
     k->exit = pci_piix_ide_exitfn;
     k->vendor_id = PCI_VENDOR_ID_INTEL;
-- 
2.21.0



^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH v3 4/8] hw/ide/sii3112: Convert reset handler to DeviceReset
  2019-10-10 13:15 [PATCH v3 0/8] hw: Convert various reset() handler to DeviceReset Philippe Mathieu-Daudé
                   ` (2 preceding siblings ...)
  2019-10-10 13:15 ` [PATCH v3 3/8] hw/ide/piix: " Philippe Mathieu-Daudé
@ 2019-10-10 13:15 ` " Philippe Mathieu-Daudé
  2019-10-10 13:15 ` [PATCH v3 5/8] hw/ide/via82c: " Philippe Mathieu-Daudé
                   ` (4 subsequent siblings)
  8 siblings, 0 replies; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-10 13:15 UTC (permalink / raw)
  To: Eduardo Habkost, qemu-devel
  Cc: Peter Maydell, Aleksandar Markovic, qemu-block,
	Michael S. Tsirkin, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Li Qiang, qemu-arm, qemu-ppc, Igor Mammedov,
	Marc-André Lureau, John Snow

The SiI3112A SATA controller is a PCI device, it will be reset
when the PCI bus it stands on is reset.

Convert its reset handler into a proper Device reset method.

Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 hw/ide/sii3112.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c
index 2181260531..06605d7af2 100644
--- a/hw/ide/sii3112.c
+++ b/hw/ide/sii3112.c
@@ -15,7 +15,6 @@
 #include "qemu/osdep.h"
 #include "hw/ide/pci.h"
 #include "qemu/module.h"
-#include "sysemu/reset.h"
 #include "trace.h"
 
 #define TYPE_SII3112_PCI "sii3112"
@@ -237,9 +236,9 @@ static void sii3112_set_irq(void *opaque, int channel, int level)
     sii3112_update_irq(s);
 }
 
-static void sii3112_reset(void *opaque)
+static void sii3112_reset(DeviceState *dev)
 {
-    SiI3112PCIState *s = opaque;
+    SiI3112PCIState *s = SII3112_PCI(dev);
     int i;
 
     for (i = 0; i < 2; i++) {
@@ -290,7 +289,6 @@ static void sii3112_pci_realize(PCIDevice *dev, Error **errp)
         s->bmdma[i].bus = &s->bus[i];
         ide_register_restart_cb(&s->bus[i]);
     }
-    qemu_register_reset(sii3112_reset, s);
 }
 
 static void sii3112_pci_class_init(ObjectClass *klass, void *data)
@@ -303,6 +301,7 @@ static void sii3112_pci_class_init(ObjectClass *klass, void *data)
     pd->class_id = PCI_CLASS_STORAGE_RAID;
     pd->revision = 1;
     pd->realize = sii3112_pci_realize;
+    dc->reset = sii3112_reset;
     dc->desc = "SiI3112A SATA controller";
     set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
 }
-- 
2.21.0



^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH v3 5/8] hw/ide/via82c: Convert reset handler to DeviceReset
  2019-10-10 13:15 [PATCH v3 0/8] hw: Convert various reset() handler to DeviceReset Philippe Mathieu-Daudé
                   ` (3 preceding siblings ...)
  2019-10-10 13:15 ` [PATCH v3 4/8] hw/ide/sii3112: " Philippe Mathieu-Daudé
@ 2019-10-10 13:15 ` " Philippe Mathieu-Daudé
  2019-10-10 13:15 ` [PATCH v3 6/8] hw/isa/vt82c686: " Philippe Mathieu-Daudé
                   ` (3 subsequent siblings)
  8 siblings, 0 replies; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-10 13:15 UTC (permalink / raw)
  To: Eduardo Habkost, qemu-devel
  Cc: Peter Maydell, Aleksandar Markovic, qemu-block,
	Michael S. Tsirkin, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Li Qiang, qemu-arm, qemu-ppc, Igor Mammedov,
	Marc-André Lureau, John Snow

The VIA82C686B IDE controller is a PCI device, it will be reset
when the PCI bus it stands on is reset.

Convert its reset handler into a proper Device reset method.

Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 hw/ide/via.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/hw/ide/via.c b/hw/ide/via.c
index 7087dc676e..053622bd82 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -29,7 +29,6 @@
 #include "migration/vmstate.h"
 #include "qemu/module.h"
 #include "sysemu/dma.h"
-#include "sysemu/reset.h"
 
 #include "hw/ide/pci.h"
 #include "trace.h"
@@ -120,10 +119,10 @@ static void via_ide_set_irq(void *opaque, int n, int level)
     }
 }
 
-static void via_ide_reset(void *opaque)
+static void via_ide_reset(DeviceState *dev)
 {
-    PCIIDEState *d = opaque;
-    PCIDevice *pd = PCI_DEVICE(d);
+    PCIIDEState *d = PCI_IDE(dev);
+    PCIDevice *pd = PCI_DEVICE(dev);
     uint8_t *pci_conf = pd->config;
     int i;
 
@@ -172,8 +171,6 @@ static void via_ide_realize(PCIDevice *dev, Error **errp)
     pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0);
     dev->wmask[PCI_INTERRUPT_LINE] = 0xf;
 
-    qemu_register_reset(via_ide_reset, d);
-
     memory_region_init_io(&d->data_bar[0], OBJECT(d), &pci_ide_data_le_ops,
                           &d->bus[0], "via-ide0-data", 8);
     pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->data_bar[0]);
@@ -229,6 +226,7 @@ static void via_ide_class_init(ObjectClass *klass, void *data)
     DeviceClass *dc = DEVICE_CLASS(klass);
     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 
+    dc->reset = via_ide_reset;
     k->realize = via_ide_realize;
     k->exit = via_ide_exitfn;
     k->vendor_id = PCI_VENDOR_ID_VIA;
-- 
2.21.0



^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH v3 6/8] hw/isa/vt82c686: Convert reset handler to DeviceReset
  2019-10-10 13:15 [PATCH v3 0/8] hw: Convert various reset() handler to DeviceReset Philippe Mathieu-Daudé
                   ` (4 preceding siblings ...)
  2019-10-10 13:15 ` [PATCH v3 5/8] hw/ide/via82c: " Philippe Mathieu-Daudé
@ 2019-10-10 13:15 ` " Philippe Mathieu-Daudé
  2019-10-10 13:15 ` [PATCH v3 7/8] hw/input/lm832x: " Philippe Mathieu-Daudé
                   ` (2 subsequent siblings)
  8 siblings, 0 replies; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-10 13:15 UTC (permalink / raw)
  To: Eduardo Habkost, qemu-devel
  Cc: Peter Maydell, Aleksandar Markovic, qemu-block,
	Michael S. Tsirkin, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Li Qiang, qemu-arm, qemu-ppc, Igor Mammedov,
	Marc-André Lureau, John Snow

The VIA VT82C686 Southbridge is a PCI device, it will be reset
when the PCI bus it stands on is reset.

Convert its reset handler into a proper Device reset method.

Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 hw/isa/vt82c686.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index 50bd28fa82..616f67f347 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -23,7 +23,6 @@
 #include "hw/isa/apm.h"
 #include "hw/acpi/acpi.h"
 #include "hw/i2c/pm_smbus.h"
-#include "sysemu/reset.h"
 #include "qemu/module.h"
 #include "qemu/timer.h"
 #include "exec/address-spaces.h"
@@ -116,11 +115,10 @@ static const MemoryRegionOps superio_ops = {
     },
 };
 
-static void vt82c686b_reset(void * opaque)
+static void vt82c686b_isa_reset(DeviceState *dev)
 {
-    PCIDevice *d = opaque;
-    uint8_t *pci_conf = d->config;
-    VT82C686BState *vt82c = VT82C686B_DEVICE(d);
+    VT82C686BState *vt82c = VT82C686B_DEVICE(dev);
+    uint8_t *pci_conf = vt82c->dev.config;
 
     pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0);
     pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
@@ -476,8 +474,6 @@ static void vt82c686b_realize(PCIDevice *d, Error **errp)
      * But we do not emulate a floppy, so just set it here. */
     memory_region_add_subregion(isa_bus->address_space_io, 0x3f0,
                                 &vt82c->superio);
-
-    qemu_register_reset(vt82c686b_reset, d);
 }
 
 ISABus *vt82c686b_isa_init(PCIBus *bus, int devfn)
@@ -501,6 +497,7 @@ static void via_class_init(ObjectClass *klass, void *data)
     k->device_id = PCI_DEVICE_ID_VIA_ISA_BRIDGE;
     k->class_id = PCI_CLASS_BRIDGE_ISA;
     k->revision = 0x40;
+    dc->reset = vt82c686b_isa_reset;
     dc->desc = "ISA bridge";
     dc->vmsd = &vmstate_via;
     /*
-- 
2.21.0



^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH v3 7/8] hw/input/lm832x: Convert reset handler to DeviceReset
  2019-10-10 13:15 [PATCH v3 0/8] hw: Convert various reset() handler to DeviceReset Philippe Mathieu-Daudé
                   ` (5 preceding siblings ...)
  2019-10-10 13:15 ` [PATCH v3 6/8] hw/isa/vt82c686: " Philippe Mathieu-Daudé
@ 2019-10-10 13:15 ` " Philippe Mathieu-Daudé
  2019-10-10 13:15 ` [PATCH v3 8/8] hw/misc/vmcoreinfo: Add comment about reset handler Philippe Mathieu-Daudé
  2019-10-11  4:14 ` [PATCH v3 0/8] hw: Convert various reset() handler to DeviceReset Eduardo Habkost
  8 siblings, 0 replies; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-10 13:15 UTC (permalink / raw)
  To: Eduardo Habkost, qemu-devel
  Cc: Peter Maydell, Aleksandar Markovic, qemu-block,
	Michael S. Tsirkin, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Li Qiang, qemu-arm, qemu-ppc, Igor Mammedov,
	Marc-André Lureau, John Snow

The LM8323 key-scan controller is a I2C device, it will be reset
when the I2C bus it stands on is reset.

Convert its reset handler into a proper Device reset method.

Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 hw/input/lm832x.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/hw/input/lm832x.c b/hw/input/lm832x.c
index a37eb854b9..aa629ddbf1 100644
--- a/hw/input/lm832x.c
+++ b/hw/input/lm832x.c
@@ -24,7 +24,6 @@
 #include "migration/vmstate.h"
 #include "qemu/module.h"
 #include "qemu/timer.h"
-#include "sysemu/reset.h"
 #include "ui/console.h"
 
 #define TYPE_LM8323 "lm8323"
@@ -94,8 +93,10 @@ static void lm_kbd_gpio_update(LM823KbdState *s)
 {
 }
 
-static void lm_kbd_reset(LM823KbdState *s)
+static void lm_kbd_reset(DeviceState *dev)
 {
+    LM823KbdState *s = LM8323(dev);
+
     s->config = 0x80;
     s->status = INT_NOINIT;
     s->acttime = 125;
@@ -273,7 +274,7 @@ static void lm_kbd_write(LM823KbdState *s, int reg, int byte, uint8_t value)
 
     case LM832x_CMD_RESET:
         if (value == 0xaa)
-            lm_kbd_reset(s);
+            lm_kbd_reset(DEVICE(s));
         else
             lm_kbd_error(s, ERR_BADPAR);
         s->reg = LM832x_GENERAL_ERROR;
@@ -476,10 +477,6 @@ static void lm8323_realize(DeviceState *dev, Error **errp)
     s->pwm.tm[1] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm1_tick, s);
     s->pwm.tm[2] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm2_tick, s);
     qdev_init_gpio_out(dev, &s->nirq, 1);
-
-    lm_kbd_reset(s);
-
-    qemu_register_reset((void *) lm_kbd_reset, s);
 }
 
 void lm832x_key_event(DeviceState *dev, int key, int state)
@@ -507,6 +504,7 @@ static void lm8323_class_init(ObjectClass *klass, void *data)
     DeviceClass *dc = DEVICE_CLASS(klass);
     I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
 
+    dc->reset = lm_kbd_reset;
     dc->realize = lm8323_realize;
     k->event = lm_i2c_event;
     k->recv = lm_i2c_rx;
-- 
2.21.0



^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH v3 8/8] hw/misc/vmcoreinfo: Add comment about reset handler
  2019-10-10 13:15 [PATCH v3 0/8] hw: Convert various reset() handler to DeviceReset Philippe Mathieu-Daudé
                   ` (6 preceding siblings ...)
  2019-10-10 13:15 ` [PATCH v3 7/8] hw/input/lm832x: " Philippe Mathieu-Daudé
@ 2019-10-10 13:15 ` Philippe Mathieu-Daudé
  2019-10-11  4:14 ` [PATCH v3 0/8] hw: Convert various reset() handler to DeviceReset Eduardo Habkost
  8 siblings, 0 replies; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-10 13:15 UTC (permalink / raw)
  To: Eduardo Habkost, qemu-devel
  Cc: Peter Maydell, Aleksandar Markovic, qemu-block,
	Michael S. Tsirkin, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Li Qiang, qemu-arm, qemu-ppc, Igor Mammedov,
	Marc-André Lureau, John Snow

The VM coreinfo device does not sit on a bus, so it won't be
reset automatically. This is why it calls qemu_register_reset().

Add a comment about it, so we don't convert its reset handler
to a DeviceReset method.

Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 hw/misc/vmcoreinfo.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/hw/misc/vmcoreinfo.c b/hw/misc/vmcoreinfo.c
index 326a3ce8f4..a9d718fc23 100644
--- a/hw/misc/vmcoreinfo.c
+++ b/hw/misc/vmcoreinfo.c
@@ -61,6 +61,10 @@ static void vmcoreinfo_realize(DeviceState *dev, Error **errp)
                              NULL, fw_cfg_vmci_write, s,
                              &s->vmcoreinfo, sizeof(s->vmcoreinfo), false);
 
+    /*
+     * This device requires to register a global reset because it is
+     * not plugged to a bus (which, as its QOM parent, would reset it).
+     */
     qemu_register_reset(vmcoreinfo_reset, dev);
     vmcoreinfo_state = s;
 }
-- 
2.21.0



^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v3 3/8] hw/ide/piix: Convert reset handler to DeviceReset
  2019-10-10 13:15 ` [PATCH v3 3/8] hw/ide/piix: " Philippe Mathieu-Daudé
@ 2019-10-11  0:50   ` Li Qiang
  0 siblings, 0 replies; 11+ messages in thread
From: Li Qiang @ 2019-10-11  0:50 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Peter Maydell, Eduardo Habkost, qemu-block, Michael S. Tsirkin,
	Aleksandar Rikalo, Qemu Developers, Aleksandar Markovic,
	qemu-arm, qemu-ppc, Igor Mammedov, Marc-André Lureau,
	John Snow

[-- Attachment #1: Type: text/plain, Size: 2262 bytes --]

Philippe Mathieu-Daudé <philmd@redhat.com> 于2019年10月10日周四 下午9:16写道:

> The PIIX/IDE is a PCI device within a PIIX chipset, it will be reset
> when the PCI bus it stands on is reset.
>
> Convert its reset handler into a proper Device reset method.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>


Reviewed-by: Li Qiang <liq3ea@gmail.com>


> ---
> v3: Also convert PIIX4 (Li Qiang)
> ---
>  hw/ide/piix.c | 9 ++++-----
>  1 file changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/hw/ide/piix.c b/hw/ide/piix.c
> index fba6bc8bff..db313dd3b1 100644
> --- a/hw/ide/piix.c
> +++ b/hw/ide/piix.c
> @@ -30,7 +30,6 @@
>  #include "sysemu/block-backend.h"
>  #include "sysemu/blockdev.h"
>  #include "sysemu/dma.h"
> -#include "sysemu/reset.h"
>
>  #include "hw/ide/pci.h"
>  #include "trace.h"
> @@ -103,9 +102,9 @@ static void bmdma_setup_bar(PCIIDEState *d)
>      }
>  }
>
> -static void piix3_reset(void *opaque)
> +static void piix_ide_reset(DeviceState *dev)
>  {
> -    PCIIDEState *d = opaque;
> +    PCIIDEState *d = PCI_IDE(dev);
>      PCIDevice *pd = PCI_DEVICE(d);
>      uint8_t *pci_conf = pd->config;
>      int i;
> @@ -154,8 +153,6 @@ static void pci_piix_ide_realize(PCIDevice *dev, Error
> **errp)
>
>      pci_conf[PCI_CLASS_PROG] = 0x80; // legacy ATA mode
>
> -    qemu_register_reset(piix3_reset, d);
> -
>      bmdma_setup_bar(d);
>      pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar);
>
> @@ -247,6 +244,7 @@ static void piix3_ide_class_init(ObjectClass *klass,
> void *data)
>      DeviceClass *dc = DEVICE_CLASS(klass);
>      PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
>
> +    dc->reset = piix_ide_reset;
>      k->realize = pci_piix_ide_realize;
>      k->exit = pci_piix_ide_exitfn;
>      k->vendor_id = PCI_VENDOR_ID_INTEL;
> @@ -273,6 +271,7 @@ static void piix4_ide_class_init(ObjectClass *klass,
> void *data)
>      DeviceClass *dc = DEVICE_CLASS(klass);
>      PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
>
> +    dc->reset = piix_ide_reset;
>      k->realize = pci_piix_ide_realize;
>      k->exit = pci_piix_ide_exitfn;
>      k->vendor_id = PCI_VENDOR_ID_INTEL;
> --
> 2.21.0
>
>

[-- Attachment #2: Type: text/html, Size: 3133 bytes --]

<div dir="ltr"><div dir="ltr"><br></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">Philippe Mathieu-Daudé &lt;<a href="mailto:philmd@redhat.com">philmd@redhat.com</a>&gt; 于2019年10月10日周四 下午9:16写道:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">The PIIX/IDE is a PCI device within a PIIX chipset, it will be reset<br>
when the PCI bus it stands on is reset.<br>
<br>
Convert its reset handler into a proper Device reset method.<br>
<br>
Signed-off-by: Philippe Mathieu-Daudé &lt;<a href="mailto:philmd@redhat.com" target="_blank">philmd@redhat.com</a>&gt;<br></blockquote><div><br></div><div><br></div>Reviewed-by: Li Qiang &lt;<a href="mailto:liq3ea@gmail.com">liq3ea@gmail.com</a>&gt;<br><div> <br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
---<br>
v3: Also convert PIIX4 (Li Qiang)<br>
---<br>
 hw/ide/piix.c | 9 ++++-----<br>
 1 file changed, 4 insertions(+), 5 deletions(-)<br>
<br>
diff --git a/hw/ide/piix.c b/hw/ide/piix.c<br>
index fba6bc8bff..db313dd3b1 100644<br>
--- a/hw/ide/piix.c<br>
+++ b/hw/ide/piix.c<br>
@@ -30,7 +30,6 @@<br>
 #include &quot;sysemu/block-backend.h&quot;<br>
 #include &quot;sysemu/blockdev.h&quot;<br>
 #include &quot;sysemu/dma.h&quot;<br>
-#include &quot;sysemu/reset.h&quot;<br>
<br>
 #include &quot;hw/ide/pci.h&quot;<br>
 #include &quot;trace.h&quot;<br>
@@ -103,9 +102,9 @@ static void bmdma_setup_bar(PCIIDEState *d)<br>
     }<br>
 }<br>
<br>
-static void piix3_reset(void *opaque)<br>
+static void piix_ide_reset(DeviceState *dev)<br>
 {<br>
-    PCIIDEState *d = opaque;<br>
+    PCIIDEState *d = PCI_IDE(dev);<br>
     PCIDevice *pd = PCI_DEVICE(d);<br>
     uint8_t *pci_conf = pd-&gt;config;<br>
     int i;<br>
@@ -154,8 +153,6 @@ static void pci_piix_ide_realize(PCIDevice *dev, Error **errp)<br>
<br>
     pci_conf[PCI_CLASS_PROG] = 0x80; // legacy ATA mode<br>
<br>
-    qemu_register_reset(piix3_reset, d);<br>
-<br>
     bmdma_setup_bar(d);<br>
     pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &amp;d-&gt;bmdma_bar);<br>
<br>
@@ -247,6 +244,7 @@ static void piix3_ide_class_init(ObjectClass *klass, void *data)<br>
     DeviceClass *dc = DEVICE_CLASS(klass);<br>
     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);<br>
<br>
+    dc-&gt;reset = piix_ide_reset;<br>
     k-&gt;realize = pci_piix_ide_realize;<br>
     k-&gt;exit = pci_piix_ide_exitfn;<br>
     k-&gt;vendor_id = PCI_VENDOR_ID_INTEL;<br>
@@ -273,6 +271,7 @@ static void piix4_ide_class_init(ObjectClass *klass, void *data)<br>
     DeviceClass *dc = DEVICE_CLASS(klass);<br>
     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);<br>
<br>
+    dc-&gt;reset = piix_ide_reset;<br>
     k-&gt;realize = pci_piix_ide_realize;<br>
     k-&gt;exit = pci_piix_ide_exitfn;<br>
     k-&gt;vendor_id = PCI_VENDOR_ID_INTEL;<br>
-- <br>
2.21.0<br>
<br>
</blockquote></div></div>

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v3 0/8] hw: Convert various reset() handler to DeviceReset
  2019-10-10 13:15 [PATCH v3 0/8] hw: Convert various reset() handler to DeviceReset Philippe Mathieu-Daudé
                   ` (7 preceding siblings ...)
  2019-10-10 13:15 ` [PATCH v3 8/8] hw/misc/vmcoreinfo: Add comment about reset handler Philippe Mathieu-Daudé
@ 2019-10-11  4:14 ` Eduardo Habkost
  8 siblings, 0 replies; 11+ messages in thread
From: Eduardo Habkost @ 2019-10-11  4:14 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Peter Maydell, Aleksandar Markovic, qemu-block,
	Michael S. Tsirkin, Aleksandar Rikalo, Li Qiang, qemu-devel,
	qemu-arm, qemu-ppc, Igor Mammedov, Marc-André Lureau,
	John Snow

Queueing on machine-next.  Thanks!

On Thu, Oct 10, 2019 at 03:15:19PM +0200, Philippe Mathieu-Daudé wrote:
> Only patch 3/8 is missing review:
> - hw/ide/piix: Convert reset handler to DeviceReset
> 
> Since v2:
> - Fixed PIIX_IDE conversion (Li)
> - Added more R-b tag.
> 
> Since v1:
> - Removed the pci-host devices
> - Removed the vmcoreinfo conversion (elmarco) but add a comment.
> - Added Igor's R-b tag.
> 
> Following the thread discussion between Peter/Markus/Damien about
> reset handlers:
> https://www.mail-archive.com/qemu-devel@nongnu.org/msg617103.html
> I started to remove qemu_register_reset() calls from few qdevified
> devices (the trivial ones).
> 
> Regards,
> 
> Phil.
> 
> v2: https://lists.gnu.org/archive/html/qemu-devel/2019-10/msg01677.html
> v1: https://lists.gnu.org/archive/html/qemu-devel/2019-09/msg06367.html
> 
> Philippe Mathieu-Daudé (8):
>   hw/acpi/piix4: Convert reset handler to DeviceReset
>   hw/isa/piix4: Convert reset handler to DeviceReset
>   hw/ide/piix: Convert reset handler to DeviceReset
>   hw/ide/sii3112: Convert reset handler to DeviceReset
>   hw/ide/via82c: Convert reset handler to DeviceReset
>   hw/isa/vt82c686: Convert reset handler to DeviceReset
>   hw/input/lm832x: Convert reset handler to DeviceReset
>   hw/misc/vmcoreinfo: Add comment about reset handler
> 
>  hw/acpi/piix4.c      |  7 +++----
>  hw/ide/piix.c        |  9 ++++-----
>  hw/ide/sii3112.c     |  7 +++----
>  hw/ide/via.c         | 10 ++++------
>  hw/input/lm832x.c    | 12 +++++-------
>  hw/isa/piix4.c       |  7 +++----
>  hw/isa/vt82c686.c    | 11 ++++-------
>  hw/misc/vmcoreinfo.c |  4 ++++
>  8 files changed, 30 insertions(+), 37 deletions(-)
> 
> -- 
> 2.21.0
> 

-- 
Eduardo


^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, back to index

Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-10-10 13:15 [PATCH v3 0/8] hw: Convert various reset() handler to DeviceReset Philippe Mathieu-Daudé
2019-10-10 13:15 ` [PATCH v3 1/8] hw/acpi/piix4: Convert reset " Philippe Mathieu-Daudé
2019-10-10 13:15 ` [PATCH v3 2/8] hw/isa/piix4: " Philippe Mathieu-Daudé
2019-10-10 13:15 ` [PATCH v3 3/8] hw/ide/piix: " Philippe Mathieu-Daudé
2019-10-11  0:50   ` Li Qiang
2019-10-10 13:15 ` [PATCH v3 4/8] hw/ide/sii3112: " Philippe Mathieu-Daudé
2019-10-10 13:15 ` [PATCH v3 5/8] hw/ide/via82c: " Philippe Mathieu-Daudé
2019-10-10 13:15 ` [PATCH v3 6/8] hw/isa/vt82c686: " Philippe Mathieu-Daudé
2019-10-10 13:15 ` [PATCH v3 7/8] hw/input/lm832x: " Philippe Mathieu-Daudé
2019-10-10 13:15 ` [PATCH v3 8/8] hw/misc/vmcoreinfo: Add comment about reset handler Philippe Mathieu-Daudé
2019-10-11  4:14 ` [PATCH v3 0/8] hw: Convert various reset() handler to DeviceReset Eduardo Habkost

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