* [PULL 01/14] MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer
2020-05-26 13:32 [PULL 00/14] mips-hw-next patches for 2020-05-26 Philippe Mathieu-Daudé
@ 2020-05-26 13:32 ` Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 02/14] hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North Bridge Philippe Mathieu-Daudé
` (13 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-26 13:32 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Aleksandar Rikalo, libvir-list, Thomas Huth,
Jiaxun Yang, Philippe Mathieu-Daudé,
Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
Philippe Mathieu-Daudé,
Aurelien Jarno
From: Huacai Chen <chenhc@lemote.com>
I submitted the MIPS/fuloong2e support about ten years ago, and
after that I became a MIPS kernel developer. Last year, Philippe
Mathieu- Daudé asked me that whether I can be a reviewer of
MIPS/fuloong2e, and I promised that I will do some QEMU work in
the next year (i.e., 2020 and later). I think now (and also in
future) I can have some spare time, so I can finally do some real
work on QEMU/MIPS. And if possible, I hope I can be a co-maintainer
of MIPS/fuloong2e.
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Message-Id: <1586337380-25217-3-git-send-email-chenhc@lemote.com>
[PMD: Added Jiaxun Yang as reviewer]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-Id: <20200510210128.18343-2-f4bug@amsat.org>
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 3690f313c3..8f597aae12 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1082,8 +1082,10 @@ S: Obsolete
F: hw/mips/mips_r4k.c
Fulong 2E
+M: Huacai Chen <chenhc@lemote.com>
M: Philippe Mathieu-Daudé <f4bug@amsat.org>
M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
+R: Jiaxun Yang <jiaxun.yang@flygoat.com>
S: Odd Fixes
F: hw/mips/mips_fulong2e.c
F: hw/isa/vt82c686.c
--
2.21.3
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 02/14] hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North Bridge
2020-05-26 13:32 [PULL 00/14] mips-hw-next patches for 2020-05-26 Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 01/14] MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer Philippe Mathieu-Daudé
@ 2020-05-26 13:32 ` Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 03/14] hw/pci-host/bonito: Fix DPRINTF() format strings Philippe Mathieu-Daudé
` (12 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-26 13:32 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Aleksandar Rikalo, libvir-list, Thomas Huth,
Jiaxun Yang, Philippe Mathieu-Daudé,
Aleksandar Markovic, Aleksandar Markovic, Huacai Chen,
Paolo Bonzini, Philippe Mathieu-Daudé,
Aurelien Jarno
From: Philippe Mathieu-Daudé <philmd@redhat.com>
Ease the kconfig selection by introducing CONFIG_PCI_BONITO to select
the Bonito North Bridge.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: <20200510210128.18343-6-f4bug@amsat.org>
Reviewed-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/mips/Kconfig | 1 +
hw/pci-host/Kconfig | 4 ++++
hw/pci-host/Makefile.objs | 2 +-
3 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
index 2c2adbc42a..2240504dff 100644
--- a/hw/mips/Kconfig
+++ b/hw/mips/Kconfig
@@ -43,6 +43,7 @@ config JAZZ
config FULONG
bool
+ select PCI_BONITO
config MIPS_CPS
bool
diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig
index 9642c77e98..8db41edc7e 100644
--- a/hw/pci-host/Kconfig
+++ b/hw/pci-host/Kconfig
@@ -55,3 +55,7 @@ config PCI_EXPRESS_DESIGNWARE
bool
select PCI_EXPRESS
select MSI_NONBROKEN
+
+config PCI_BONITO
+ select PCI
+ bool
diff --git a/hw/pci-host/Makefile.objs b/hw/pci-host/Makefile.objs
index 8c87e8494d..e422e0aca0 100644
--- a/hw/pci-host/Makefile.objs
+++ b/hw/pci-host/Makefile.objs
@@ -12,7 +12,7 @@ common-obj-$(CONFIG_PPCE500_PCI) += ppce500.o
common-obj-$(CONFIG_VERSATILE_PCI) += versatile.o
common-obj-$(CONFIG_PCI_SABRE) += sabre.o
-common-obj-$(CONFIG_FULONG) += bonito.o
+common-obj-$(CONFIG_PCI_BONITO) += bonito.o
common-obj-$(CONFIG_PCI_I440FX) += i440fx.o
common-obj-$(CONFIG_XEN_IGD_PASSTHROUGH) += xen_igd_pt.o
common-obj-$(CONFIG_PCI_EXPRESS_Q35) += q35.o
--
2.21.3
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 03/14] hw/pci-host/bonito: Fix DPRINTF() format strings
2020-05-26 13:32 [PULL 00/14] mips-hw-next patches for 2020-05-26 Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 01/14] MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 02/14] hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North Bridge Philippe Mathieu-Daudé
@ 2020-05-26 13:32 ` Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 04/14] hw/pci-host/bonito: Map peripheral using physical address Philippe Mathieu-Daudé
` (11 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-26 13:32 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Aleksandar Rikalo, libvir-list, Thomas Huth,
Jiaxun Yang, Philippe Mathieu-Daudé,
Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
Philippe Mathieu-Daudé,
Aurelien Jarno
Reviewed-by: Huacai Chen <chenhc@lemote.com>
Message-id: <20200510210128.18343-7-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/pci-host/bonito.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index f212796044..b874468ea6 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -239,7 +239,7 @@ static void bonito_writel(void *opaque, hwaddr addr,
saddr = addr >> 2;
- DPRINTF("bonito_writel "TARGET_FMT_plx" val %x saddr %x\n",
+ DPRINTF("bonito_writel "TARGET_FMT_plx" val %lx saddr %x\n",
addr, val, saddr);
switch (saddr) {
case BONITO_BONPONCFG:
@@ -327,7 +327,7 @@ static void bonito_pciconf_writel(void *opaque, hwaddr addr,
PCIBonitoState *s = opaque;
PCIDevice *d = PCI_DEVICE(s);
- DPRINTF("bonito_pciconf_writel "TARGET_FMT_plx" val %x\n", addr, val);
+ DPRINTF("bonito_pciconf_writel "TARGET_FMT_plx" val %lx\n", addr, val);
d->config_write(d, addr, val, 4);
}
@@ -474,7 +474,7 @@ static void bonito_spciconf_write(void *opaque, hwaddr addr, uint64_t val,
uint32_t pciaddr;
uint16_t status;
- DPRINTF("bonito_spciconf_write "TARGET_FMT_plx" size %d val %x\n",
+ DPRINTF("bonito_spciconf_write "TARGET_FMT_plx" size %d val %lx\n",
addr, size, val);
pciaddr = bonito_sbridge_pciaddr(s, addr);
--
2.21.3
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 04/14] hw/pci-host/bonito: Map peripheral using physical address
2020-05-26 13:32 [PULL 00/14] mips-hw-next patches for 2020-05-26 Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2020-05-26 13:32 ` [PULL 03/14] hw/pci-host/bonito: Fix DPRINTF() format strings Philippe Mathieu-Daudé
@ 2020-05-26 13:32 ` Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 05/14] hw/pci-host/bonito: Map all the Bonito64 I/O range Philippe Mathieu-Daudé
` (10 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-26 13:32 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Aleksandar Rikalo, libvir-list, Thomas Huth,
Jiaxun Yang, Philippe Mathieu-Daudé,
Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
Philippe Mathieu-Daudé,
Aurelien Jarno
Peripherals are mapped at physical address on busses.
Only CPU/IOMMU can use virtual addresses.
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-id: <20200510210128.18343-8-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/pci-host/bonito.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index b874468ea6..b90e5a636d 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -647,12 +647,12 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
memory_region_init_io(&s->iomem_ldma, OBJECT(s), &bonito_ldma_ops, s,
"ldma", 0x100);
sysbus_init_mmio(sysbus, &s->iomem_ldma);
- sysbus_mmio_map(sysbus, 3, 0xbfe00200);
+ sysbus_mmio_map(sysbus, 3, 0x1fe00200);
memory_region_init_io(&s->iomem_cop, OBJECT(s), &bonito_cop_ops, s,
"cop", 0x100);
sysbus_init_mmio(sysbus, &s->iomem_cop);
- sysbus_mmio_map(sysbus, 4, 0xbfe00300);
+ sysbus_mmio_map(sysbus, 4, 0x1fe00300);
/* Map PCI IO Space 0x1fd0 0000 - 0x1fd1 0000 */
memory_region_init_alias(&s->bonito_pciio, OBJECT(s), "isa_mmio",
--
2.21.3
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 05/14] hw/pci-host/bonito: Map all the Bonito64 I/O range
2020-05-26 13:32 [PULL 00/14] mips-hw-next patches for 2020-05-26 Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2020-05-26 13:32 ` [PULL 04/14] hw/pci-host/bonito: Map peripheral using physical address Philippe Mathieu-Daudé
@ 2020-05-26 13:32 ` Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 06/14] hw/pci-host/bonito: Map the different PCI ranges more detailed Philippe Mathieu-Daudé
` (9 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-26 13:32 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Aleksandar Rikalo, libvir-list, Thomas Huth,
Jiaxun Yang, Philippe Mathieu-Daudé,
Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
Philippe Mathieu-Daudé,
Aurelien Jarno
To ease following guest accesses to the Bonito64 chipset,
map its I/O range as UnimplementedDevice.
We can now see the accesses to unimplemented peripheral
using the '-d unimp' command line option.
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-id: <20200510210128.18343-9-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/pci-host/bonito.c | 3 +++
hw/pci-host/Kconfig | 1 +
2 files changed, 4 insertions(+)
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index b90e5a636d..f09bb1c6a8 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -48,6 +48,7 @@
#include "sysemu/reset.h"
#include "sysemu/runstate.h"
#include "exec/address-spaces.h"
+#include "hw/misc/unimp.h"
/* #define DEBUG_BONITO */
@@ -644,6 +645,8 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
sysbus_init_mmio(sysbus, &phb->data_mem);
sysbus_mmio_map(sysbus, 2, BONITO_SPCICONFIG_BASE);
+ create_unimplemented_device("bonito", BONITO_REG_BASE, BONITO_REG_SIZE);
+
memory_region_init_io(&s->iomem_ldma, OBJECT(s), &bonito_ldma_ops, s,
"ldma", 0x100);
sysbus_init_mmio(sysbus, &s->iomem_ldma);
diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig
index 8db41edc7e..036a61877a 100644
--- a/hw/pci-host/Kconfig
+++ b/hw/pci-host/Kconfig
@@ -58,4 +58,5 @@ config PCI_EXPRESS_DESIGNWARE
config PCI_BONITO
select PCI
+ select UNIMP
bool
--
2.21.3
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 06/14] hw/pci-host/bonito: Map the different PCI ranges more detailed
2020-05-26 13:32 [PULL 00/14] mips-hw-next patches for 2020-05-26 Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2020-05-26 13:32 ` [PULL 05/14] hw/pci-host/bonito: Map all the Bonito64 I/O range Philippe Mathieu-Daudé
@ 2020-05-26 13:32 ` Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 07/14] hw/pci-host/bonito: Better describe the I/O CS regions Philippe Mathieu-Daudé
` (8 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-26 13:32 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Aleksandar Rikalo, libvir-list, Thomas Huth,
Jiaxun Yang, Philippe Mathieu-Daudé,
Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
Philippe Mathieu-Daudé,
Aurelien Jarno
Better describe the Bonito64 MEM HI/LO and I/O PCI ranges,
add more PCI regions as unimplemented.
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-id: <20200526104726.11273-7-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/pci-host/bonito.c | 32 ++++++++++++++++++++++++++++----
1 file changed, 28 insertions(+), 4 deletions(-)
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index f09bb1c6a8..52015cc2a7 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -39,6 +39,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "hw/pci/pci.h"
#include "hw/irq.h"
@@ -82,7 +83,7 @@
#define BONITO_PCILO1_BASE 0x14000000
#define BONITO_PCILO2_BASE 0x18000000
#define BONITO_PCIHI_BASE 0x20000000
-#define BONITO_PCIHI_SIZE 0x20000000
+#define BONITO_PCIHI_SIZE 0x60000000
#define BONITO_PCIHI_TOP (BONITO_PCIHI_BASE + BONITO_PCIHI_SIZE - 1)
#define BONITO_PCIIO_BASE 0x1fd00000
#define BONITO_PCIIO_BASE_VA 0xbfd00000
@@ -605,14 +606,26 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
{
PCIHostState *phb = PCI_HOST_BRIDGE(dev);
BonitoState *bs = BONITO_PCI_HOST_BRIDGE(dev);
+ MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 3);
- memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCILO_SIZE);
+ memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCIHI_SIZE);
phb->bus = pci_register_root_bus(dev, "pci",
pci_bonito_set_irq, pci_bonito_map_irq,
dev, &bs->pci_mem, get_system_io(),
0x28, 32, TYPE_PCI_BUS);
- memory_region_add_subregion(get_system_memory(), BONITO_PCILO_BASE,
- &bs->pci_mem);
+
+ for (size_t i = 0; i < 3; i++) {
+ char *name = g_strdup_printf("pci.lomem%zu", i);
+
+ memory_region_init_alias(&pcimem_lo_alias[i], NULL, name,
+ &bs->pci_mem, i * 64 * MiB, 64 * MiB);
+ memory_region_add_subregion(get_system_memory(),
+ BONITO_PCILO_BASE + i * 64 * MiB,
+ &pcimem_lo_alias[i]);
+ g_free(name);
+ }
+
+ create_unimplemented_device("pci.io", BONITO_PCIIO_BASE, 1 * MiB);
}
static void bonito_realize(PCIDevice *dev, Error **errp)
@@ -620,6 +633,8 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
PCIBonitoState *s = PCI_BONITO(dev);
SysBusDevice *sysbus = SYS_BUS_DEVICE(s->pcihost);
PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
+ BonitoState *bs = BONITO_PCI_HOST_BRIDGE(s->pcihost);
+ MemoryRegion *pcimem_alias = g_new(MemoryRegion, 1);
/*
* Bonito North Bridge, built on FPGA,
@@ -652,6 +667,7 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
sysbus_init_mmio(sysbus, &s->iomem_ldma);
sysbus_mmio_map(sysbus, 3, 0x1fe00200);
+ /* PCI copier */
memory_region_init_io(&s->iomem_cop, OBJECT(s), &bonito_cop_ops, s,
"cop", 0x100);
sysbus_init_mmio(sysbus, &s->iomem_cop);
@@ -669,6 +685,14 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
sysbus_init_mmio(sysbus, &s->bonito_localio);
sysbus_mmio_map(sysbus, 6, BONITO_DEV_BASE);
+ memory_region_init_alias(pcimem_alias, NULL, "pci.mem.alias",
+ &bs->pci_mem, 0, BONITO_PCIHI_SIZE);
+ memory_region_add_subregion(get_system_memory(),
+ BONITO_PCIHI_BASE, pcimem_alias);
+ create_unimplemented_device("PCI_2",
+ (hwaddr)BONITO_PCIHI_BASE + BONITO_PCIHI_SIZE,
+ 2 * GiB);
+
/* set the default value of north bridge pci config */
pci_set_word(dev->config + PCI_COMMAND, 0x0000);
pci_set_word(dev->config + PCI_STATUS, 0x0000);
--
2.21.3
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 07/14] hw/pci-host/bonito: Better describe the I/O CS regions
2020-05-26 13:32 [PULL 00/14] mips-hw-next patches for 2020-05-26 Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2020-05-26 13:32 ` [PULL 06/14] hw/pci-host/bonito: Map the different PCI ranges more detailed Philippe Mathieu-Daudé
@ 2020-05-26 13:32 ` Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 08/14] hw/pci-host/bonito: Set the Config register reset value with FIELD_DP32 Philippe Mathieu-Daudé
` (7 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-26 13:32 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Aleksandar Rikalo, libvir-list, Thomas Huth,
Jiaxun Yang, Philippe Mathieu-Daudé,
Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
Philippe Mathieu-Daudé,
Aurelien Jarno
Better describe the I/O CS regions, add the ROMCS region.
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-id: <20200510210128.18343-11-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/pci-host/bonito.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 52015cc2a7..20f2797a73 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -673,6 +673,8 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
sysbus_init_mmio(sysbus, &s->iomem_cop);
sysbus_mmio_map(sysbus, 4, 0x1fe00300);
+ create_unimplemented_device("ROMCS", BONITO_FLASH_BASE, 60 * MiB);
+
/* Map PCI IO Space 0x1fd0 0000 - 0x1fd1 0000 */
memory_region_init_alias(&s->bonito_pciio, OBJECT(s), "isa_mmio",
get_system_io(), 0, BONITO_PCIIO_SIZE);
@@ -680,10 +682,17 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
sysbus_mmio_map(sysbus, 5, BONITO_PCIIO_BASE);
/* add pci local io mapping */
- memory_region_init_alias(&s->bonito_localio, OBJECT(s), "isa_mmio",
- get_system_io(), 0, BONITO_DEV_SIZE);
+
+ memory_region_init_alias(&s->bonito_localio, OBJECT(s), "IOCS[0]",
+ get_system_io(), 0, 256 * KiB);
sysbus_init_mmio(sysbus, &s->bonito_localio);
sysbus_mmio_map(sysbus, 6, BONITO_DEV_BASE);
+ create_unimplemented_device("IOCS[1]", BONITO_DEV_BASE + 1 * 256 * KiB,
+ 256 * KiB);
+ create_unimplemented_device("IOCS[2]", BONITO_DEV_BASE + 2 * 256 * KiB,
+ 256 * KiB);
+ create_unimplemented_device("IOCS[3]", BONITO_DEV_BASE + 3 * 256 * KiB,
+ 256 * KiB);
memory_region_init_alias(pcimem_alias, NULL, "pci.mem.alias",
&bs->pci_mem, 0, BONITO_PCIHI_SIZE);
--
2.21.3
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 08/14] hw/pci-host/bonito: Set the Config register reset value with FIELD_DP32
2020-05-26 13:32 [PULL 00/14] mips-hw-next patches for 2020-05-26 Philippe Mathieu-Daudé
` (6 preceding siblings ...)
2020-05-26 13:32 ` [PULL 07/14] hw/pci-host/bonito: Better describe the I/O CS regions Philippe Mathieu-Daudé
@ 2020-05-26 13:32 ` Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 09/14] hw/mips/fuloong2e: Move code and update a comment Philippe Mathieu-Daudé
` (6 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-26 13:32 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Aleksandar Rikalo, libvir-list, Thomas Huth,
Jiaxun Yang, Philippe Mathieu-Daudé,
Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
Philippe Mathieu-Daudé,
Aurelien Jarno
Describe some bits of the Config registers fields with the
registerfields API. Use the FIELD_DP32() macro to set the
BONGENCFG register bits at reset.
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-id: <20200510210128.18343-12-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/pci-host/bonito.c | 21 ++++++++++++++++++++-
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 20f2797a73..d0201ce59e 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -50,6 +50,7 @@
#include "sysemu/runstate.h"
#include "exec/address-spaces.h"
#include "hw/misc/unimp.h"
+#include "hw/registerfields.h"
/* #define DEBUG_BONITO */
@@ -112,8 +113,19 @@
/* Power on register */
#define BONITO_BONPONCFG (0x00 >> 2) /* 0x100 */
+
+/* PCI configuration register */
#define BONITO_BONGENCFG_OFFSET 0x4
#define BONITO_BONGENCFG (BONITO_BONGENCFG_OFFSET >> 2) /*0x104 */
+REG32(BONGENCFG, 0x104)
+FIELD(BONGENCFG, DEBUGMODE, 0, 1)
+FIELD(BONGENCFG, SNOOP, 1, 1)
+FIELD(BONGENCFG, CPUSELFRESET, 2, 1)
+FIELD(BONGENCFG, BYTESWAP, 6, 1)
+FIELD(BONGENCFG, UNCACHED, 7, 1)
+FIELD(BONGENCFG, PREFETCH, 8, 1)
+FIELD(BONGENCFG, WRITEBEHIND, 9, 1)
+FIELD(BONGENCFG, PCIQUEUE, 12, 1)
/* 2. IO & IDE configuration */
#define BONITO_IODEVCFG (0x08 >> 2) /* 0x108 */
@@ -577,11 +589,18 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
static void bonito_reset(void *opaque)
{
PCIBonitoState *s = opaque;
+ uint32_t val = 0;
/* set the default value of north bridge registers */
s->regs[BONITO_BONPONCFG] = 0xc40;
- s->regs[BONITO_BONGENCFG] = 0x1384;
+ val = FIELD_DP32(val, BONGENCFG, PCIQUEUE, 1);
+ val = FIELD_DP32(val, BONGENCFG, WRITEBEHIND, 1);
+ val = FIELD_DP32(val, BONGENCFG, PREFETCH, 1);
+ val = FIELD_DP32(val, BONGENCFG, UNCACHED, 1);
+ val = FIELD_DP32(val, BONGENCFG, CPUSELFRESET, 1);
+ s->regs[BONITO_BONGENCFG] = val;
+
s->regs[BONITO_IODEVCFG] = 0x2bff8010;
s->regs[BONITO_SDCFG] = 0x255e0091;
--
2.21.3
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 09/14] hw/mips/fuloong2e: Move code and update a comment
2020-05-26 13:32 [PULL 00/14] mips-hw-next patches for 2020-05-26 Philippe Mathieu-Daudé
` (7 preceding siblings ...)
2020-05-26 13:32 ` [PULL 08/14] hw/pci-host/bonito: Set the Config register reset value with FIELD_DP32 Philippe Mathieu-Daudé
@ 2020-05-26 13:32 ` Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 10/14] hw/mips/fuloong2e: Fix typo in Fuloong machine name Philippe Mathieu-Daudé
` (5 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-26 13:32 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Aleksandar Rikalo, libvir-list, Thomas Huth,
Jiaxun Yang, Philippe Mathieu-Daudé,
Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
Philippe Mathieu-Daudé,
Aurelien Jarno
Move the RAM-related call closer to the RAM creation block,
rename the ROM comment.
Reviewed-by: Huacai Chen <chenhc@lemote.com>
Message-id: <20200510210128.18343-4-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/mips/mips_fulong2e.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index 05b9efa516..6996f5e3d1 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -315,12 +315,11 @@ static void mips_fulong2e_init(MachineState *machine)
error_report("Invalid RAM size, should be 256MB");
exit(EXIT_FAILURE);
}
+ memory_region_add_subregion(address_space_mem, 0, machine->ram);
- /* allocate RAM */
+ /* Boot ROM */
memory_region_init_rom(bios, NULL, "fulong2e.bios", BIOS_SIZE,
&error_fatal);
-
- memory_region_add_subregion(address_space_mem, 0, machine->ram);
memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
/*
--
2.21.3
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 10/14] hw/mips/fuloong2e: Fix typo in Fuloong machine name
2020-05-26 13:32 [PULL 00/14] mips-hw-next patches for 2020-05-26 Philippe Mathieu-Daudé
` (8 preceding siblings ...)
2020-05-26 13:32 ` [PULL 09/14] hw/mips/fuloong2e: Move code and update a comment Philippe Mathieu-Daudé
@ 2020-05-26 13:32 ` Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 11/14] hw/mips: Rename malta/mipssim/r4k/jazz files Philippe Mathieu-Daudé
` (4 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-26 13:32 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Aleksandar Rikalo, libvir-list, Thomas Huth,
Jiaxun Yang, Philippe Mathieu-Daudé,
Aleksandar Markovic, Aleksandar Markovic, Huacai Chen,
Paolo Bonzini, Philippe Mathieu-Daudé,
Aurelien Jarno
We always miswrote the Fuloong machine... Fix its name.
Add an machine alias to the previous name for backward
compatibility.
Suggested-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-id: <20200526104726.11273-11-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
docs/system/deprecated.rst | 5 +++
docs/system/target-mips.rst | 2 +-
default-configs/mips64el-softmmu.mak | 2 +-
hw/isa/vt82c686.c | 2 +-
hw/mips/{mips_fulong2e.c => fuloong2e.c} | 41 ++++++++++++------------
hw/pci-host/bonito.c | 8 ++---
tests/qtest/endianness-test.c | 2 +-
MAINTAINERS | 4 +--
hw/mips/Kconfig | 2 +-
hw/mips/Makefile.objs | 2 +-
10 files changed, 38 insertions(+), 32 deletions(-)
rename hw/mips/{mips_fulong2e.c => fuloong2e.c} (91%)
diff --git a/docs/system/deprecated.rst b/docs/system/deprecated.rst
index 3142fac386..f0061f94aa 100644
--- a/docs/system/deprecated.rst
+++ b/docs/system/deprecated.rst
@@ -368,6 +368,11 @@ mips ``r4k`` platform (since 5.0)
This machine type is very old and unmaintained. Users should use the ``malta``
machine type instead.
+mips ``fulong2e`` machine (since 5.1)
+'''''''''''''''''''''''''''''''''''''
+
+This machine has been renamed ``fuloong2e``.
+
``pc-1.0``, ``pc-1.1``, ``pc-1.2`` and ``pc-1.3`` (since 5.0)
'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
diff --git a/docs/system/target-mips.rst b/docs/system/target-mips.rst
index 2736fd0509..cd2a931edf 100644
--- a/docs/system/target-mips.rst
+++ b/docs/system/target-mips.rst
@@ -74,7 +74,7 @@ The MIPS Magnum R4000 emulation supports:
- G364 framebuffer
-The Fulong 2E emulation supports:
+The Fuloong 2E emulation supports:
- Loongson 2E CPU
diff --git a/default-configs/mips64el-softmmu.mak b/default-configs/mips64el-softmmu.mak
index 8b0c9b1e15..9f8a3ef156 100644
--- a/default-configs/mips64el-softmmu.mak
+++ b/default-configs/mips64el-softmmu.mak
@@ -2,7 +2,7 @@
include mips-softmmu-common.mak
CONFIG_IDE_VIA=y
-CONFIG_FULONG=y
+CONFIG_FULOONG=y
CONFIG_ATI_VGA=y
CONFIG_RTL8139_PCI=y
CONFIG_JAZZ=y
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index d9b51fce8d..fac4e56b7d 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -503,7 +503,7 @@ static void via_class_init(ObjectClass *klass, void *data)
dc->vmsd = &vmstate_via;
/*
* Reason: part of VIA VT82C686 southbridge, needs to be wired up,
- * e.g. by mips_fulong2e_init()
+ * e.g. by mips_fuloong2e_init()
*/
dc->user_creatable = false;
}
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/fuloong2e.c
similarity index 91%
rename from hw/mips/mips_fulong2e.c
rename to hw/mips/fuloong2e.c
index 6996f5e3d1..f583c44b79 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -1,5 +1,5 @@
/*
- * QEMU fulong 2e mini pc support
+ * QEMU fuloong 2e mini pc support
*
* Copyright (c) 2008 yajin (yajin@vm-kernel.org)
* Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
@@ -11,8 +11,8 @@
*/
/*
- * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
- * http://www.linux-mips.org/wiki/Fulong
+ * Fuloong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
+ * https://www.linux-mips.org/wiki/Fuloong_2E
*
* Loongson 2e user manual:
* http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
@@ -45,13 +45,13 @@
#include "sysemu/reset.h"
#include "qemu/error-report.h"
-#define DEBUG_FULONG2E_INIT
+#define DEBUG_FULOONG2E_INIT
#define ENVP_ADDR 0x80002000l
#define ENVP_NB_ENTRIES 16
#define ENVP_ENTRY_SIZE 256
-/* fulong 2e has a 512k flash: Winbond W39L040AP70Z */
+/* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */
#define BIOS_SIZE (512 * KiB)
#define MAX_IDE_BUS 2
@@ -68,12 +68,12 @@
* 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
* in the "Compile Guide".
*/
-#define FULONG_BIOSNAME "pmon_fulong2e.bin"
+#define FULOONG_BIOSNAME "pmon_2e.bin"
-/* PCI SLOT in fulong 2e */
-#define FULONG2E_VIA_SLOT 5
-#define FULONG2E_ATI_SLOT 6
-#define FULONG2E_RTL8139_SLOT 7
+/* PCI SLOT in Fuloong 2e */
+#define FULOONG2E_VIA_SLOT 5
+#define FULOONG2E_ATI_SLOT 6
+#define FULOONG2E_RTL8139_SLOT 7
static struct _loaderparams {
int ram_size;
@@ -278,7 +278,7 @@ static void network_init(PCIBus *pci_bus)
const char *default_devaddr = NULL;
if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
- /* The fulong board has a RTL8139 card using PCI SLOT 7 */
+ /* The Fuloong board has a RTL8139 card using PCI SLOT 7 */
default_devaddr = "07";
}
@@ -286,7 +286,7 @@ static void network_init(PCIBus *pci_bus)
}
}
-static void mips_fulong2e_init(MachineState *machine)
+static void mips_fuloong2e_init(MachineState *machine)
{
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
@@ -318,7 +318,7 @@ static void mips_fulong2e_init(MachineState *machine)
memory_region_add_subregion(address_space_mem, 0, machine->ram);
/* Boot ROM */
- memory_region_init_rom(bios, NULL, "fulong2e.bios", BIOS_SIZE,
+ memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
&error_fatal);
memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
@@ -336,7 +336,7 @@ static void mips_fulong2e_init(MachineState *machine)
write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
} else {
if (bios_name == NULL) {
- bios_name = FULONG_BIOSNAME;
+ bios_name = FULOONG_BIOSNAME;
}
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
if (filename) {
@@ -362,7 +362,7 @@ static void mips_fulong2e_init(MachineState *machine)
pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
/* South bridge -> IP5 */
- vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],
+ vt82c686b_southbridge_init(pci_bus, FULOONG2E_VIA_SLOT, env->irq[5],
&smbus, &isa_bus);
/* GPU */
@@ -383,14 +383,15 @@ static void mips_fulong2e_init(MachineState *machine)
network_init(pci_bus);
}
-static void mips_fulong2e_machine_init(MachineClass *mc)
+static void mips_fuloong2e_machine_init(MachineClass *mc)
{
- mc->desc = "Fulong 2e mini pc";
- mc->init = mips_fulong2e_init;
+ mc->desc = "Fuloong 2e mini pc";
+ mc->alias = "fulong2e"; /* Incorrect name used up to QEMU 4.2 */
+ mc->init = mips_fuloong2e_init;
mc->block_default_type = IF_IDE;
mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
mc->default_ram_size = 256 * MiB;
- mc->default_ram_id = "fulong2e.ram";
+ mc->default_ram_id = "fuloong2e.ram";
}
-DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)
+DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init)
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index d0201ce59e..f9697dcc43 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -11,7 +11,7 @@
*/
/*
- * fulong 2e mini pc has a bonito north bridge.
+ * fuloong 2e mini pc has a bonito north bridge.
*/
/*
@@ -573,11 +573,11 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
slot = (pci_dev->devfn >> 3);
switch (slot) {
- case 5: /* FULONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
+ case 5: /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
return irq_num % 4 + BONITO_IRQ_BASE;
- case 6: /* FULONG2E_ATI_SLOT, VGA */
+ case 6: /* FULOONG2E_ATI_SLOT, VGA */
return 4 + BONITO_IRQ_BASE;
- case 7: /* FULONG2E_RTL_SLOT, RTL8139 */
+ case 7: /* FULOONG2E_RTL_SLOT, RTL8139 */
return 5 + BONITO_IRQ_BASE;
case 8 ... 12: /* PCI slot 1 to 4 */
return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
diff --git a/tests/qtest/endianness-test.c b/tests/qtest/endianness-test.c
index 2798802c63..cc088ac01a 100644
--- a/tests/qtest/endianness-test.c
+++ b/tests/qtest/endianness-test.c
@@ -33,7 +33,7 @@ static const TestCase test_cases[] = {
{ "mips64", "pica61", 0x90000000, .bswap = true },
{ "mips64", "mips", 0x14000000, .bswap = true },
{ "mips64", "malta", 0x10000000, .bswap = true },
- { "mips64el", "fulong2e", 0x1fd00000 },
+ { "mips64el", "fuloong2e", 0x1fd00000 },
{ "ppc", "g3beige", 0xfe000000, .bswap = true, .superio = "i82378" },
{ "ppc", "40p", 0x80000000, .bswap = true },
{ "ppc", "bamboo", 0xe8000000, .bswap = true, .superio = "i82378" },
diff --git a/MAINTAINERS b/MAINTAINERS
index 8f597aae12..8136a0e56c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1081,13 +1081,13 @@ R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
S: Obsolete
F: hw/mips/mips_r4k.c
-Fulong 2E
+Fuloong 2E
M: Huacai Chen <chenhc@lemote.com>
M: Philippe Mathieu-Daudé <f4bug@amsat.org>
M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
R: Jiaxun Yang <jiaxun.yang@flygoat.com>
S: Odd Fixes
-F: hw/mips/mips_fulong2e.c
+F: hw/mips/fuloong2e.c
F: hw/isa/vt82c686.c
F: hw/pci-host/bonito.c
F: include/hw/isa/vt82c686.h
diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
index 2240504dff..67d39c56a4 100644
--- a/hw/mips/Kconfig
+++ b/hw/mips/Kconfig
@@ -41,7 +41,7 @@ config JAZZ
select DS1225Y
select JAZZ_LED
-config FULONG
+config FULOONG
bool
select PCI_BONITO
diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs
index 525809af07..8ab41edc3f 100644
--- a/hw/mips/Makefile.objs
+++ b/hw/mips/Makefile.objs
@@ -3,6 +3,6 @@ obj-$(CONFIG_R4K) += mips_r4k.o
obj-$(CONFIG_MALTA) += gt64xxx_pci.o mips_malta.o
obj-$(CONFIG_MIPSSIM) += mips_mipssim.o
obj-$(CONFIG_JAZZ) += mips_jazz.o
-obj-$(CONFIG_FULONG) += mips_fulong2e.o
+obj-$(CONFIG_FULOONG) += fuloong2e.o
obj-$(CONFIG_MIPS_CPS) += cps.o
obj-$(CONFIG_MIPS_BOSTON) += boston.o
--
2.21.3
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 11/14] hw/mips: Rename malta/mipssim/r4k/jazz files
2020-05-26 13:32 [PULL 00/14] mips-hw-next patches for 2020-05-26 Philippe Mathieu-Daudé
` (9 preceding siblings ...)
2020-05-26 13:32 ` [PULL 10/14] hw/mips/fuloong2e: Fix typo in Fuloong machine name Philippe Mathieu-Daudé
@ 2020-05-26 13:32 ` Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 12/14] hw/mips/malta: Add some logging for bad register offset cases Philippe Mathieu-Daudé
` (3 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-26 13:32 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Aleksandar Rikalo, libvir-list, Thomas Huth,
Jiaxun Yang, Philippe Mathieu-Daudé,
Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
Philippe Mathieu-Daudé,
Aurelien Jarno
From: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Machine file names should not have prefix "mips_".
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-id: <20200518200920.17344-22-aleksandar.qemu.devel@gmail.com>
[PMD: Fixed Fuloong line conflict due to rebase]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/mips/{mips_jazz.c => jazz.c} | 0
hw/mips/{mips_malta.c => malta.c} | 0
hw/mips/{mips_mipssim.c => mipssim.c} | 0
hw/mips/{mips_r4k.c => r4k.c} | 0
MAINTAINERS | 8 ++++----
hw/mips/Makefile.objs | 8 ++++----
6 files changed, 8 insertions(+), 8 deletions(-)
rename hw/mips/{mips_jazz.c => jazz.c} (100%)
rename hw/mips/{mips_malta.c => malta.c} (100%)
rename hw/mips/{mips_mipssim.c => mipssim.c} (100%)
rename hw/mips/{mips_r4k.c => r4k.c} (100%)
diff --git a/hw/mips/mips_jazz.c b/hw/mips/jazz.c
similarity index 100%
rename from hw/mips/mips_jazz.c
rename to hw/mips/jazz.c
diff --git a/hw/mips/mips_malta.c b/hw/mips/malta.c
similarity index 100%
rename from hw/mips/mips_malta.c
rename to hw/mips/malta.c
diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mipssim.c
similarity index 100%
rename from hw/mips/mips_mipssim.c
rename to hw/mips/mipssim.c
diff --git a/hw/mips/mips_r4k.c b/hw/mips/r4k.c
similarity index 100%
rename from hw/mips/mips_r4k.c
rename to hw/mips/r4k.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 8136a0e56c..f46ab150dc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1050,7 +1050,7 @@ Jazz
M: Hervé Poussineau <hpoussin@reactos.org>
R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
S: Maintained
-F: hw/mips/mips_jazz.c
+F: hw/mips/jazz.c
F: hw/display/jazz_led.c
F: hw/dma/rc4030.c
@@ -1061,7 +1061,7 @@ R: Aurelien Jarno <aurelien@aurel32.net>
S: Maintained
F: hw/isa/piix4.c
F: hw/acpi/piix4.c
-F: hw/mips/mips_malta.c
+F: hw/mips/malta.c
F: hw/mips/gt64xxx_pci.c
F: include/hw/southbridge/piix.h
F: tests/acceptance/linux_ssh_mips_malta.py
@@ -1071,7 +1071,7 @@ Mipssim
M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
S: Odd Fixes
-F: hw/mips/mips_mipssim.c
+F: hw/mips/mipssim.c
F: hw/net/mipsnet.c
R4000
@@ -1079,7 +1079,7 @@ M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
R: Aurelien Jarno <aurelien@aurel32.net>
R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
S: Obsolete
-F: hw/mips/mips_r4k.c
+F: hw/mips/r4k.c
Fuloong 2E
M: Huacai Chen <chenhc@lemote.com>
diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs
index 8ab41edc3f..739e2b7b40 100644
--- a/hw/mips/Makefile.objs
+++ b/hw/mips/Makefile.objs
@@ -1,8 +1,8 @@
obj-y += addr.o mips_int.o
-obj-$(CONFIG_R4K) += mips_r4k.o
-obj-$(CONFIG_MALTA) += gt64xxx_pci.o mips_malta.o
-obj-$(CONFIG_MIPSSIM) += mips_mipssim.o
-obj-$(CONFIG_JAZZ) += mips_jazz.o
+obj-$(CONFIG_R4K) += r4k.o
+obj-$(CONFIG_MALTA) += gt64xxx_pci.o malta.o
+obj-$(CONFIG_MIPSSIM) += mipssim.o
+obj-$(CONFIG_JAZZ) += jazz.o
obj-$(CONFIG_FULOONG) += fuloong2e.o
obj-$(CONFIG_MIPS_CPS) += cps.o
obj-$(CONFIG_MIPS_BOSTON) += boston.o
--
2.21.3
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 12/14] hw/mips/malta: Add some logging for bad register offset cases
2020-05-26 13:32 [PULL 00/14] mips-hw-next patches for 2020-05-26 Philippe Mathieu-Daudé
` (10 preceding siblings ...)
2020-05-26 13:32 ` [PULL 11/14] hw/mips: Rename malta/mipssim/r4k/jazz files Philippe Mathieu-Daudé
@ 2020-05-26 13:32 ` Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 13/14] hw/mips/mips_int: De-duplicate KVM interrupt delivery Philippe Mathieu-Daudé
` (2 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-26 13:32 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Aleksandar Rikalo, libvir-list, Thomas Huth,
Jiaxun Yang, Philippe Mathieu-Daudé,
Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
Philippe Mathieu-Daudé,
Aurelien Jarno
From: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Log the cases where a guest attempts read or write using bad
register offset.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-id: <20200518200920.17344-21-aleksandar.qemu.devel@gmail.com>
[PMD: Replaced TARGET_FMT_lx by HWADDR_PRIX]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/mips/malta.c | 14 ++++++--------
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index e4c4de1b4e..b673a3a248 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -427,10 +427,9 @@ static uint64_t malta_fpga_read(void *opaque, hwaddr addr,
break;
default:
-#if 0
- printf("malta_fpga_read: Bad register offset 0x" TARGET_FMT_lx "\n",
- addr);
-#endif
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "malta_fpga_read: Bad register addr 0x%"HWADDR_PRIX"\n",
+ addr);
break;
}
return val;
@@ -515,10 +514,9 @@ static void malta_fpga_write(void *opaque, hwaddr addr,
break;
default:
-#if 0
- printf("malta_fpga_write: Bad register offset 0x" TARGET_FMT_lx "\n",
- addr);
-#endif
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "malta_fpga_write: Bad register addr 0x%"HWADDR_PRIX"\n",
+ addr);
break;
}
}
--
2.21.3
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 13/14] hw/mips/mips_int: De-duplicate KVM interrupt delivery
2020-05-26 13:32 [PULL 00/14] mips-hw-next patches for 2020-05-26 Philippe Mathieu-Daudé
` (11 preceding siblings ...)
2020-05-26 13:32 ` [PULL 12/14] hw/mips/malta: Add some logging for bad register offset cases Philippe Mathieu-Daudé
@ 2020-05-26 13:32 ` Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 14/14] MAINTAINERS: Change Aleksandar Rikalo's email address Philippe Mathieu-Daudé
2020-05-27 15:13 ` [PULL 00/14] mips-hw-next patches for 2020-05-26 Peter Maydell
14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-26 13:32 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Aleksandar Rikalo, libvir-list, Thomas Huth,
Jiaxun Yang, Philippe Mathieu-Daudé,
Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
Philippe Mathieu-Daudé,
Aurelien Jarno
Refactor duplicated code in a single place.
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20200429082916.10669-2-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/mips/mips_int.c | 11 +++--------
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c
index 796730b11d..4a1bf846da 100644
--- a/hw/mips/mips_int.c
+++ b/hw/mips/mips_int.c
@@ -47,17 +47,12 @@ static void cpu_mips_irq_request(void *opaque, int irq, int level)
if (level) {
env->CP0_Cause |= 1 << (irq + CP0Ca_IP);
-
- if (kvm_enabled() && irq == 2) {
- kvm_mips_set_interrupt(cpu, irq, level);
- }
-
} else {
env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP));
+ }
- if (kvm_enabled() && irq == 2) {
- kvm_mips_set_interrupt(cpu, irq, level);
- }
+ if (kvm_enabled() && irq == 2) {
+ kvm_mips_set_interrupt(cpu, irq, level);
}
if (env->CP0_Cause & CP0Ca_IP_mask) {
--
2.21.3
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 14/14] MAINTAINERS: Change Aleksandar Rikalo's email address
2020-05-26 13:32 [PULL 00/14] mips-hw-next patches for 2020-05-26 Philippe Mathieu-Daudé
` (12 preceding siblings ...)
2020-05-26 13:32 ` [PULL 13/14] hw/mips/mips_int: De-duplicate KVM interrupt delivery Philippe Mathieu-Daudé
@ 2020-05-26 13:32 ` Philippe Mathieu-Daudé
2020-05-27 15:13 ` [PULL 00/14] mips-hw-next patches for 2020-05-26 Peter Maydell
14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-26 13:32 UTC (permalink / raw)
To: qemu-devel
Cc: Laurent Vivier, Aleksandar Rikalo, libvir-list, Thomas Huth,
Jiaxun Yang, Philippe Mathieu-Daudé,
Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
Philippe Mathieu-Daudé,
Aurelien Jarno
From: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Aleksandar Rikalo wants to use a different email address from
now on.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-id: <20200518200920.17344-18-aleksandar.qemu.devel@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
.mailmap | 3 ++-
MAINTAINERS | 12 ++++++------
2 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/.mailmap b/.mailmap
index 6412067bde..e3628c7a66 100644
--- a/.mailmap
+++ b/.mailmap
@@ -42,7 +42,8 @@ Justin Terry (VM) <juterry@microsoft.com> Justin Terry (VM) via Qemu-devel <qemu
Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> <aleksandar.markovic@mips.com>
Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> <aleksandar.markovic@imgtec.com>
Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> <amarkovic@wavecomp.com>
-Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> <arikalo@wavecomp.com>
+Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> <arikalo@wavecomp.com>
+Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> <aleksandar.rikalo@rt-rk.com>
Anthony Liguori <anthony@codemonkey.ws> Anthony Liguori <aliguori@us.ibm.com>
James Hogan <jhogan@kernel.org> <james.hogan@imgtec.com>
Leif Lindholm <leif@nuviainc.com> <leif.lindholm@linaro.org>
diff --git a/MAINTAINERS b/MAINTAINERS
index f46ab150dc..a209b5d8ce 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -213,7 +213,7 @@ F: disas/microblaze.c
MIPS TCG CPUs
M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
R: Aurelien Jarno <aurelien@aurel32.net>
-R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
+R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
S: Maintained
F: target/mips/
F: default-configs/*mips*
@@ -1048,7 +1048,7 @@ MIPS Machines
-------------
Jazz
M: Hervé Poussineau <hpoussin@reactos.org>
-R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
+R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
S: Maintained
F: hw/mips/jazz.c
F: hw/display/jazz_led.c
@@ -1069,7 +1069,7 @@ F: tests/acceptance/machine_mips_malta.py
Mipssim
M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
-R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
+R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
S: Odd Fixes
F: hw/mips/mipssim.c
F: hw/net/mipsnet.c
@@ -1077,7 +1077,7 @@ F: hw/net/mipsnet.c
R4000
M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
R: Aurelien Jarno <aurelien@aurel32.net>
-R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
+R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
S: Obsolete
F: hw/mips/r4k.c
@@ -1094,7 +1094,7 @@ F: include/hw/isa/vt82c686.h
Boston
M: Paul Burton <pburton@wavecomp.com>
-R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
+R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
S: Maintained
F: hw/core/loader-fit.c
F: hw/mips/boston.c
@@ -2608,7 +2608,7 @@ F: disas/i386.c
MIPS TCG target
M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
R: Aurelien Jarno <aurelien@aurel32.net>
-R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
+R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
S: Maintained
F: tcg/mips/
--
2.21.3
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PULL 00/14] mips-hw-next patches for 2020-05-26
2020-05-26 13:32 [PULL 00/14] mips-hw-next patches for 2020-05-26 Philippe Mathieu-Daudé
` (13 preceding siblings ...)
2020-05-26 13:32 ` [PULL 14/14] MAINTAINERS: Change Aleksandar Rikalo's email address Philippe Mathieu-Daudé
@ 2020-05-27 15:13 ` Peter Maydell
14 siblings, 0 replies; 16+ messages in thread
From: Peter Maydell @ 2020-05-27 15:13 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Laurent Vivier, Aleksandar Rikalo, Libvirt, QEMU Developers,
Jiaxun Yang, Aleksandar Markovic, Paolo Bonzini, Thomas Huth,
Huacai Chen, Philippe Mathieu-Daudé,
Aurelien Jarno
On Tue, 26 May 2020 at 14:34, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> The following changes since commit 8f72c75cfc9b3c84a9b5e7a58ee5e471cb2f19c8:
>
> Merge remote-tracking branch 'remotes/kraxel/tags/audio-20200526-pull-reque=
> st' into staging (2020-05-26 10:59:01 +0100)
>
> are available in the Git repository at:
>
> https://gitlab.com/philmd/qemu.git tags/mips-hw-next-20200526
>
> for you to fetch changes up to 97d8974620053db5754af808583de70380f73a10:
>
> MAINTAINERS: Change Aleksandar Rikalo's email address (2020-05-26 13:21:12 =
> +0200)
>
> ----------------------------------------------------------------
> MIPS hardware updates
>
> - MAINTAINERS updated to welcome Huacai Chen and Jiaxun Yang,
> and update Aleksandar Rikalo's email address,
> - Trivial improvements in the Bonito64 North Bridge and the
> Fuloong 2e machine,
> - MIPS Machines names unified without 'mips_' prefix.
>
> CI: https://travis-ci.org/github/philmd/qemu/builds/691247975
>
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/5.1
for any user-visible changes.
-- PMM
^ permalink raw reply [flat|nested] 16+ messages in thread