From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Damien Hedde" <damien.hedde@greensocs.com>,
"Huacai Chen" <zltjiangshi@gmail.com>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Eduardo Habkost" <ehabkost@redhat.com>,
"Paul Burton" <paulburton@kernel.org>,
"Edgar E . Iglesias" <edgar.iglesias@gmail.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
"Aleksandar Markovic" <aleksandar.qemu.devel@gmail.com>,
"Hervé Poussineau" <hpoussin@reactos.org>,
"Cleber Rosa" <crosa@redhat.com>,
"Huacai Chen" <chenhc@lemote.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Richard Henderson" <rth@twiddle.net>
Subject: [PATCH 10/16] hw/mips/jazz: Correct CPU frequencies
Date: Mon, 28 Sep 2020 19:15:33 +0200 [thread overview]
Message-ID: <20200928171539.788309-11-f4bug@amsat.org> (raw)
In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org>
The Magnum 4000PC CPU runs at 100 MHz, and the Acer PICA-61
CPU at ~134 MHz.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/mips/jazz.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/hw/mips/jazz.c b/hw/mips/jazz.c
index 47723093b63..eee79d5b47d 100644
--- a/hw/mips/jazz.c
+++ b/hw/mips/jazz.c
@@ -45,6 +45,7 @@
#include "hw/audio/pcspk.h"
#include "hw/input/i8042.h"
#include "hw/sysbus.h"
+#include "hw/qdev-clock.h"
#include "exec/address-spaces.h"
#include "sysemu/qtest.h"
#include "sysemu/reset.h"
@@ -145,6 +146,7 @@ static void mips_jazz_init(MachineState *machine,
MIPSCPU *cpu;
CPUClass *cc;
CPUMIPSState *env;
+ Clock *cpuclk;
qemu_irq *i8259;
rc4030_dma *dmas;
IOMMUMemoryRegion *rc4030_dma_mr;
@@ -163,6 +165,13 @@ static void mips_jazz_init(MachineState *machine,
MemoryRegion *bios2 = g_new(MemoryRegion, 1);
SysBusESPState *sysbus_esp;
ESPState *esp;
+ static const struct {
+ unsigned freq_hz;
+ unsigned pll_mult;
+ } ext_clk[] = {
+ [JAZZ_MAGNUM] = {50000000, 2},
+ [JAZZ_PICA61] = {33333333, 4},
+ };
if (machine->ram_size > 256 * MiB) {
error_report("RAM size more than 256Mb is not supported");
@@ -170,7 +179,12 @@ static void mips_jazz_init(MachineState *machine,
}
/* init CPUs */
- cpu = MIPS_CPU(cpu_create(machine->cpu_type));
+ cpu = MIPS_CPU(object_new(machine->cpu_type));
+ cpuclk = qdev_init_clock_out(DEVICE(cpu), "cpuclk");
+ clock_set_hz(cpuclk,
+ ext_clk[jazz_model].freq_hz * ext_clk[jazz_model].pll_mult);
+ qdev_connect_clock_in(DEVICE(cpu), "clk", cpuclk);
+ qdev_realize(DEVICE(cpu), NULL, &error_abort);
env = &cpu->env;
qemu_register_reset(main_cpu_reset, cpu);
--
2.26.2
next prev parent reply other threads:[~2020-09-28 17:22 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-28 17:15 [PATCH 00/16] hw/mips: Set CPU frequency Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 01/16] hw/core/cpu: Let CPU object have a clock source Philippe Mathieu-Daudé
2020-09-30 7:43 ` Igor Mammedov
2020-09-30 10:16 ` Philippe Mathieu-Daudé
2020-10-05 16:40 ` Igor Mammedov
2020-10-05 17:19 ` Philippe Mathieu-Daudé
2020-10-05 17:44 ` Eduardo Habkost
2020-10-05 18:09 ` Philippe Mathieu-Daudé
2020-10-05 18:29 ` Philippe Mathieu-Daudé
2020-10-05 19:22 ` Eduardo Habkost
2020-10-06 18:11 ` Philippe Mathieu-Daudé
2020-10-06 19:53 ` Philippe Mathieu-Daudé
2020-10-05 18:43 ` Eduardo Habkost
2020-09-28 17:15 ` [PATCH 02/16] target/mips: Move cpu_mips_get_random() with CP0 helpers Philippe Mathieu-Daudé
2020-09-30 18:04 ` Aleksandar Markovic
2020-09-28 17:15 ` [PATCH 03/16] target/mips/cp0_timer: Explicit unit in variable name Philippe Mathieu-Daudé
2020-09-30 18:10 ` Aleksandar Markovic
2020-09-28 17:15 ` [PATCH 04/16] target/mips/cpu: Introduce mips_cpu_properties[] Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 05/16] target/mips/cpu: Set default CPU frequency to 200 MHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 06/16] target/mips: Keep CP0 counter in sync with the CPU frequency Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 07/16] hw/mips/r4k: Explicit CPU frequency is 200 MHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 08/16] hw/mips/fuloong2e: Set CPU frequency to 533 MHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 09/16] hw/mips/mipssim: Correct CPU frequency Philippe Mathieu-Daudé
2020-09-28 17:15 ` Philippe Mathieu-Daudé [this message]
2020-09-28 17:15 ` [PATCH 11/16] hw/mips/cps: Expose input clock and connect it to CPU cores Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 12/16] hw/mips/boston: Set CPU frequency to 1 GHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 13/16] hw/mips/malta: Set CPU frequency to 320 MHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 14/16] hw/mips/cps: Do not allow use without input clock Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 15/16] target/mips/cpu: Do not allow system-mode " Philippe Mathieu-Daudé
2020-09-29 13:01 ` Igor Mammedov
2020-09-29 14:40 ` Philippe Mathieu-Daudé
2020-10-05 7:39 ` Philippe Mathieu-Daudé
2020-10-05 16:25 ` Igor Mammedov
2020-09-28 17:15 ` [PATCH 16/16] tests/acceptance: Test the MIPSsim machine Philippe Mathieu-Daudé
2020-09-28 20:33 ` Willian Rampazzo
2020-09-29 9:09 ` Philippe Mathieu-Daudé
2020-09-29 9:38 ` Alex Bennée
2020-09-29 9:50 ` Philippe Mathieu-Daudé
2020-09-30 8:43 ` Daniel P. Berrangé
2020-09-30 9:49 ` Alex Bennée
2020-09-30 10:08 ` Philippe Mathieu-Daudé
2020-09-29 2:46 ` [PATCH 00/16] hw/mips: Set CPU frequency no-reply
2020-09-29 8:58 ` Philippe Mathieu-Daudé
2020-09-30 7:40 ` Igor Mammedov
2020-09-30 10:13 ` Philippe Mathieu-Daudé
2020-10-09 15:40 ` Philippe Mathieu-Daudé
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