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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Damien Hedde" <damien.hedde@greensocs.com>,
	"Huacai Chen" <zltjiangshi@gmail.com>,
	"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Paul Burton" <paulburton@kernel.org>,
	"Edgar E . Iglesias" <edgar.iglesias@gmail.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
	"Aleksandar Markovic" <aleksandar.qemu.devel@gmail.com>,
	"Hervé Poussineau" <hpoussin@reactos.org>,
	"Cleber Rosa" <crosa@redhat.com>,
	"Huacai Chen" <chenhc@lemote.com>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Richard Henderson" <rth@twiddle.net>
Subject: [PATCH 04/16] target/mips/cpu: Introduce mips_cpu_properties[]
Date: Mon, 28 Sep 2020 19:15:27 +0200	[thread overview]
Message-ID: <20200928171539.788309-5-f4bug@amsat.org> (raw)
In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org>

To allow objects creating CPU objects to set non-default properties
before qdev-realizing() it, add an empty mips_cpu_properties array
in MIPSCPUClass.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/cpu.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index e86cd065483..c1c0f2e12ba 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -26,7 +26,7 @@
 #include "qemu/module.h"
 #include "sysemu/kvm.h"
 #include "exec/exec-all.h"
-
+#include "hw/qdev-properties.h"
 
 static void mips_cpu_set_pc(CPUState *cs, vaddr value)
 {
@@ -181,6 +181,10 @@ static ObjectClass *mips_cpu_class_by_name(const char *cpu_model)
     return oc;
 }
 
+static Property mips_cpu_properties[] = {
+    DEFINE_PROP_END_OF_LIST()
+};
+
 static void mips_cpu_class_init(ObjectClass *c, void *data)
 {
     MIPSCPUClass *mcc = MIPS_CPU_CLASS(c);
@@ -190,6 +194,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
     device_class_set_parent_realize(dc, mips_cpu_realizefn,
                                     &mcc->parent_realize);
     device_class_set_parent_reset(dc, mips_cpu_reset, &mcc->parent_reset);
+    device_class_set_props(dc, mips_cpu_properties);
 
     cc->class_by_name = mips_cpu_class_by_name;
     cc->has_work = mips_cpu_has_work;
-- 
2.26.2



  parent reply	other threads:[~2020-09-28 17:17 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-28 17:15 [PATCH 00/16] hw/mips: Set CPU frequency Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 01/16] hw/core/cpu: Let CPU object have a clock source Philippe Mathieu-Daudé
2020-09-30  7:43   ` Igor Mammedov
2020-09-30 10:16     ` Philippe Mathieu-Daudé
2020-10-05 16:40       ` Igor Mammedov
2020-10-05 17:19         ` Philippe Mathieu-Daudé
2020-10-05 17:44         ` Eduardo Habkost
2020-10-05 18:09           ` Philippe Mathieu-Daudé
2020-10-05 18:29             ` Philippe Mathieu-Daudé
2020-10-05 19:22               ` Eduardo Habkost
2020-10-06 18:11                 ` Philippe Mathieu-Daudé
2020-10-06 19:53                   ` Philippe Mathieu-Daudé
2020-10-05 18:43             ` Eduardo Habkost
2020-09-28 17:15 ` [PATCH 02/16] target/mips: Move cpu_mips_get_random() with CP0 helpers Philippe Mathieu-Daudé
2020-09-30 18:04   ` Aleksandar Markovic
2020-09-28 17:15 ` [PATCH 03/16] target/mips/cp0_timer: Explicit unit in variable name Philippe Mathieu-Daudé
2020-09-30 18:10   ` Aleksandar Markovic
2020-09-28 17:15 ` Philippe Mathieu-Daudé [this message]
2020-09-28 17:15 ` [PATCH 05/16] target/mips/cpu: Set default CPU frequency to 200 MHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 06/16] target/mips: Keep CP0 counter in sync with the CPU frequency Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 07/16] hw/mips/r4k: Explicit CPU frequency is 200 MHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 08/16] hw/mips/fuloong2e: Set CPU frequency to 533 MHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 09/16] hw/mips/mipssim: Correct CPU frequency Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 10/16] hw/mips/jazz: Correct CPU frequencies Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 11/16] hw/mips/cps: Expose input clock and connect it to CPU cores Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 12/16] hw/mips/boston: Set CPU frequency to 1 GHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 13/16] hw/mips/malta: Set CPU frequency to 320 MHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 14/16] hw/mips/cps: Do not allow use without input clock Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 15/16] target/mips/cpu: Do not allow system-mode " Philippe Mathieu-Daudé
2020-09-29 13:01   ` Igor Mammedov
2020-09-29 14:40     ` Philippe Mathieu-Daudé
2020-10-05  7:39       ` Philippe Mathieu-Daudé
2020-10-05 16:25       ` Igor Mammedov
2020-09-28 17:15 ` [PATCH 16/16] tests/acceptance: Test the MIPSsim machine Philippe Mathieu-Daudé
2020-09-28 20:33   ` Willian Rampazzo
2020-09-29  9:09     ` Philippe Mathieu-Daudé
2020-09-29  9:38       ` Alex Bennée
2020-09-29  9:50         ` Philippe Mathieu-Daudé
2020-09-30  8:43         ` Daniel P. Berrangé
2020-09-30  9:49           ` Alex Bennée
2020-09-30 10:08             ` Philippe Mathieu-Daudé
2020-09-29  2:46 ` [PATCH 00/16] hw/mips: Set CPU frequency no-reply
2020-09-29  8:58   ` Philippe Mathieu-Daudé
2020-09-30  7:40 ` Igor Mammedov
2020-09-30 10:13   ` Philippe Mathieu-Daudé
2020-10-09 15:40 ` Philippe Mathieu-Daudé

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