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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	"Paul Burton" <paulburton@kernel.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Hervé Poussineau" <hpoussin@reactos.org>,
	"Huacai Chen" <chenhc@lemote.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PULL 23/44] hw/mips/fuloong2e: Set CPU frequency to 533 MHz
Date: Sat, 17 Oct 2020 16:02:22 +0200
Message-ID: <20201017140243.1078718-24-f4bug@amsat.org> (raw)
In-Reply-To: <20201017140243.1078718-1-f4bug@amsat.org>

The CPU frequency is normally provided by the firmware in the
"cpuclock" environment variable. The 2E board can handles up
to 660MHz, but be conservative and take the same value used
by the Linux kernel: 533 MHz.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20201012095804.3335117-15-f4bug@amsat.org>
---
 hw/mips/fuloong2e.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index b000ed1d7f7..b8234f61083 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -23,6 +23,7 @@
 #include "qemu/units.h"
 #include "qapi/error.h"
 #include "cpu.h"
+#include "hw/clock.h"
 #include "hw/intc/i8259.h"
 #include "hw/dma/i8257.h"
 #include "hw/isa/superio.h"
@@ -298,12 +299,16 @@ static void mips_fuloong2e_init(MachineState *machine)
     PCIBus *pci_bus;
     ISABus *isa_bus;
     I2CBus *smbus;
+    Clock *cpuclk;
     MIPSCPU *cpu;
     CPUMIPSState *env;
     DeviceState *dev;
 
+    cpuclk = clock_new(OBJECT(machine), "cpu-refclk");
+    clock_set_hz(cpuclk, 533080000); /* ~533 MHz */
+
     /* init CPUs */
-    cpu = MIPS_CPU(cpu_create(machine->cpu_type));
+    cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk);
     env = &cpu->env;
 
     qemu_register_reset(main_cpu_reset, cpu);
-- 
2.26.2



  parent reply index

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-17 14:01 [PULL 00/44] mips-next patches for 2020-10-17 Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 01/44] util/cutils: Introduce freq_to_str() to display Hertz units Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 02/44] hw/qdev-clock: Display error hint when clock is missing from device Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 03/44] hw/core/clock: Add the clock_new helper function Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 04/44] target/mips: Fix some comment spelling errors Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 05/44] target/mips: Demacro helpers for <ABS|CHS>.<D|S|PS> Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 06/44] target/mips: Demacro helpers for M<ADD|SUB>F.<D|S> Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 07/44] target/mips: Demacro helpers for <MAX|MAXA|MIN|MINA>.<D|S> Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 08/44] target/mips: Add loongson-ext lswc2 group of instructions (Part 1) Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 09/44] target/mips: Add loongson-ext lswc2 group of instructions (Part 2) Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 10/44] target/mips: Add loongson-ext lsdc2 group of instructions Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 11/44] target/mips/op_helper: Convert multiple if() to switch case Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 12/44] target/mips/op_helper: Document Invalidate/Writeback opcodes as no-op Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 13/44] target/mips/op_helper: Log unimplemented cache opcode Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 14/44] target/mips: Move cpu_mips_get_random() with CP0 helpers Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 15/44] target/mips/cp0_timer: Explicit unit in variable name Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 16/44] target/mips/cp0_timer: Document TIMER_PERIOD origin Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 17/44] target/mips: Move cp0_count_ns to CPUMIPSState Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 18/44] target/mips/cpu: Calculate the CP0 timer period using the CPU frequency Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 19/44] target/mips/cpu: Make cp0_count_rate a property Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 20/44] target/mips/cpu: Allow the CPU to use dynamic frequencies Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 21/44] target/mips/cpu: Introduce mips_cpu_create_with_clock() helper Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 22/44] hw/mips/r4k: Explicit CPU frequency is 200 MHz Philippe Mathieu-Daudé
2020-10-17 14:02 ` Philippe Mathieu-Daudé [this message]
2020-10-17 14:02 ` [PULL 24/44] hw/mips/mipssim: Correct CPU frequency Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 25/44] hw/mips/jazz: Correct CPU frequencies Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 26/44] hw/mips/cps: Expose input clock and connect it to CPU cores Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 27/44] hw/mips/boston: Set CPU frequency to 1 GHz Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 28/44] hw/mips/malta: Set CPU frequency to 320 MHz Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 29/44] hw/mips/cps: Do not allow use without input clock Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 30/44] target/mips/cpu: Display warning when CPU is used " Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 31/44] hw/mips/malta: Fix FPGA I/O region size Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 32/44] hw/mips/malta: Move gt64120 related code together Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 33/44] hw/mips/malta: Use clearer qdev style Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 34/44] hw/mips: Simplify loading 64-bit ELF kernels Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 35/44] hw/mips: Simplify code using ROUND_UP(INITRD_PAGE_SIZE) Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 36/44] hw/mips: Rename TYPE_MIPS_BOSTON to TYPE_BOSTON Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 37/44] hw/mips: Remove exit(1) in case of missing ROM Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 38/44] tests/acceptance: Add MIPS record/replay tests Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 39/44] docs/system: Update MIPS CPU documentation Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 40/44] MAINTAINERS: Remove myself Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 41/44] MAINTAINERS: Put myself forward for MIPS target Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 42/44] MAINTAINERS: Downgrade MIPS Boston to 'Odd Fixes', fix Paul Burton mail Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 43/44] MAINTAINERS: Remove duplicated Malta test entries Philippe Mathieu-Daudé
2020-10-17 14:02 ` [PULL 44/44] target/mips: Increase number of TLB entries on the 34Kf core (16 -> 64) Philippe Mathieu-Daudé
2020-10-19 10:45 ` [PULL 00/44] mips-next patches for 2020-10-17 Peter Maydell

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