* [PATCH v2 0/6] linux-user: Rework get_elf_hwcap() and support MIPS Loongson 2F/3E
@ 2020-12-01 13:35 Philippe Mathieu-Daudé
2020-12-01 13:35 ` [PATCH v2 1/6] linux-user/elfload: Move GET_FEATURE macro out of get_elf_hwcap() body Philippe Mathieu-Daudé
` (5 more replies)
0 siblings, 6 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-01 13:35 UTC (permalink / raw)
To: Huacai Chen, Jiaxun Yang, qemu-devel
Cc: Aleksandar Rikalo, Richard Henderson, Philippe Mathieu-Daudé,
Laurent Vivier, Meng Zhuo, Aurelien Jarno
Introduce the GET_FEATURE_REG_SET() and GET_FEATURE_REG_EQU()
macros to check if an instruction set is supported by a CPU
using CP0 read-only bits (instead of QEMU insn_flags which
is not always coherent - we might remove it soon).
Use these macros to test for MSA ASE and Release 6.
Update the ELF HWCAP bits and set the Loongson instructions
so we can run 2F/3E userland binaries.
Supersedes: <20201201083951.2745111-1-f4bug@amsat.org>
Philippe Mathieu-Daudé (6):
linux-user/elfload: Move GET_FEATURE macro out of get_elf_hwcap() body
linux-user/elfload: Rename MIPS GET_FEATURE() as GET_FEATURE_INSN()
linux-user/elfload: Introduce MIPS GET_FEATURE_REG_SET() macro
linux-user/elfload: Introduce MIPS GET_FEATURE_REG_EQU() macro
linux-user/elfload: Update HWCAP bits from linux 5.7
linux-user: Add support for MIPS Loongson 2F/3E
linux-user/elfload.c | 41 ++++++++++++++++++++++++++++++++++-------
1 file changed, 34 insertions(+), 7 deletions(-)
--
2.26.2
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 1/6] linux-user/elfload: Move GET_FEATURE macro out of get_elf_hwcap() body
2020-12-01 13:35 [PATCH v2 0/6] linux-user: Rework get_elf_hwcap() and support MIPS Loongson 2F/3E Philippe Mathieu-Daudé
@ 2020-12-01 13:35 ` Philippe Mathieu-Daudé
2020-12-01 17:38 ` Richard Henderson
2020-12-01 13:35 ` [PATCH v2 2/6] linux-user/elfload: Rename MIPS GET_FEATURE() as GET_FEATURE_INSN() Philippe Mathieu-Daudé
` (4 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-01 13:35 UTC (permalink / raw)
To: Huacai Chen, Jiaxun Yang, qemu-devel
Cc: Aleksandar Rikalo, Richard Henderson, Philippe Mathieu-Daudé,
Laurent Vivier, Meng Zhuo, Aurelien Jarno
As we are going to add more macros, keep the function body clear.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
linux-user/elfload.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 0b02a926025..aae28fd929d 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -989,22 +989,22 @@ enum {
#define ELF_HWCAP get_elf_hwcap()
+#define GET_FEATURE(_flag, _hwcap) \
+ do { if (cpu->env.insn_flags & (_flag)) { hwcaps |= _hwcap; } } while (0)
+
static uint32_t get_elf_hwcap(void)
{
MIPSCPU *cpu = MIPS_CPU(thread_cpu);
uint32_t hwcaps = 0;
-#define GET_FEATURE(flag, hwcap) \
- do { if (cpu->env.insn_flags & (flag)) { hwcaps |= hwcap; } } while (0)
-
GET_FEATURE(ISA_MIPS32R6 | ISA_MIPS64R6, HWCAP_MIPS_R6);
GET_FEATURE(ASE_MSA, HWCAP_MIPS_MSA);
-#undef GET_FEATURE
-
return hwcaps;
}
+#undef GET_FEATURE
+
#endif /* TARGET_MIPS */
#ifdef TARGET_MICROBLAZE
--
2.26.2
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 2/6] linux-user/elfload: Rename MIPS GET_FEATURE() as GET_FEATURE_INSN()
2020-12-01 13:35 [PATCH v2 0/6] linux-user: Rework get_elf_hwcap() and support MIPS Loongson 2F/3E Philippe Mathieu-Daudé
2020-12-01 13:35 ` [PATCH v2 1/6] linux-user/elfload: Move GET_FEATURE macro out of get_elf_hwcap() body Philippe Mathieu-Daudé
@ 2020-12-01 13:35 ` Philippe Mathieu-Daudé
2020-12-01 17:38 ` Richard Henderson
2020-12-01 13:35 ` [PATCH v2 3/6] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_SET() macro Philippe Mathieu-Daudé
` (3 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-01 13:35 UTC (permalink / raw)
To: Huacai Chen, Jiaxun Yang, qemu-devel
Cc: Aleksandar Rikalo, Richard Henderson, Philippe Mathieu-Daudé,
Laurent Vivier, Meng Zhuo, Aurelien Jarno
We want to add macros similar to GET_FEATURE().
As this one use the 'insn_flags' field, rename it
GET_FEATURE_INSN().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
linux-user/elfload.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index aae28fd929d..0e1d7e7677c 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -989,7 +989,7 @@ enum {
#define ELF_HWCAP get_elf_hwcap()
-#define GET_FEATURE(_flag, _hwcap) \
+#define GET_FEATURE_INSN(_flag, _hwcap) \
do { if (cpu->env.insn_flags & (_flag)) { hwcaps |= _hwcap; } } while (0)
static uint32_t get_elf_hwcap(void)
@@ -997,13 +997,13 @@ static uint32_t get_elf_hwcap(void)
MIPSCPU *cpu = MIPS_CPU(thread_cpu);
uint32_t hwcaps = 0;
- GET_FEATURE(ISA_MIPS32R6 | ISA_MIPS64R6, HWCAP_MIPS_R6);
- GET_FEATURE(ASE_MSA, HWCAP_MIPS_MSA);
+ GET_FEATURE_INSN(ISA_MIPS32R6 | ISA_MIPS64R6, HWCAP_MIPS_R6);
+ GET_FEATURE_INSN(ASE_MSA, HWCAP_MIPS_MSA);
return hwcaps;
}
-#undef GET_FEATURE
+#undef GET_FEATURE_INSN
#endif /* TARGET_MIPS */
--
2.26.2
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 3/6] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_SET() macro
2020-12-01 13:35 [PATCH v2 0/6] linux-user: Rework get_elf_hwcap() and support MIPS Loongson 2F/3E Philippe Mathieu-Daudé
2020-12-01 13:35 ` [PATCH v2 1/6] linux-user/elfload: Move GET_FEATURE macro out of get_elf_hwcap() body Philippe Mathieu-Daudé
2020-12-01 13:35 ` [PATCH v2 2/6] linux-user/elfload: Rename MIPS GET_FEATURE() as GET_FEATURE_INSN() Philippe Mathieu-Daudé
@ 2020-12-01 13:35 ` Philippe Mathieu-Daudé
2020-12-01 17:39 ` Richard Henderson
2020-12-01 13:35 ` [PATCH v2 4/6] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_EQU() macro Philippe Mathieu-Daudé
` (2 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-01 13:35 UTC (permalink / raw)
To: Huacai Chen, Jiaxun Yang, qemu-devel
Cc: Aleksandar Rikalo, Richard Henderson, Philippe Mathieu-Daudé,
Laurent Vivier, Meng Zhuo, Aurelien Jarno
ISA features are usually denoted in read-only bits from
CPU registers. Add the GET_FEATURE_REG_SET() macro which
checks if a CPU register has bits set.
Use the macro to check for MSA (which sets the MSAP bit of
the Config3 register when the ASE implementation is present).
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
linux-user/elfload.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 0e1d7e7677c..b7c6d30723a 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -992,17 +992,21 @@ enum {
#define GET_FEATURE_INSN(_flag, _hwcap) \
do { if (cpu->env.insn_flags & (_flag)) { hwcaps |= _hwcap; } } while (0)
+#define GET_FEATURE_REG_SET(_reg, _mask, _hwcap) \
+ do { if (cpu->env._reg & (_mask)) { hwcaps |= _hwcap; } } while (0)
+
static uint32_t get_elf_hwcap(void)
{
MIPSCPU *cpu = MIPS_CPU(thread_cpu);
uint32_t hwcaps = 0;
GET_FEATURE_INSN(ISA_MIPS32R6 | ISA_MIPS64R6, HWCAP_MIPS_R6);
- GET_FEATURE_INSN(ASE_MSA, HWCAP_MIPS_MSA);
+ GET_FEATURE_REG_SET(CP0_Config3, 1 << CP0C3_MSAP, HWCAP_MIPS_MSA);
return hwcaps;
}
+#undef GET_FEATURE_REG_SET
#undef GET_FEATURE_INSN
#endif /* TARGET_MIPS */
--
2.26.2
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 4/6] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_EQU() macro
2020-12-01 13:35 [PATCH v2 0/6] linux-user: Rework get_elf_hwcap() and support MIPS Loongson 2F/3E Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2020-12-01 13:35 ` [PATCH v2 3/6] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_SET() macro Philippe Mathieu-Daudé
@ 2020-12-01 13:35 ` Philippe Mathieu-Daudé
2020-12-01 17:36 ` Richard Henderson
2020-12-01 13:35 ` [PATCH v2 5/6] linux-user/elfload: Update HWCAP bits from linux 5.7 Philippe Mathieu-Daudé
2020-12-01 13:35 ` [PATCH v2 6/6] linux-user: Add support for MIPS Loongson 2F/3E Philippe Mathieu-Daudé
5 siblings, 1 reply; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-01 13:35 UTC (permalink / raw)
To: Huacai Chen, Jiaxun Yang, qemu-devel
Cc: Aleksandar Rikalo, Richard Henderson, Philippe Mathieu-Daudé,
Laurent Vivier, Meng Zhuo, Aurelien Jarno
ISA features are usually denoted in read-only bits from
CPU registers. Add the GET_FEATURE_REG_EQU() macro which
checks if a CPU register has bits set to a specific value.
Use the macro to check the 'Architecture Revision' level
of the Config0 register, which is '2' when the Release 6
ISA is implemented.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
linux-user/elfload.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index b7c6d30723a..73c1972183b 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -995,17 +995,25 @@ enum {
#define GET_FEATURE_REG_SET(_reg, _mask, _hwcap) \
do { if (cpu->env._reg & (_mask)) { hwcaps |= _hwcap; } } while (0)
+#define GET_FEATURE_REG_EQU(_reg, _mask, _val, _hwcap) \
+ do { \
+ if ((cpu->env._reg & (_mask)) == _val) { \
+ hwcaps |= _hwcap; \
+ } \
+ } while (0)
+
static uint32_t get_elf_hwcap(void)
{
MIPSCPU *cpu = MIPS_CPU(thread_cpu);
uint32_t hwcaps = 0;
- GET_FEATURE_INSN(ISA_MIPS32R6 | ISA_MIPS64R6, HWCAP_MIPS_R6);
+ GET_FEATURE_REG_EQU(CP0_Config0, 7 << CP0C0_AR, 2, HWCAP_MIPS_R6);
GET_FEATURE_REG_SET(CP0_Config3, 1 << CP0C3_MSAP, HWCAP_MIPS_MSA);
return hwcaps;
}
+#undef GET_FEATURE_REG_EQU
#undef GET_FEATURE_REG_SET
#undef GET_FEATURE_INSN
--
2.26.2
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 5/6] linux-user/elfload: Update HWCAP bits from linux 5.7
2020-12-01 13:35 [PATCH v2 0/6] linux-user: Rework get_elf_hwcap() and support MIPS Loongson 2F/3E Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2020-12-01 13:35 ` [PATCH v2 4/6] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_EQU() macro Philippe Mathieu-Daudé
@ 2020-12-01 13:35 ` Philippe Mathieu-Daudé
2020-12-01 13:35 ` [PATCH v2 6/6] linux-user: Add support for MIPS Loongson 2F/3E Philippe Mathieu-Daudé
5 siblings, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-01 13:35 UTC (permalink / raw)
To: Huacai Chen, Jiaxun Yang, qemu-devel
Cc: Aleksandar Rikalo, Richard Henderson, Philippe Mathieu-Daudé,
Laurent Vivier, Meng Zhuo, Aurelien Jarno
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
linux-user/elfload.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 73c1972183b..167ffbfb06c 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -985,6 +985,19 @@ static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMIPSState *e
enum {
HWCAP_MIPS_R6 = (1 << 0),
HWCAP_MIPS_MSA = (1 << 1),
+ HWCAP_MIPS_CRC32 = (1 << 2),
+ HWCAP_MIPS_MIPS16 = (1 << 3),
+ HWCAP_MIPS_MDMX = (1 << 4),
+ HWCAP_MIPS_MIPS3D = (1 << 5),
+ HWCAP_MIPS_SMARTMIPS = (1 << 6),
+ HWCAP_MIPS_DSP = (1 << 7),
+ HWCAP_MIPS_DSP2 = (1 << 8),
+ HWCAP_MIPS_DSP3 = (1 << 9),
+ HWCAP_MIPS_MIPS16E2 = (1 << 10),
+ HWCAP_LOONGSON_MMI = (1 << 11),
+ HWCAP_LOONGSON_EXT = (1 << 12),
+ HWCAP_LOONGSON_EXT2 = (1 << 13),
+ HWCAP_LOONGSON_CPUCFG = (1 << 14),
};
#define ELF_HWCAP get_elf_hwcap()
--
2.26.2
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 6/6] linux-user: Add support for MIPS Loongson 2F/3E
2020-12-01 13:35 [PATCH v2 0/6] linux-user: Rework get_elf_hwcap() and support MIPS Loongson 2F/3E Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2020-12-01 13:35 ` [PATCH v2 5/6] linux-user/elfload: Update HWCAP bits from linux 5.7 Philippe Mathieu-Daudé
@ 2020-12-01 13:35 ` Philippe Mathieu-Daudé
5 siblings, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-01 13:35 UTC (permalink / raw)
To: Huacai Chen, Jiaxun Yang, qemu-devel
Cc: Aleksandar Rikalo, Richard Henderson, Philippe Mathieu-Daudé,
Laurent Vivier, Meng Zhuo, Aurelien Jarno
Userland ELF binaries using Longsoon SIMD instructions have the
HWCAP_LOONGSON_MMI bit set [1].
Binaries compiled for Longsoon 3E [2] have the HWCAP_LOONGSON_EXT
bit set for the LQ / SQ instructions.
[1] commit 8e2d5831e4b ("target/mips: Legalize Loongson insn flags")
[2] commit af868995e1b ("target/mips: Add Loongson-3 CPU definition")
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
linux-user/elfload.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 167ffbfb06c..3b4fc3126da 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -1022,6 +1022,8 @@ static uint32_t get_elf_hwcap(void)
GET_FEATURE_REG_EQU(CP0_Config0, 7 << CP0C0_AR, 2, HWCAP_MIPS_R6);
GET_FEATURE_REG_SET(CP0_Config3, 1 << CP0C3_MSAP, HWCAP_MIPS_MSA);
+ GET_FEATURE_INSN(ASE_LMMI, HWCAP_LOONGSON_MMI);
+ GET_FEATURE_INSN(ASE_LEXT, HWCAP_LOONGSON_EXT);
return hwcaps;
}
--
2.26.2
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v2 4/6] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_EQU() macro
2020-12-01 13:35 ` [PATCH v2 4/6] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_EQU() macro Philippe Mathieu-Daudé
@ 2020-12-01 17:36 ` Richard Henderson
2020-12-01 19:00 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 12+ messages in thread
From: Richard Henderson @ 2020-12-01 17:36 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, Huacai Chen, Jiaxun Yang, qemu-devel
Cc: Aleksandar Rikalo, Laurent Vivier, Aurelien Jarno, Meng Zhuo
On 12/1/20 7:35 AM, Philippe Mathieu-Daudé wrote:
> +#define GET_FEATURE_REG_EQU(_reg, _mask, _val, _hwcap) \
> + do { \
> + if ((cpu->env._reg & (_mask)) == _val) { \
> + hwcaps |= _hwcap; \
> + } \
> + } while (0)
> +
> static uint32_t get_elf_hwcap(void)
> {
> MIPSCPU *cpu = MIPS_CPU(thread_cpu);
> uint32_t hwcaps = 0;
>
> - GET_FEATURE_INSN(ISA_MIPS32R6 | ISA_MIPS64R6, HWCAP_MIPS_R6);
> + GET_FEATURE_REG_EQU(CP0_Config0, 7 << CP0C0_AR, 2, HWCAP_MIPS_R6);
You'd need 2 << CP0C0_AR for the equality to match.
Would it be better to have the shift as a separate argument?
r~
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/6] linux-user/elfload: Move GET_FEATURE macro out of get_elf_hwcap() body
2020-12-01 13:35 ` [PATCH v2 1/6] linux-user/elfload: Move GET_FEATURE macro out of get_elf_hwcap() body Philippe Mathieu-Daudé
@ 2020-12-01 17:38 ` Richard Henderson
0 siblings, 0 replies; 12+ messages in thread
From: Richard Henderson @ 2020-12-01 17:38 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, Huacai Chen, Jiaxun Yang, qemu-devel
Cc: Aleksandar Rikalo, Laurent Vivier, Aurelien Jarno, Meng Zhuo
On 12/1/20 7:35 AM, Philippe Mathieu-Daudé wrote:
> As we are going to add more macros, keep the function body clear.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> linux-user/elfload.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/6] linux-user/elfload: Rename MIPS GET_FEATURE() as GET_FEATURE_INSN()
2020-12-01 13:35 ` [PATCH v2 2/6] linux-user/elfload: Rename MIPS GET_FEATURE() as GET_FEATURE_INSN() Philippe Mathieu-Daudé
@ 2020-12-01 17:38 ` Richard Henderson
0 siblings, 0 replies; 12+ messages in thread
From: Richard Henderson @ 2020-12-01 17:38 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, Huacai Chen, Jiaxun Yang, qemu-devel
Cc: Aleksandar Rikalo, Laurent Vivier, Aurelien Jarno, Meng Zhuo
On 12/1/20 7:35 AM, Philippe Mathieu-Daudé wrote:
> We want to add macros similar to GET_FEATURE().
> As this one use the 'insn_flags' field, rename it
> GET_FEATURE_INSN().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> linux-user/elfload.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/6] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_SET() macro
2020-12-01 13:35 ` [PATCH v2 3/6] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_SET() macro Philippe Mathieu-Daudé
@ 2020-12-01 17:39 ` Richard Henderson
0 siblings, 0 replies; 12+ messages in thread
From: Richard Henderson @ 2020-12-01 17:39 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, Huacai Chen, Jiaxun Yang, qemu-devel
Cc: Aleksandar Rikalo, Laurent Vivier, Aurelien Jarno, Meng Zhuo
On 12/1/20 7:35 AM, Philippe Mathieu-Daudé wrote:
> ISA features are usually denoted in read-only bits from
> CPU registers. Add the GET_FEATURE_REG_SET() macro which
> checks if a CPU register has bits set.
>
> Use the macro to check for MSA (which sets the MSAP bit of
> the Config3 register when the ASE implementation is present).
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> linux-user/elfload.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 4/6] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_EQU() macro
2020-12-01 17:36 ` Richard Henderson
@ 2020-12-01 19:00 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-01 19:00 UTC (permalink / raw)
To: Richard Henderson, Huacai Chen, Jiaxun Yang, qemu-devel
Cc: Aleksandar Rikalo, Laurent Vivier, Aurelien Jarno, Meng Zhuo
On 12/1/20 6:36 PM, Richard Henderson wrote:
> On 12/1/20 7:35 AM, Philippe Mathieu-Daudé wrote:
>> +#define GET_FEATURE_REG_EQU(_reg, _mask, _val, _hwcap) \
>> + do { \
>> + if ((cpu->env._reg & (_mask)) == _val) { \
>> + hwcaps |= _hwcap; \
>> + } \
>> + } while (0)
>> +
>> static uint32_t get_elf_hwcap(void)
>> {
>> MIPSCPU *cpu = MIPS_CPU(thread_cpu);
>> uint32_t hwcaps = 0;
>>
>> - GET_FEATURE_INSN(ISA_MIPS32R6 | ISA_MIPS64R6, HWCAP_MIPS_R6);
>> + GET_FEATURE_REG_EQU(CP0_Config0, 7 << CP0C0_AR, 2, HWCAP_MIPS_R6);
>
> You'd need 2 << CP0C0_AR for the equality to match.
Oops...
> Would it be better to have the shift as a separate argument?
Yes, thanks!
Phil.
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2020-12-01 19:02 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-12-01 13:35 [PATCH v2 0/6] linux-user: Rework get_elf_hwcap() and support MIPS Loongson 2F/3E Philippe Mathieu-Daudé
2020-12-01 13:35 ` [PATCH v2 1/6] linux-user/elfload: Move GET_FEATURE macro out of get_elf_hwcap() body Philippe Mathieu-Daudé
2020-12-01 17:38 ` Richard Henderson
2020-12-01 13:35 ` [PATCH v2 2/6] linux-user/elfload: Rename MIPS GET_FEATURE() as GET_FEATURE_INSN() Philippe Mathieu-Daudé
2020-12-01 17:38 ` Richard Henderson
2020-12-01 13:35 ` [PATCH v2 3/6] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_SET() macro Philippe Mathieu-Daudé
2020-12-01 17:39 ` Richard Henderson
2020-12-01 13:35 ` [PATCH v2 4/6] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_EQU() macro Philippe Mathieu-Daudé
2020-12-01 17:36 ` Richard Henderson
2020-12-01 19:00 ` Philippe Mathieu-Daudé
2020-12-01 13:35 ` [PATCH v2 5/6] linux-user/elfload: Update HWCAP bits from linux 5.7 Philippe Mathieu-Daudé
2020-12-01 13:35 ` [PATCH v2 6/6] linux-user: Add support for MIPS Loongson 2F/3E Philippe Mathieu-Daudé
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