* [PATCH] hw/riscv: sifive_u: Use SIFIVE_U_CPU for mc->default_cpu_type
@ 2021-01-09 14:36 Bin Meng
2021-01-09 23:44 ` Philippe Mathieu-Daudé
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Bin Meng @ 2021-01-09 14:36 UTC (permalink / raw)
To: Alistair Francis, qemu-riscv, qemu-devel; +Cc: Bin Meng
From: Bin Meng <bin.meng@windriver.com>
SIFIVE_U_CPU is conditionally set to SIFIVE_U34 or SIFIVE_U54, hence
there is no need to use #idef to set the mc->default_cpu_type.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
---
hw/riscv/sifive_u.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index f5c400dd44..e083510e0e 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -628,11 +628,7 @@ static void sifive_u_machine_class_init(ObjectClass *oc, void *data)
mc->init = sifive_u_machine_init;
mc->max_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + SIFIVE_U_COMPUTE_CPU_COUNT;
mc->min_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + 1;
-#if defined(TARGET_RISCV32)
- mc->default_cpu_type = TYPE_RISCV_CPU_SIFIVE_U34;
-#elif defined(TARGET_RISCV64)
- mc->default_cpu_type = TYPE_RISCV_CPU_SIFIVE_U54;
-#endif
+ mc->default_cpu_type = SIFIVE_U_CPU;
mc->default_cpus = mc->min_cpus;
object_class_property_add_bool(oc, "start-in-flash",
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] hw/riscv: sifive_u: Use SIFIVE_U_CPU for mc->default_cpu_type
2021-01-09 14:36 [PATCH] hw/riscv: sifive_u: Use SIFIVE_U_CPU for mc->default_cpu_type Bin Meng
@ 2021-01-09 23:44 ` Philippe Mathieu-Daudé
2021-01-14 20:21 ` Alistair Francis
2021-01-14 20:33 ` Alistair Francis
2 siblings, 0 replies; 4+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-09 23:44 UTC (permalink / raw)
To: Bin Meng, Alistair Francis, qemu-riscv, qemu-devel; +Cc: Bin Meng
On 1/9/21 3:36 PM, Bin Meng wrote:
> From: Bin Meng <bin.meng@windriver.com>
>
> SIFIVE_U_CPU is conditionally set to SIFIVE_U34 or SIFIVE_U54, hence
> there is no need to use #idef to set the mc->default_cpu_type.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
> ---
>
> hw/riscv/sifive_u.c | 6 +-----
> 1 file changed, 1 insertion(+), 5 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] hw/riscv: sifive_u: Use SIFIVE_U_CPU for mc->default_cpu_type
2021-01-09 14:36 [PATCH] hw/riscv: sifive_u: Use SIFIVE_U_CPU for mc->default_cpu_type Bin Meng
2021-01-09 23:44 ` Philippe Mathieu-Daudé
@ 2021-01-14 20:21 ` Alistair Francis
2021-01-14 20:33 ` Alistair Francis
2 siblings, 0 replies; 4+ messages in thread
From: Alistair Francis @ 2021-01-14 20:21 UTC (permalink / raw)
To: Bin Meng
Cc: open list:RISC-V, Bin Meng, Alistair Francis,
qemu-devel@nongnu.org Developers
On Sat, Jan 9, 2021 at 6:37 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> From: Bin Meng <bin.meng@windriver.com>
>
> SIFIVE_U_CPU is conditionally set to SIFIVE_U34 or SIFIVE_U54, hence
> there is no need to use #idef to set the mc->default_cpu_type.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
>
> hw/riscv/sifive_u.c | 6 +-----
> 1 file changed, 1 insertion(+), 5 deletions(-)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index f5c400dd44..e083510e0e 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -628,11 +628,7 @@ static void sifive_u_machine_class_init(ObjectClass *oc, void *data)
> mc->init = sifive_u_machine_init;
> mc->max_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + SIFIVE_U_COMPUTE_CPU_COUNT;
> mc->min_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + 1;
> -#if defined(TARGET_RISCV32)
> - mc->default_cpu_type = TYPE_RISCV_CPU_SIFIVE_U34;
> -#elif defined(TARGET_RISCV64)
> - mc->default_cpu_type = TYPE_RISCV_CPU_SIFIVE_U54;
> -#endif
> + mc->default_cpu_type = SIFIVE_U_CPU;
> mc->default_cpus = mc->min_cpus;
>
> object_class_property_add_bool(oc, "start-in-flash",
> --
> 2.25.1
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] hw/riscv: sifive_u: Use SIFIVE_U_CPU for mc->default_cpu_type
2021-01-09 14:36 [PATCH] hw/riscv: sifive_u: Use SIFIVE_U_CPU for mc->default_cpu_type Bin Meng
2021-01-09 23:44 ` Philippe Mathieu-Daudé
2021-01-14 20:21 ` Alistair Francis
@ 2021-01-14 20:33 ` Alistair Francis
2 siblings, 0 replies; 4+ messages in thread
From: Alistair Francis @ 2021-01-14 20:33 UTC (permalink / raw)
To: Bin Meng
Cc: open list:RISC-V, Bin Meng, Alistair Francis,
qemu-devel@nongnu.org Developers
On Sat, Jan 9, 2021 at 6:37 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> From: Bin Meng <bin.meng@windriver.com>
>
> SIFIVE_U_CPU is conditionally set to SIFIVE_U34 or SIFIVE_U54, hence
> there is no need to use #idef to set the mc->default_cpu_type.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
>
> hw/riscv/sifive_u.c | 6 +-----
> 1 file changed, 1 insertion(+), 5 deletions(-)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index f5c400dd44..e083510e0e 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -628,11 +628,7 @@ static void sifive_u_machine_class_init(ObjectClass *oc, void *data)
> mc->init = sifive_u_machine_init;
> mc->max_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + SIFIVE_U_COMPUTE_CPU_COUNT;
> mc->min_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + 1;
> -#if defined(TARGET_RISCV32)
> - mc->default_cpu_type = TYPE_RISCV_CPU_SIFIVE_U34;
> -#elif defined(TARGET_RISCV64)
> - mc->default_cpu_type = TYPE_RISCV_CPU_SIFIVE_U54;
> -#endif
> + mc->default_cpu_type = SIFIVE_U_CPU;
> mc->default_cpus = mc->min_cpus;
>
> object_class_property_add_bool(oc, "start-in-flash",
> --
> 2.25.1
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-01-14 20:35 UTC | newest]
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2021-01-09 14:36 [PATCH] hw/riscv: sifive_u: Use SIFIVE_U_CPU for mc->default_cpu_type Bin Meng
2021-01-09 23:44 ` Philippe Mathieu-Daudé
2021-01-14 20:21 ` Alistair Francis
2021-01-14 20:33 ` Alistair Francis
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