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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 14/21] hw/net/lan9118: Add symbolic constants for register offsets
Date: Tue, 12 Jan 2021 16:57:43 +0000	[thread overview]
Message-ID: <20210112165750.30475-15-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210112165750.30475-1-peter.maydell@linaro.org>

The lan9118 code mostly uses symbolic constants for register offsets;
the exceptions are those which the datasheet doesn't give an official
symbolic name to.

Add some names for the registers which don't already have them, based
on the longer names they are given in the memory map.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210108180401.2263-3-peter.maydell@linaro.org
---
 hw/net/lan9118.c | 24 ++++++++++++++++++------
 1 file changed, 18 insertions(+), 6 deletions(-)

diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c
index 13d469fe24f..abc796285ab 100644
--- a/hw/net/lan9118.c
+++ b/hw/net/lan9118.c
@@ -40,6 +40,17 @@ do { hw_error("lan9118: error: " fmt , ## __VA_ARGS__);} while (0)
 do { fprintf(stderr, "lan9118: error: " fmt , ## __VA_ARGS__);} while (0)
 #endif
 
+/* The tx and rx fifo ports are a range of aliased 32-bit registers */
+#define RX_DATA_FIFO_PORT_FIRST 0x00
+#define RX_DATA_FIFO_PORT_LAST 0x1f
+#define TX_DATA_FIFO_PORT_FIRST 0x20
+#define TX_DATA_FIFO_PORT_LAST 0x3f
+
+#define RX_STATUS_FIFO_PORT 0x40
+#define RX_STATUS_FIFO_PEEK 0x44
+#define TX_STATUS_FIFO_PORT 0x48
+#define TX_STATUS_FIFO_PEEK 0x4c
+
 #define CSR_ID_REV      0x50
 #define CSR_IRQ_CFG     0x54
 #define CSR_INT_STS     0x58
@@ -1020,7 +1031,8 @@ static void lan9118_writel(void *opaque, hwaddr offset,
     offset &= 0xff;
 
     //DPRINTF("Write reg 0x%02x = 0x%08x\n", (int)offset, val);
-    if (offset >= 0x20 && offset < 0x40) {
+    if (offset >= TX_DATA_FIFO_PORT_FIRST &&
+        offset <= TX_DATA_FIFO_PORT_LAST) {
         /* TX FIFO */
         tx_fifo_push(s, val);
         return;
@@ -1198,18 +1210,18 @@ static uint64_t lan9118_readl(void *opaque, hwaddr offset,
     lan9118_state *s = (lan9118_state *)opaque;
 
     //DPRINTF("Read reg 0x%02x\n", (int)offset);
-    if (offset < 0x20) {
+    if (offset <= RX_DATA_FIFO_PORT_LAST) {
         /* RX FIFO */
         return rx_fifo_pop(s);
     }
     switch (offset) {
-    case 0x40:
+    case RX_STATUS_FIFO_PORT:
         return rx_status_fifo_pop(s);
-    case 0x44:
+    case RX_STATUS_FIFO_PEEK:
         return s->rx_status_fifo[s->rx_status_fifo_head];
-    case 0x48:
+    case TX_STATUS_FIFO_PORT:
         return tx_status_fifo_pop(s);
-    case 0x4c:
+    case TX_STATUS_FIFO_PEEK:
         return s->tx_status_fifo[s->tx_status_fifo_head];
     case CSR_ID_REV:
         return 0x01180001;
-- 
2.20.1



  parent reply	other threads:[~2021-01-12 17:20 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-12 16:57 [PULL 00/21] target-arm queue Peter Maydell
2021-01-12 16:57 ` [PULL 01/21] target/arm: ARMv8.4-TTST extension Peter Maydell
2021-01-12 16:57 ` [PULL 02/21] target/arm: enable Small Translation tables in max CPU Peter Maydell
2021-01-12 16:57 ` [PULL 03/21] target/arm: fix typo in cpu.h ID_AA64PFR1 field name Peter Maydell
2021-01-12 16:57 ` [PULL 04/21] target/arm: make ARMCPU.clidr 64-bit Peter Maydell
2021-01-12 16:57 ` [PULL 05/21] target/arm: make ARMCPU.ctr 64-bit Peter Maydell
2021-01-12 16:57 ` [PULL 06/21] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h Peter Maydell
2021-01-12 16:57 ` [PULL 07/21] target/arm: add aarch64 ID register fields " Peter Maydell
2021-01-12 16:57 ` [PULL 08/21] target/arm: add aarch32 " Peter Maydell
2021-01-12 16:57 ` [PULL 09/21] ui/cocoa: Update path to docs in build tree Peter Maydell
2021-01-12 16:57 ` [PULL 10/21] docs: Add qemu-storage-daemon(1) manpage to meson.build Peter Maydell
2021-01-12 16:57 ` [PULL 11/21] docs: Build and install all the docs in a single manual Peter Maydell
2022-12-08  6:55   ` Stefan Weil via
2022-12-08 10:39     ` Peter Maydell
2021-01-12 16:57 ` [PULL 12/21] target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns Peter Maydell
2021-01-12 16:57 ` [PULL 13/21] hw/net/lan9118: Fix RX Status FIFO PEEK value Peter Maydell
2021-01-12 16:57 ` Peter Maydell [this message]
2021-01-12 16:57 ` [PULL 15/21] hw/misc: Add clock converter in NPCM7XX CLK module Peter Maydell
2021-01-12 16:57 ` [PULL 16/21] hw/timer: Refactor NPCM7XX Timer to use CLK clock Peter Maydell
2021-02-04  9:39   ` Philippe Mathieu-Daudé
2021-02-04 22:37     ` Hao Wu
2021-02-10 11:54       ` Philippe Mathieu-Daudé
2021-06-22 12:58         ` Philippe Mathieu-Daudé
2021-07-27 14:19       ` Peter Maydell
2021-07-27 18:07         ` Havard Skinnemoen
2021-01-12 16:57 ` [PULL 17/21] hw/adc: Add an ADC module for NPCM7XX Peter Maydell
2021-01-29 14:41   ` Philippe Mathieu-Daudé
2021-01-29 17:15     ` wuhaotsh--- via
2021-01-29 18:23       ` Philippe Mathieu-Daudé
2021-01-12 16:57 ` [PULL 18/21] hw/misc: Add a PWM " Peter Maydell
2021-01-13 16:02   ` Peter Maydell
2021-01-13 17:13     ` Hao Wu
2021-01-25 12:04       ` Peter Maydell
2021-01-12 16:57 ` [PULL 19/21] hw/misc: Add QTest for NPCM7XX PWM Module Peter Maydell
2021-01-12 16:57 ` [PULL 20/21] hw/*: Use type casting for SysBusDevice in NPCM7XX Peter Maydell
2021-01-12 16:57 ` [PULL 21/21] ui/cocoa: Fix openFile: deprecation on Big Sur Peter Maydell

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