Re: [PULL 17/21] hw/adc: Add an ADC module for NPCM7XX

["Philippe Mathieu-Daudé" <f4bug@amsat.org>]

Hi Hao Wu,

On 1/12/21 5:57 PM, Peter Maydell wrote:
> From: Hao Wu <wuhaotsh@google.com>
> 
> The ADC is part of NPCM7XX Module. Its behavior is controled by the
> ADC_CON register. It converts one of the eight analog inputs into a
> digital input and stores it in the ADC_DATA register when enabled.
> 
> Users can alter input value by using qom-set QMP command.
> 
> Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com>
> Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
> Signed-off-by: Hao Wu <wuhaotsh@google.com>
> Message-id: 20210108190945.949196-4-wuhaotsh@google.com
> [PMM: Added missing hw/adc/trace.h file]
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  docs/system/arm/nuvoton.rst    |   2 +-
>  meson.build                    |   1 +
>  hw/adc/trace.h                 |   1 +
>  include/hw/adc/npcm7xx_adc.h   |  69 ++++++
>  include/hw/arm/npcm7xx.h       |   2 +
>  hw/adc/npcm7xx_adc.c           | 301 ++++++++++++++++++++++++++
>  hw/arm/npcm7xx.c               |  24 ++-
>  tests/qtest/npcm7xx_adc-test.c | 377 +++++++++++++++++++++++++++++++++
>  hw/adc/meson.build             |   1 +
>  hw/adc/trace-events            |   5 +
>  tests/qtest/meson.build        |   3 +-
>  11 files changed, 783 insertions(+), 3 deletions(-)
>  create mode 100644 hw/adc/trace.h
>  create mode 100644 include/hw/adc/npcm7xx_adc.h
>  create mode 100644 hw/adc/npcm7xx_adc.c
>  create mode 100644 tests/qtest/npcm7xx_adc-test.c
>  create mode 100644 hw/adc/trace-events
...

> diff --git a/hw/adc/npcm7xx_adc.c b/hw/adc/npcm7xx_adc.c
> new file mode 100644
> index 00000000000..870a6d50c27
> --- /dev/null
> +++ b/hw/adc/npcm7xx_adc.c
> @@ -0,0 +1,301 @@
> +/*
> + * Nuvoton NPCM7xx ADC Module
> + *
> + * Copyright 2020 Google LLC
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
> + * for more details.
> + */
> +
> +#include "qemu/osdep.h"
> +#include "hw/adc/npcm7xx_adc.h"
> +#include "hw/qdev-clock.h"
> +#include "hw/qdev-properties.h"
> +#include "hw/registerfields.h"
> +#include "migration/vmstate.h"
> +#include "qemu/log.h"
> +#include "qemu/module.h"
> +#include "qemu/timer.h"
> +#include "qemu/units.h"
> +#include "trace.h"
> +
> +REG32(NPCM7XX_ADC_CON, 0x0)
> +REG32(NPCM7XX_ADC_DATA, 0x4)
> +
> +/* Register field definitions. */
> +#define NPCM7XX_ADC_CON_MUX(rv) extract32(rv, 24, 4)
> +#define NPCM7XX_ADC_CON_INT_EN  BIT(21)
> +#define NPCM7XX_ADC_CON_REFSEL  BIT(19)
> +#define NPCM7XX_ADC_CON_INT     BIT(18)
> +#define NPCM7XX_ADC_CON_EN      BIT(17)
> +#define NPCM7XX_ADC_CON_RST     BIT(16)
> +#define NPCM7XX_ADC_CON_CONV    BIT(14)
> +#define NPCM7XX_ADC_CON_DIV(rv) extract32(rv, 1, 8)
> +
> +#define NPCM7XX_ADC_MAX_RESULT      1023
> +#define NPCM7XX_ADC_DEFAULT_IREF    2000000
> +#define NPCM7XX_ADC_CONV_CYCLES     20
> +#define NPCM7XX_ADC_RESET_CYCLES    10
> +#define NPCM7XX_ADC_R0_INPUT        500000
> +#define NPCM7XX_ADC_R1_INPUT        1500000
> +
> +static void npcm7xx_adc_reset(NPCM7xxADCState *s)
> +{
> +    timer_del(&s->conv_timer);
> +    s->con = 0x000c0001;

This initialize CON to:

NPCM7XX_ADC_CON_REFSEL | NPCM7XX_ADC_CON_INT | BIT(0)

What is bit 0?

> +    s->data = 0x00000000;
> +}