* [PATCH] hw/riscv: sifive_e: Add 'const' to sifive_e_memmap[]
@ 2021-03-31 10:36 Bin Meng
2021-03-31 13:13 ` Philippe Mathieu-Daudé
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Bin Meng @ 2021-03-31 10:36 UTC (permalink / raw)
To: Alistair Francis, qemu-devel, qemu-riscv; +Cc: Emmanuel Blot
This was accidentally dropped before. Add it back.
Reported-by: Emmanuel Blot <eblot.ml@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
hw/riscv/sifive_e.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index f939bcf9ea..82096b3e5a 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -50,7 +50,7 @@
#include "sysemu/sysemu.h"
#include "exec/address-spaces.h"
-static MemMapEntry sifive_e_memmap[] = {
+static const MemMapEntry sifive_e_memmap[] = {
[SIFIVE_E_DEV_DEBUG] = { 0x0, 0x1000 },
[SIFIVE_E_DEV_MROM] = { 0x1000, 0x2000 },
[SIFIVE_E_DEV_OTP] = { 0x20000, 0x2000 },
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] hw/riscv: sifive_e: Add 'const' to sifive_e_memmap[]
2021-03-31 10:36 [PATCH] hw/riscv: sifive_e: Add 'const' to sifive_e_memmap[] Bin Meng
@ 2021-03-31 13:13 ` Philippe Mathieu-Daudé
2021-03-31 15:02 ` Alistair Francis
2021-03-31 15:26 ` Alistair Francis
2 siblings, 0 replies; 4+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-31 13:13 UTC (permalink / raw)
To: Bin Meng, Alistair Francis, qemu-devel, qemu-riscv; +Cc: Emmanuel Blot
On 3/31/21 12:36 PM, Bin Meng wrote:
> This was accidentally dropped before. Add it back.
>
Fixes: 732612856a8 ("hw/riscv: Drop 'struct MemmapEntry'")
> Reported-by: Emmanuel Blot <eblot.ml@gmail.com>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>
> hw/riscv/sifive_e.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
> index f939bcf9ea..82096b3e5a 100644
> --- a/hw/riscv/sifive_e.c
> +++ b/hw/riscv/sifive_e.c
> @@ -50,7 +50,7 @@
> #include "sysemu/sysemu.h"
> #include "exec/address-spaces.h"
>
> -static MemMapEntry sifive_e_memmap[] = {
> +static const MemMapEntry sifive_e_memmap[] = {
> [SIFIVE_E_DEV_DEBUG] = { 0x0, 0x1000 },
> [SIFIVE_E_DEV_MROM] = { 0x1000, 0x2000 },
> [SIFIVE_E_DEV_OTP] = { 0x20000, 0x2000 },
>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] hw/riscv: sifive_e: Add 'const' to sifive_e_memmap[]
2021-03-31 10:36 [PATCH] hw/riscv: sifive_e: Add 'const' to sifive_e_memmap[] Bin Meng
2021-03-31 13:13 ` Philippe Mathieu-Daudé
@ 2021-03-31 15:02 ` Alistair Francis
2021-03-31 15:26 ` Alistair Francis
2 siblings, 0 replies; 4+ messages in thread
From: Alistair Francis @ 2021-03-31 15:02 UTC (permalink / raw)
To: Bin Meng
Cc: open list:RISC-V, Emmanuel Blot, Alistair Francis,
qemu-devel@nongnu.org Developers
On Wed, Mar 31, 2021 at 6:36 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> This was accidentally dropped before. Add it back.
>
> Reported-by: Emmanuel Blot <eblot.ml@gmail.com>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
>
> hw/riscv/sifive_e.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
> index f939bcf9ea..82096b3e5a 100644
> --- a/hw/riscv/sifive_e.c
> +++ b/hw/riscv/sifive_e.c
> @@ -50,7 +50,7 @@
> #include "sysemu/sysemu.h"
> #include "exec/address-spaces.h"
>
> -static MemMapEntry sifive_e_memmap[] = {
> +static const MemMapEntry sifive_e_memmap[] = {
> [SIFIVE_E_DEV_DEBUG] = { 0x0, 0x1000 },
> [SIFIVE_E_DEV_MROM] = { 0x1000, 0x2000 },
> [SIFIVE_E_DEV_OTP] = { 0x20000, 0x2000 },
> --
> 2.25.1
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] hw/riscv: sifive_e: Add 'const' to sifive_e_memmap[]
2021-03-31 10:36 [PATCH] hw/riscv: sifive_e: Add 'const' to sifive_e_memmap[] Bin Meng
2021-03-31 13:13 ` Philippe Mathieu-Daudé
2021-03-31 15:02 ` Alistair Francis
@ 2021-03-31 15:26 ` Alistair Francis
2 siblings, 0 replies; 4+ messages in thread
From: Alistair Francis @ 2021-03-31 15:26 UTC (permalink / raw)
To: Bin Meng
Cc: open list:RISC-V, Emmanuel Blot, Alistair Francis,
qemu-devel@nongnu.org Developers
On Wed, Mar 31, 2021 at 6:36 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> This was accidentally dropped before. Add it back.
>
> Reported-by: Emmanuel Blot <eblot.ml@gmail.com>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
>
> hw/riscv/sifive_e.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
> index f939bcf9ea..82096b3e5a 100644
> --- a/hw/riscv/sifive_e.c
> +++ b/hw/riscv/sifive_e.c
> @@ -50,7 +50,7 @@
> #include "sysemu/sysemu.h"
> #include "exec/address-spaces.h"
>
> -static MemMapEntry sifive_e_memmap[] = {
> +static const MemMapEntry sifive_e_memmap[] = {
> [SIFIVE_E_DEV_DEBUG] = { 0x0, 0x1000 },
> [SIFIVE_E_DEV_MROM] = { 0x1000, 0x2000 },
> [SIFIVE_E_DEV_OTP] = { 0x20000, 0x2000 },
> --
> 2.25.1
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
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2021-03-31 10:36 [PATCH] hw/riscv: sifive_e: Add 'const' to sifive_e_memmap[] Bin Meng
2021-03-31 13:13 ` Philippe Mathieu-Daudé
2021-03-31 15:02 ` Alistair Francis
2021-03-31 15:26 ` Alistair Francis
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