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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 02/14] qemu-options.hx: Fix formatting of -machine memory-backend option
Date: Tue, 27 Jul 2021 11:47:49 +0100	[thread overview]
Message-ID: <20210727104801.29728-3-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210727104801.29728-1-peter.maydell@linaro.org>

The documentation of the -machine memory-backend has some minor
formatting errors:
 * Misindentation of the initial line meant that the whole option
   section is incorrectly indented in the HTML output compared to
   the other -machine options
 * The examples weren't indented, which meant that they were formatted
   as plain run-on text including outputting the "::" as text.
 * The a) b) list has no rst-format markup so it is rendered as
   a single run-on paragraph

Fix the formatting.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-id: 20210719105257.3599-1-peter.maydell@linaro.org
---
 qemu-options.hx | 30 +++++++++++++++++-------------
 1 file changed, 17 insertions(+), 13 deletions(-)

diff --git a/qemu-options.hx b/qemu-options.hx
index 99ed5ec5f15..83aa59a920f 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -98,28 +98,32 @@ SRST
         Enables or disables ACPI Heterogeneous Memory Attribute Table
         (HMAT) support. The default is off.
 
-     ``memory-backend='id'``
+    ``memory-backend='id'``
         An alternative to legacy ``-mem-path`` and ``mem-prealloc`` options.
         Allows to use a memory backend as main RAM.
 
         For example:
         ::
-        -object memory-backend-file,id=pc.ram,size=512M,mem-path=/hugetlbfs,prealloc=on,share=on
-        -machine memory-backend=pc.ram
-        -m 512M
+
+            -object memory-backend-file,id=pc.ram,size=512M,mem-path=/hugetlbfs,prealloc=on,share=on
+            -machine memory-backend=pc.ram
+            -m 512M
 
         Migration compatibility note:
-        a) as backend id one shall use value of 'default-ram-id', advertised by
-        machine type (available via ``query-machines`` QMP command), if migration
-        to/from old QEMU (<5.0) is expected.
-        b) for machine types 4.0 and older, user shall
-        use ``x-use-canonical-path-for-ramblock-id=off`` backend option
-        if migration to/from old QEMU (<5.0) is expected.
+
+        * as backend id one shall use value of 'default-ram-id', advertised by
+          machine type (available via ``query-machines`` QMP command), if migration
+          to/from old QEMU (<5.0) is expected.
+        * for machine types 4.0 and older, user shall
+          use ``x-use-canonical-path-for-ramblock-id=off`` backend option
+          if migration to/from old QEMU (<5.0) is expected.
+
         For example:
         ::
-        -object memory-backend-ram,id=pc.ram,size=512M,x-use-canonical-path-for-ramblock-id=off
-        -machine memory-backend=pc.ram
-        -m 512M
+
+            -object memory-backend-ram,id=pc.ram,size=512M,x-use-canonical-path-for-ramblock-id=off
+            -machine memory-backend=pc.ram
+            -m 512M
 ERST
 
 HXCOMM Deprecated by -machine
-- 
2.20.1



  parent reply	other threads:[~2021-07-27 10:54 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-27 10:47 [PULL 00/14] target-arm queue Peter Maydell
2021-07-27 10:47 ` [PULL 01/14] hw/arm/smmuv3: Check 31st bit to see if CD is valid Peter Maydell
2021-07-27 10:47 ` Peter Maydell [this message]
2021-07-27 10:47 ` [PULL 03/14] target/arm: Enforce that M-profile SP low 2 bits are always zero Peter Maydell
2021-07-27 10:47 ` [PULL 04/14] target/arm: Add missing 'return's after calling v7m_exception_taken() Peter Maydell
2021-07-27 10:47 ` [PULL 05/14] target/arm: Report M-profile alignment faults correctly to the guest Peter Maydell
2021-07-27 10:47 ` [PULL 06/14] hw/intc/armv7m_nvic: ISCR.ISRPENDING is set for non-enabled pending interrupts Peter Maydell
2021-07-27 10:47 ` [PULL 07/14] hw/intc/armv7m_nvic: Correct size of ICSR.VECTPENDING Peter Maydell
2021-07-27 10:47 ` [PULL 08/14] hw/intc/armv7m_nvic: for v8.1M VECTPENDING hides S exceptions from NS Peter Maydell
2021-07-27 10:47 ` [PULL 09/14] docs: Update path that mentions deprecated.rst Peter Maydell
2021-07-27 10:47 ` [PULL 10/14] target/arm: Correctly bound length in sve_zcr_get_valid_len Peter Maydell
2021-07-27 10:47 ` [PULL 11/14] target/arm: Export aarch64_sve_zcr_get_valid_len Peter Maydell
2021-07-27 10:47 ` [PULL 12/14] target/arm: Add sve-default-vector-length cpu property Peter Maydell
2021-07-27 10:48 ` [PULL 13/14] hw/arm/nseries: Display hexadecimal value with '0x' prefix Peter Maydell
2021-07-27 10:48 ` [PULL 14/14] hw: aspeed_gpio: Fix memory size Peter Maydell
2021-07-27 17:05 ` [PULL 00/14] target-arm queue Peter Maydell

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