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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Eduardo Habkost" <ehabkost@redhat.com>
Subject: [PATCH v6 14/40] accel/tcg: Implement AccelOpsClass::has_work()
Date: Fri, 24 Sep 2021 11:38:21 +0200	[thread overview]
Message-ID: <20210924093847.1014331-15-f4bug@amsat.org> (raw)
In-Reply-To: <20210924093847.1014331-1-f4bug@amsat.org>

All accelerators but TCG implement their AccelOpsClass::has_work()
handler, meaning all the remaining CPUClass::has_work() ones are
only reachable from TCG accelerator; and these has_work() handlers
belong to TCGCPUOps.

We will gradually move each target CPUClass::has_work() to
TCGCPUOps in the following commits.
For now, move the CPUClass::has_work() call to tcg_cpu_has_work(),
the TCG AccelOpsClass::has_work() implementation.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 include/hw/core/cpu.h     |  2 +-
 accel/tcg/tcg-accel-ops.c | 11 +++++++++++
 softmmu/cpus.c            |  5 -----
 3 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index e2dd171a13f..114eb3b9b2c 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -89,7 +89,7 @@ struct SysemuCPUOps;
  * instantiatable CPU type.
  * @parse_features: Callback to parse command line arguments.
  * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
- * @has_work: Callback for checking if there is work to do.
+ * @has_work: Callback for checking if there is work to do. Only used by TCG.
  * @memory_rw_debug: Callback for GDB memory access.
  * @dump_state: Callback for dumping state.
  * @get_arch_id: Callback for getting architecture-dependent CPU ID.
diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c
index 1a8e8390bd6..ebaacff1842 100644
--- a/accel/tcg/tcg-accel-ops.c
+++ b/accel/tcg/tcg-accel-ops.c
@@ -73,6 +73,16 @@ int tcg_cpus_exec(CPUState *cpu)
     return ret;
 }
 
+static bool tcg_cpu_has_work(CPUState *cpu)
+{
+    CPUClass *cc = CPU_GET_CLASS(cpu);
+
+    if (cc->has_work) {
+        return cc->has_work(cpu);
+    }
+    return false;
+}
+
 /* mask must never be zero, except for A20 change call */
 void tcg_handle_interrupt(CPUState *cpu, int mask)
 {
@@ -108,6 +118,7 @@ static void tcg_accel_ops_init(AccelOpsClass *ops)
         ops->kick_vcpu_thread = rr_kick_vcpu_thread;
         ops->handle_interrupt = tcg_handle_interrupt;
     }
+    ops->has_work = tcg_cpu_has_work;
 }
 
 static void tcg_accel_ops_class_init(ObjectClass *oc, void *data)
diff --git a/softmmu/cpus.c b/softmmu/cpus.c
index 5ffa02f9cef..bb16a25bcef 100644
--- a/softmmu/cpus.c
+++ b/softmmu/cpus.c
@@ -251,11 +251,6 @@ void cpu_interrupt(CPUState *cpu, int mask)
 
 bool cpu_has_work(CPUState *cpu)
 {
-    CPUClass *cc = CPU_GET_CLASS(cpu);
-
-    if (cc->has_work && cc->has_work(cpu)) {
-        return true;
-    }
     if (cpus_accel->has_work && cpus_accel->has_work(cpu)) {
         return true;
     }
-- 
2.31.1



  parent reply	other threads:[~2021-09-24  9:59 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-24  9:38 [PATCH v6 00/40] accel: Move has_work() from CPUClass to AccelOpsClass Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 01/40] accel: Simplify qemu_init_vcpu() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 02/40] accel/tcg: Restrict cpu_handle_halt() to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 03/40] hw/core: Restrict cpu_has_work() " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 04/40] hw/core: Un-inline cpu_has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 05/40] hw/core: Move cpu_common_has_work() to cpu_has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 06/40] accel: Introduce AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 07/40] accel/kvm: Implement AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 08/40] accel/whpx: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 09/40] accel/hvf: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 10/40] accel/xen: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 11/40] accel/hax: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 12/40] accel/nvmm: " Philippe Mathieu-Daudé
2021-09-27 19:34   ` Kamil Rytarowski
2021-09-24  9:38 ` [PATCH v6 13/40] accel/qtest: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` Philippe Mathieu-Daudé [this message]
2021-09-24  9:38 ` [PATCH v6 15/40] accel: Simplify cpu_has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 16/40] accel/tcg: Introduce TCGCPUOps::has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 17/40] target/arm: Explicit v7M cores use arm_cpu_has_work as CPUClass:has_work Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 18/40] target/arm: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 19/40] target/avr: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24 15:14   ` Michael Rolnik
2021-09-24  9:38 ` [PATCH v6 20/40] target/cris: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 21/40] target/hexagon: Remove unused has_work() handler Philippe Mathieu-Daudé
2021-09-24 18:49   ` Taylor Simpson
2021-09-24  9:38 ` [PATCH v6 22/40] target/hppa: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 23/40] target/i386: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 24/40] target/m68k: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 25/40] target/microblaze: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 26/40] target/mips: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 27/40] target/nios2: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 28/40] target/openrisc: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 29/40] target/ppc: Introduce PowerPCCPUClass::has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 30/40] target/ppc: Restrict has_work() handlers to sysemu and TCG Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 31/40] target/riscv: Restrict has_work() handler " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 32/40] target/rx: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 33/40] target/s390x: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 34/40] target/sh4: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 35/40] target/sparc: Remove pointless use of CONFIG_TCG definition Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 36/40] target/sparc: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 37/40] target/tricore: " Philippe Mathieu-Daudé
2021-09-24 12:45   ` Bastian Koppelmann
2021-09-24  9:38 ` [PATCH v6 38/40] target/xtensa: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 39/40] accel/tcg: Remove CPUClass::has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 40/40] accel/tcg: Simplify tcg_cpu_has_work() Philippe Mathieu-Daudé
2021-09-25 14:20 ` [PATCH v6 00/40] accel: Move has_work() from CPUClass to AccelOpsClass Philippe Mathieu-Daudé

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