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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Artyom Tarasenko" <atar4qemu@gmail.com>
Subject: [PATCH v6 35/40] target/sparc: Remove pointless use of CONFIG_TCG definition
Date: Fri, 24 Sep 2021 11:38:42 +0200	[thread overview]
Message-ID: <20210924093847.1014331-36-f4bug@amsat.org> (raw)
In-Reply-To: <20210924093847.1014331-1-f4bug@amsat.org>

The SPARC target only support TCG acceleration. Remove the CONFIG_TCG
definition introduced by mistake in commit 78271684719 ("cpu: tcg_ops:
move to tcg-cpu-ops.h, keep a pointer in CPUClass").

Reported-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/sparc/cpu.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 21dd27796d0..0d252cb5bdc 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -859,7 +859,6 @@ static const struct SysemuCPUOps sparc_sysemu_ops = {
 };
 #endif
 
-#ifdef CONFIG_TCG
 #include "hw/core/tcg-cpu-ops.h"
 
 static const struct TCGCPUOps sparc_tcg_ops = {
@@ -874,7 +873,6 @@ static const struct TCGCPUOps sparc_tcg_ops = {
     .do_unaligned_access = sparc_cpu_do_unaligned_access,
 #endif /* !CONFIG_USER_ONLY */
 };
-#endif /* CONFIG_TCG */
 
 static void sparc_cpu_class_init(ObjectClass *oc, void *data)
 {
-- 
2.31.1



  parent reply	other threads:[~2021-09-24 10:09 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-24  9:38 [PATCH v6 00/40] accel: Move has_work() from CPUClass to AccelOpsClass Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 01/40] accel: Simplify qemu_init_vcpu() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 02/40] accel/tcg: Restrict cpu_handle_halt() to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 03/40] hw/core: Restrict cpu_has_work() " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 04/40] hw/core: Un-inline cpu_has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 05/40] hw/core: Move cpu_common_has_work() to cpu_has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 06/40] accel: Introduce AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 07/40] accel/kvm: Implement AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 08/40] accel/whpx: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 09/40] accel/hvf: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 10/40] accel/xen: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 11/40] accel/hax: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 12/40] accel/nvmm: " Philippe Mathieu-Daudé
2021-09-27 19:34   ` Kamil Rytarowski
2021-09-24  9:38 ` [PATCH v6 13/40] accel/qtest: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 14/40] accel/tcg: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 15/40] accel: Simplify cpu_has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 16/40] accel/tcg: Introduce TCGCPUOps::has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 17/40] target/arm: Explicit v7M cores use arm_cpu_has_work as CPUClass:has_work Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 18/40] target/arm: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 19/40] target/avr: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24 15:14   ` Michael Rolnik
2021-09-24  9:38 ` [PATCH v6 20/40] target/cris: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 21/40] target/hexagon: Remove unused has_work() handler Philippe Mathieu-Daudé
2021-09-24 18:49   ` Taylor Simpson
2021-09-24  9:38 ` [PATCH v6 22/40] target/hppa: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 23/40] target/i386: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 24/40] target/m68k: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 25/40] target/microblaze: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 26/40] target/mips: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 27/40] target/nios2: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 28/40] target/openrisc: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 29/40] target/ppc: Introduce PowerPCCPUClass::has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 30/40] target/ppc: Restrict has_work() handlers to sysemu and TCG Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 31/40] target/riscv: Restrict has_work() handler " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 32/40] target/rx: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 33/40] target/s390x: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 34/40] target/sh4: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` Philippe Mathieu-Daudé [this message]
2021-09-24  9:38 ` [PATCH v6 36/40] target/sparc: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 37/40] target/tricore: " Philippe Mathieu-Daudé
2021-09-24 12:45   ` Bastian Koppelmann
2021-09-24  9:38 ` [PATCH v6 38/40] target/xtensa: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 39/40] accel/tcg: Remove CPUClass::has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 40/40] accel/tcg: Simplify tcg_cpu_has_work() Philippe Mathieu-Daudé
2021-09-25 14:20 ` [PATCH v6 00/40] accel: Move has_work() from CPUClass to AccelOpsClass Philippe Mathieu-Daudé

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