qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH v6 15/40] accel: Simplify cpu_has_work()
Date: Fri, 24 Sep 2021 11:38:22 +0200	[thread overview]
Message-ID: <20210924093847.1014331-16-f4bug@amsat.org> (raw)
In-Reply-To: <20210924093847.1014331-1-f4bug@amsat.org>

Now that all accelerators implement a has_work() handler, we can
simplify cpu_has_work() by removing the non-NULL handler check.

Add an assertion in cpus_register_accel() for future accelerators.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 softmmu/cpus.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/softmmu/cpus.c b/softmmu/cpus.c
index bb16a25bcef..bbb83d5982a 100644
--- a/softmmu/cpus.c
+++ b/softmmu/cpus.c
@@ -251,10 +251,7 @@ void cpu_interrupt(CPUState *cpu, int mask)
 
 bool cpu_has_work(CPUState *cpu)
 {
-    if (cpus_accel->has_work && cpus_accel->has_work(cpu)) {
-        return true;
-    }
-    return false;
+    return cpus_accel->has_work(cpu);
 }
 
 static int do_vm_stop(RunState state, bool send_stop)
@@ -613,6 +610,7 @@ void cpus_register_accel(const AccelOpsClass *ops)
 
     /* Mandatory non-NULL handlers */
     assert(ops->create_vcpu_thread != NULL);
+    assert(ops->has_work != NULL);
 
     cpus_accel = ops;
 }
-- 
2.31.1



  parent reply	other threads:[~2021-09-24  9:48 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-24  9:38 [PATCH v6 00/40] accel: Move has_work() from CPUClass to AccelOpsClass Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 01/40] accel: Simplify qemu_init_vcpu() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 02/40] accel/tcg: Restrict cpu_handle_halt() to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 03/40] hw/core: Restrict cpu_has_work() " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 04/40] hw/core: Un-inline cpu_has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 05/40] hw/core: Move cpu_common_has_work() to cpu_has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 06/40] accel: Introduce AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 07/40] accel/kvm: Implement AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 08/40] accel/whpx: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 09/40] accel/hvf: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 10/40] accel/xen: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 11/40] accel/hax: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 12/40] accel/nvmm: " Philippe Mathieu-Daudé
2021-09-27 19:34   ` Kamil Rytarowski
2021-09-24  9:38 ` [PATCH v6 13/40] accel/qtest: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 14/40] accel/tcg: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` Philippe Mathieu-Daudé [this message]
2021-09-24  9:38 ` [PATCH v6 16/40] accel/tcg: Introduce TCGCPUOps::has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 17/40] target/arm: Explicit v7M cores use arm_cpu_has_work as CPUClass:has_work Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 18/40] target/arm: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 19/40] target/avr: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24 15:14   ` Michael Rolnik
2021-09-24  9:38 ` [PATCH v6 20/40] target/cris: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 21/40] target/hexagon: Remove unused has_work() handler Philippe Mathieu-Daudé
2021-09-24 18:49   ` Taylor Simpson
2021-09-24  9:38 ` [PATCH v6 22/40] target/hppa: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 23/40] target/i386: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 24/40] target/m68k: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 25/40] target/microblaze: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 26/40] target/mips: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 27/40] target/nios2: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 28/40] target/openrisc: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 29/40] target/ppc: Introduce PowerPCCPUClass::has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 30/40] target/ppc: Restrict has_work() handlers to sysemu and TCG Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 31/40] target/riscv: Restrict has_work() handler " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 32/40] target/rx: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 33/40] target/s390x: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 34/40] target/sh4: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 35/40] target/sparc: Remove pointless use of CONFIG_TCG definition Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 36/40] target/sparc: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 37/40] target/tricore: " Philippe Mathieu-Daudé
2021-09-24 12:45   ` Bastian Koppelmann
2021-09-24  9:38 ` [PATCH v6 38/40] target/xtensa: " Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 39/40] accel/tcg: Remove CPUClass::has_work() Philippe Mathieu-Daudé
2021-09-24  9:38 ` [PATCH v6 40/40] accel/tcg: Simplify tcg_cpu_has_work() Philippe Mathieu-Daudé
2021-09-25 14:20 ` [PATCH v6 00/40] accel: Move has_work() from CPUClass to AccelOpsClass Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210924093847.1014331-16-f4bug@amsat.org \
    --to=f4bug@amsat.org \
    --cc=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).