From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Subject: Re: [PULL 00/11] target-arm queue
Date: Wed, 5 Jul 2023 06:57:29 +0200 [thread overview]
Message-ID: <29a83e80-32b5-cbb2-8dbd-13192e485e1e@linaro.org> (raw)
In-Reply-To: <20230704163634.3188465-1-peter.maydell@linaro.org>
On 7/4/23 18:36, Peter Maydell wrote:
> docs/system/arm/sbsa.rst | 5 +-
> hw/arm/sbsa-ref.c | 23 +++--
> hw/misc/allwinner-sramc.c | 1 +
> target/arm/cpu.c | 65 ++++++++-----
> target/arm/gdbstub.c | 4 +
> target/arm/helper.c | 70 +++++++++++---
> target/arm/tcg/translate-sme.c | 24 +++--
> target/xtensa/exc_helper.c | 3 +
> tests/qtest/xlnx-canfd-test.c | 33 +++----
> tests/tcg/aarch64/icivau.c | 189 ++++++++++++++++++++++++++++++++++++++
> tests/tcg/aarch64/sme-outprod1.c | 83 +++++++++++++++++
> hw/arm/Kconfig | 2 +-
> tests/tcg/aarch64/Makefile.target | 13 ++-
> 13 files changed, 436 insertions(+), 79 deletions(-)
There's one more failure:
https://gitlab.com/qemu-project/qemu/-/jobs/4592433432#L3723
> /tmp/ccASXpLo.s: Assembler messages:
> /tmp/ccASXpLo.s:782: Error: selected processor does not support system register name 'id_aa64zfr0_el1'
> /tmp/ccASXpLo.s:829: Error: selected processor does not support system register name 'id_aa64smfr0_el1'
> make[1]: *** [Makefile:119: sysregs] Error 1
I guess it's the change to Makefile.target, as I don't see any other likely candidates.
r~
next prev parent reply other threads:[~2023-07-05 4:57 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-04 16:36 [PULL 00/11] target-arm queue Peter Maydell
2023-07-04 16:36 ` [PULL 01/11] target/arm: Add raw_writes ops for register whose write induce TLB maintenance Peter Maydell
2023-07-04 16:36 ` [PULL 02/11] hw/arm/sbsa-ref: use XHCI to replace EHCI Peter Maydell
2023-07-04 16:36 ` [PULL 03/11] target/arm: Avoid splitting Zregs across lines in dump Peter Maydell
2023-07-04 16:36 ` [PULL 04/11] target/arm: Dump ZA[] when active Peter Maydell
2023-07-04 16:36 ` [PULL 05/11] target/arm: Fix SME full tile indexing Peter Maydell
2023-07-04 16:36 ` [PULL 06/11] target/arm: Handle IC IVAU to improve compatibility with JITs Peter Maydell
2023-07-04 16:36 ` [PULL 07/11] tests/tcg/aarch64: Add testcases for IC IVAU and dual-mapped code Peter Maydell
2023-07-05 4:53 ` Richard Henderson
2023-07-05 9:25 ` Philippe Mathieu-Daudé
2023-07-05 13:36 ` Richard Henderson
2023-07-06 12:26 ` Peter Maydell
2023-07-06 12:45 ` John Högberg
2023-07-06 12:54 ` Peter Maydell
2023-07-07 7:50 ` John Högberg
2023-07-04 16:36 ` [PULL 08/11] tests/qtest: xlnx-canfd-test: Fix code coverity issues Peter Maydell
2023-07-04 16:36 ` [PULL 09/11] target/arm: gdbstub: Guard M-profile code with CONFIG_TCG Peter Maydell
2023-07-04 16:36 ` [PULL 10/11] hw: arm: allwinner-sramc: Set class_size Peter Maydell
2023-07-04 16:36 ` [PULL 11/11] target/xtensa: Assert that interrupt level is within bounds Peter Maydell
2023-07-05 4:57 ` Richard Henderson [this message]
2023-07-05 5:04 ` [PULL 00/11] target-arm queue Richard Henderson
2023-07-06 11:35 ` Peter Maydell
-- strict thread matches above, loose matches on Subject: below --
2020-04-06 10:11 Peter Maydell
2020-04-06 12:52 ` Peter Maydell
2020-03-17 11:40 Peter Maydell
2020-03-17 16:21 ` Peter Maydell
2019-11-01 8:51 Peter Maydell
2019-11-01 9:30 ` Peter Maydell
2019-11-01 9:54 ` Andrew Jones
2019-11-01 10:34 ` Peter Maydell
2019-11-01 12:53 ` Peter Maydell
2019-11-01 14:25 ` Andrew Jones
2019-11-02 17:57 ` Peter Maydell
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