From: Salil Mehta via <qemu-devel@nongnu.org> To: Gavin Shan <gshan@redhat.com>, "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>, "qemu-arm@nongnu.org" <qemu-arm@nongnu.org> Cc: "maz@kernel.org" <maz@kernel.org>, "jean-philippe@linaro.org" <jean-philippe@linaro.org>, Jonathan Cameron <jonathan.cameron@huawei.com>, "lpieralisi@kernel.org" <lpieralisi@kernel.org>, "peter.maydell@linaro.org" <peter.maydell@linaro.org>, "richard.henderson@linaro.org" <richard.henderson@linaro.org>, "imammedo@redhat.com" <imammedo@redhat.com>, "andrew.jones@linux.dev" <andrew.jones@linux.dev>, "david@redhat.com" <david@redhat.com>, "philmd@linaro.org" <philmd@linaro.org>, "eric.auger@redhat.com" <eric.auger@redhat.com>, "will@kernel.org" <will@kernel.org>, "ardb@kernel.org" <ardb@kernel.org>, "oliver.upton@linux.dev" <oliver.upton@linux.dev>, "pbonzini@redhat.com" <pbonzini@redhat.com>, "mst@redhat.com" <mst@redhat.com>, "rafael@kernel.org" <rafael@kernel.org>, "borntraeger@linux.ibm.com" <borntraeger@linux.ibm.com>, "alex.bennee@linaro.org" <alex.bennee@linaro.org>, "linux@armlinux.org.uk" <linux@armlinux.org.uk>, "darren@os.amperecomputing.com" <darren@os.amperecomputing.com>, "ilkka@os.amperecomputing.com" <ilkka@os.amperecomputing.com>, "vishnu@os.amperecomputing.com" <vishnu@os.amperecomputing.com>, "karl.heubaum@oracle.com" <karl.heubaum@oracle.com>, "miguel.luis@oracle.com" <miguel.luis@oracle.com>, "salil.mehta@opnsrc.net" <salil.mehta@opnsrc.net>, zhukeqian <zhukeqian1@huawei.com>, "wangxiongfeng (C)" <wangxiongfeng2@huawei.com>, "wangyanan (Y)" <wangyanan55@huawei.com>, "jiakernel2@gmail.com" <jiakernel2@gmail.com>, "maobibo@loongson.cn" <maobibo@loongson.cn>, "lixianglai@loongson.cn" <lixianglai@loongson.cn> Subject: RE: [PATCH RFC V2 34/37] target/arm/kvm,tcg: Register/Handle SMCCC hypercall exits to VMM/Qemu Date: Tue, 17 Oct 2023 00:03:29 +0000 [thread overview] Message-ID: <363b994b5e904622a8f5dde980d48056@huawei.com> (raw) In-Reply-To: <a3ae4b88-6066-4c21-5fe5-cfe74bc58aaa@redhat.com> Hi Gavin, > From: Gavin Shan <gshan@redhat.com> > Sent: Friday, September 29, 2023 5:15 AM > To: Salil Mehta <salil.mehta@huawei.com>; qemu-devel@nongnu.org; qemu-arm@nongnu.org > Cc: maz@kernel.org; jean-philippe@linaro.org; Jonathan Cameron > <jonathan.cameron@huawei.com>; lpieralisi@kernel.org; > peter.maydell@linaro.org; richard.henderson@linaro.org; > imammedo@redhat.com; andrew.jones@linux.dev; david@redhat.com; > philmd@linaro.org; eric.auger@redhat.com; will@kernel.org; ardb@kernel.org; > oliver.upton@linux.dev; pbonzini@redhat.com; mst@redhat.com; > rafael@kernel.org; borntraeger@linux.ibm.com; alex.bennee@linaro.org; > linux@armlinux.org.uk; darren@os.amperecomputing.com; > ilkka@os.amperecomputing.com; vishnu@os.amperecomputing.com; > karl.heubaum@oracle.com; miguel.luis@oracle.com; salil.mehta@opnsrc.net; > zhukeqian <zhukeqian1@huawei.com>; wangxiongfeng (C) > <wangxiongfeng2@huawei.com>; wangyanan (Y) <wangyanan55@huawei.com>; > jiakernel2@gmail.com; maobibo@loongson.cn; lixianglai@loongson.cn > Subject: Re: [PATCH RFC V2 34/37] target/arm/kvm,tcg: Register/Handle SMCCC > hypercall exits to VMM/Qemu > > Hi Salil, > > On 9/26/23 20:36, Salil Mehta wrote: > > From: Author Salil Mehta <salil.mehta@huawei.com> > > > > Add registration and Handling of HVC/SMC hypercall exits to VMM > > > > Co-developed-by: Salil Mehta <salil.mehta@huawei.com> > > Signed-off-by: Salil Mehta <salil.mehta@huawei.com> > > Co-developed-by: Jean-Philippe Brucker <jean-philippe@linaro.org> > > Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> > > Signed-off-by: Salil Mehta <salil.mehta@huawei.com> [...] > > +static CPUArchId *arm_get_archid_by_id(uint64_t id) > > +{ > > + int n; > > + CPUArchId *arch_id; > > + MachineState *ms = MACHINE(qdev_get_machine()); > > + > > + /* > > + * At this point disabled CPUs don't have a CPUState, but their CPUArchId > > + * exists. > > + * > > + * TODO: Is arch_id == mp_affinity? This needs work. > > + */ > > + for (n = 0; n < ms->possible_cpus->len; n++) { > > + arch_id = &ms->possible_cpus->cpus[n]; > > + > > + if (arch_id->arch_id == id) { > > + return arch_id; > > + } > > + } > > + return NULL; > > +} > > + > > The @arch_id should be same thing to @mp_affinity except for the boot CPU. > For the boot CPU, its value is fetched from MPIDR, which is determined by > cs->cpu_index, passed to host via ioctl(CREATE_VCPU). Besides, another > similiar function qemu_get_cpu_archid() exists in cpus-common.c. I think > they can be combined. Again, all these information inherited from > ms->possible_cpus may be better to be managed in board level, like the > vCPU states. Yes, good catch. This has been existing for long so my eyes got biased. Thanks Salil. [...] > > @@ -168,12 +189,24 @@ int arm_set_cpu_on(uint64_t cpuid, uint64_t entry, > uint64_t context_id, > > } > > > > /* Retrieve the cpu we are powering up */ > > - target_cpu_state = arm_get_cpu_by_id(cpuid); > > - if (!target_cpu_state) { > > + arch_id = arm_get_archid_by_id(cpuid); > > + if (!arch_id) { > > /* The cpu was not found */ > > return QEMU_ARM_POWERCTL_INVALID_PARAM; > > } > > > > + target_cpu_state = CPU(arch_id->cpu); > > + if (!qemu_enabled_cpu(target_cpu_state)) { > > + /* > > + * The cpu is not plugged in or disabled. We should return appropriate > > + * value as introduced in DEN0022E PSCI 1.2 issue E > ^^^^^^^ > issue E, which is QEMU_PSCI_RET_DENIED. PSCI_RET_DENIED [...] > > --- a/target/arm/helper.c > > +++ b/target/arm/helper.c > > @@ -11187,7 +11187,7 @@ void arm_cpu_do_interrupt(CPUState *cs) > > env->exception.syndrome); > > } > > > > - if (tcg_enabled() && arm_is_psci_call(cpu, cs->exception_index)) { > > + if (arm_is_psci_call(cpu, cs->exception_index)) { > > arm_handle_psci_call(cpu); > > qemu_log_mask(CPU_LOG_INT, "...handled as PSCI call\n"); > > return; > > We may still limit the capability to handle PSCI calls to TCG and KVM, > meaning HVF and QTest won't have this capability. We do not support them now. I need to conditionally register SMCC calls With KVM. Will check this. Good point though. Thanks Salil. [...] > > diff --git a/target/arm/kvm.c b/target/arm/kvm.c > > index 8e7c68af6a..6f3fd5aecd 100644 > > --- a/target/arm/kvm.c > > +++ b/target/arm/kvm.c > > @@ -250,6 +250,7 @@ int kvm_arm_get_max_vm_ipa_size(MachineState *ms, > bool *fixed_ipa) > > int kvm_arch_init(MachineState *ms, KVMState *s) > > { > > int ret = 0; > > + > ^^^^ > Unnecessary change. Yes. Thanks. [...] > > @@ -280,6 +281,22 @@ int kvm_arch_init(MachineState *ms, KVMState *s) > > } > > } > > > > + /* > > + * To be able to handle PSCI CPU ON calls in QEMU, we need to install SMCCC > ^^ > ON/OFF Yes. > > + * filter in the Host KVM. This is required to support features like > > + * virtual CPU Hotplug on ARM platforms. > > + */ > > + if (kvm_arm_set_smccc_filter(PSCI_0_2_FN64_CPU_ON, > > + KVM_SMCCC_FILTER_FWD_TO_USER)) { > > + error_report("CPU On PSCI-to-user-space fwd filter install failed"); > > + abort(); > > + } > > + if (kvm_arm_set_smccc_filter(PSCI_0_2_FN_CPU_OFF, > > + KVM_SMCCC_FILTER_FWD_TO_USER)) { > > + error_report("CPU Off PSCI-to-user-space fwd filter install failed"); > > + abort(); > > + } > > + > > kvm_arm_init_debug(s); > > > > return ret; > > The PSCI_ON and PSCI_OFF will be unconditionally handled by QEMU if KVM is > enabled, even vCPU hotplug isn't supported on hw/arm/virt board. Do we need to > enable it only when vCPU hotplug is supported? Yes. True. I missed this earlier. It should be conditional. Thanks Salil. > > > @@ -952,6 +969,38 @@ static int kvm_arm_handle_dabt_nisv(CPUState *cs, > uint64_t esr_iss, > > return -1; > > } > > > > +static int kvm_arm_handle_hypercall(CPUState *cs, struct kvm_run *run) > > +{ > > + ARMCPU *cpu = ARM_CPU(cs); > > + CPUARMState *env = &cpu->env; > > + > > + kvm_cpu_synchronize_state(cs); > > + > > + /* > > + * hard coding immediate to 0 as we dont expect non-zero value as of now > ^^^^ > don't Thanks Salil.
WARNING: multiple messages have this Message-ID (diff)
From: Salil Mehta <salil.mehta@huawei.com> To: Gavin Shan <gshan@redhat.com>, "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>, "qemu-arm@nongnu.org" <qemu-arm@nongnu.org> Cc: "maz@kernel.org" <maz@kernel.org>, "jean-philippe@linaro.org" <jean-philippe@linaro.org>, Jonathan Cameron <jonathan.cameron@huawei.com>, "lpieralisi@kernel.org" <lpieralisi@kernel.org>, "peter.maydell@linaro.org" <peter.maydell@linaro.org>, "richard.henderson@linaro.org" <richard.henderson@linaro.org>, "imammedo@redhat.com" <imammedo@redhat.com>, "andrew.jones@linux.dev" <andrew.jones@linux.dev>, "david@redhat.com" <david@redhat.com>, "philmd@linaro.org" <philmd@linaro.org>, "eric.auger@redhat.com" <eric.auger@redhat.com>, "will@kernel.org" <will@kernel.org>, "ardb@kernel.org" <ardb@kernel.org>, "oliver.upton@linux.dev" <oliver.upton@linux.dev>, "pbonzini@redhat.com" <pbonzini@redhat.com>, "mst@redhat.com" <mst@redhat.com>, "rafael@kernel.org" <rafael@kernel.org>, "borntraeger@linux.ibm.com" <borntraeger@linux.ibm.com>, "alex.bennee@linaro.org" <alex.bennee@linaro.org>, "linux@armlinux.org.uk" <linux@armlinux.org.uk>, "darren@os.amperecomputing.com" <darren@os.amperecomputing.com>, "ilkka@os.amperecomputing.com" <ilkka@os.amperecomputing.com>, "vishnu@os.amperecomputing.com" <vishnu@os.amperecomputing.com>, "karl.heubaum@oracle.com" <karl.heubaum@oracle.com>, "miguel.luis@oracle.com" <miguel.luis@oracle.com>, "salil.mehta@opnsrc.net" <salil.mehta@opnsrc.net>, zhukeqian <zhukeqian1@huawei.com>, "wangxiongfeng (C)" <wangxiongfeng2@huawei.com>, "wangyanan (Y)" <wangyanan55@huawei.com>, "jiakernel2@gmail.com" <jiakernel2@gmail.com>, "maobibo@loongson.cn" <maobibo@loongson.cn>, "lixianglai@loongson.cn" <lixianglai@loongson.cn> Subject: RE: [PATCH RFC V2 34/37] target/arm/kvm,tcg: Register/Handle SMCCC hypercall exits to VMM/Qemu Date: Tue, 17 Oct 2023 00:03:29 +0000 [thread overview] Message-ID: <363b994b5e904622a8f5dde980d48056@huawei.com> (raw) Message-ID: <20231017000329.JmgzCVeB4Jid8WTTCpm7R-RoJsF5ULqV8V6mj7aduiE@z> (raw) In-Reply-To: <a3ae4b88-6066-4c21-5fe5-cfe74bc58aaa@redhat.com> Hi Gavin, > From: Gavin Shan <gshan@redhat.com> > Sent: Friday, September 29, 2023 5:15 AM > To: Salil Mehta <salil.mehta@huawei.com>; qemu-devel@nongnu.org; qemu-arm@nongnu.org > Cc: maz@kernel.org; jean-philippe@linaro.org; Jonathan Cameron > <jonathan.cameron@huawei.com>; lpieralisi@kernel.org; > peter.maydell@linaro.org; richard.henderson@linaro.org; > imammedo@redhat.com; andrew.jones@linux.dev; david@redhat.com; > philmd@linaro.org; eric.auger@redhat.com; will@kernel.org; ardb@kernel.org; > oliver.upton@linux.dev; pbonzini@redhat.com; mst@redhat.com; > rafael@kernel.org; borntraeger@linux.ibm.com; alex.bennee@linaro.org; > linux@armlinux.org.uk; darren@os.amperecomputing.com; > ilkka@os.amperecomputing.com; vishnu@os.amperecomputing.com; > karl.heubaum@oracle.com; miguel.luis@oracle.com; salil.mehta@opnsrc.net; > zhukeqian <zhukeqian1@huawei.com>; wangxiongfeng (C) > <wangxiongfeng2@huawei.com>; wangyanan (Y) <wangyanan55@huawei.com>; > jiakernel2@gmail.com; maobibo@loongson.cn; lixianglai@loongson.cn > Subject: Re: [PATCH RFC V2 34/37] target/arm/kvm,tcg: Register/Handle SMCCC > hypercall exits to VMM/Qemu > > Hi Salil, > > On 9/26/23 20:36, Salil Mehta wrote: > > From: Author Salil Mehta <salil.mehta@huawei.com> > > > > Add registration and Handling of HVC/SMC hypercall exits to VMM > > > > Co-developed-by: Salil Mehta <salil.mehta@huawei.com> > > Signed-off-by: Salil Mehta <salil.mehta@huawei.com> > > Co-developed-by: Jean-Philippe Brucker <jean-philippe@linaro.org> > > Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> > > Signed-off-by: Salil Mehta <salil.mehta@huawei.com> [...] > > +static CPUArchId *arm_get_archid_by_id(uint64_t id) > > +{ > > + int n; > > + CPUArchId *arch_id; > > + MachineState *ms = MACHINE(qdev_get_machine()); > > + > > + /* > > + * At this point disabled CPUs don't have a CPUState, but their CPUArchId > > + * exists. > > + * > > + * TODO: Is arch_id == mp_affinity? This needs work. > > + */ > > + for (n = 0; n < ms->possible_cpus->len; n++) { > > + arch_id = &ms->possible_cpus->cpus[n]; > > + > > + if (arch_id->arch_id == id) { > > + return arch_id; > > + } > > + } > > + return NULL; > > +} > > + > > The @arch_id should be same thing to @mp_affinity except for the boot CPU. > For the boot CPU, its value is fetched from MPIDR, which is determined by > cs->cpu_index, passed to host via ioctl(CREATE_VCPU). Besides, another > similiar function qemu_get_cpu_archid() exists in cpus-common.c. I think > they can be combined. Again, all these information inherited from > ms->possible_cpus may be better to be managed in board level, like the > vCPU states. Yes, good catch. This has been existing for long so my eyes got biased. Thanks Salil. [...] > > @@ -168,12 +189,24 @@ int arm_set_cpu_on(uint64_t cpuid, uint64_t entry, > uint64_t context_id, > > } > > > > /* Retrieve the cpu we are powering up */ > > - target_cpu_state = arm_get_cpu_by_id(cpuid); > > - if (!target_cpu_state) { > > + arch_id = arm_get_archid_by_id(cpuid); > > + if (!arch_id) { > > /* The cpu was not found */ > > return QEMU_ARM_POWERCTL_INVALID_PARAM; > > } > > > > + target_cpu_state = CPU(arch_id->cpu); > > + if (!qemu_enabled_cpu(target_cpu_state)) { > > + /* > > + * The cpu is not plugged in or disabled. We should return appropriate > > + * value as introduced in DEN0022E PSCI 1.2 issue E > ^^^^^^^ > issue E, which is QEMU_PSCI_RET_DENIED. PSCI_RET_DENIED [...] > > --- a/target/arm/helper.c > > +++ b/target/arm/helper.c > > @@ -11187,7 +11187,7 @@ void arm_cpu_do_interrupt(CPUState *cs) > > env->exception.syndrome); > > } > > > > - if (tcg_enabled() && arm_is_psci_call(cpu, cs->exception_index)) { > > + if (arm_is_psci_call(cpu, cs->exception_index)) { > > arm_handle_psci_call(cpu); > > qemu_log_mask(CPU_LOG_INT, "...handled as PSCI call\n"); > > return; > > We may still limit the capability to handle PSCI calls to TCG and KVM, > meaning HVF and QTest won't have this capability. We do not support them now. I need to conditionally register SMCC calls With KVM. Will check this. Good point though. Thanks Salil. [...] > > diff --git a/target/arm/kvm.c b/target/arm/kvm.c > > index 8e7c68af6a..6f3fd5aecd 100644 > > --- a/target/arm/kvm.c > > +++ b/target/arm/kvm.c > > @@ -250,6 +250,7 @@ int kvm_arm_get_max_vm_ipa_size(MachineState *ms, > bool *fixed_ipa) > > int kvm_arch_init(MachineState *ms, KVMState *s) > > { > > int ret = 0; > > + > ^^^^ > Unnecessary change. Yes. Thanks. [...] > > @@ -280,6 +281,22 @@ int kvm_arch_init(MachineState *ms, KVMState *s) > > } > > } > > > > + /* > > + * To be able to handle PSCI CPU ON calls in QEMU, we need to install SMCCC > ^^ > ON/OFF Yes. > > + * filter in the Host KVM. This is required to support features like > > + * virtual CPU Hotplug on ARM platforms. > > + */ > > + if (kvm_arm_set_smccc_filter(PSCI_0_2_FN64_CPU_ON, > > + KVM_SMCCC_FILTER_FWD_TO_USER)) { > > + error_report("CPU On PSCI-to-user-space fwd filter install failed"); > > + abort(); > > + } > > + if (kvm_arm_set_smccc_filter(PSCI_0_2_FN_CPU_OFF, > > + KVM_SMCCC_FILTER_FWD_TO_USER)) { > > + error_report("CPU Off PSCI-to-user-space fwd filter install failed"); > > + abort(); > > + } > > + > > kvm_arm_init_debug(s); > > > > return ret; > > The PSCI_ON and PSCI_OFF will be unconditionally handled by QEMU if KVM is > enabled, even vCPU hotplug isn't supported on hw/arm/virt board. Do we need to > enable it only when vCPU hotplug is supported? Yes. True. I missed this earlier. It should be conditional. Thanks Salil. > > > @@ -952,6 +969,38 @@ static int kvm_arm_handle_dabt_nisv(CPUState *cs, > uint64_t esr_iss, > > return -1; > > } > > > > +static int kvm_arm_handle_hypercall(CPUState *cs, struct kvm_run *run) > > +{ > > + ARMCPU *cpu = ARM_CPU(cs); > > + CPUARMState *env = &cpu->env; > > + > > + kvm_cpu_synchronize_state(cs); > > + > > + /* > > + * hard coding immediate to 0 as we dont expect non-zero value as of now > ^^^^ > don't Thanks Salil.
next prev parent reply other threads:[~2023-10-17 0:04 UTC|newest] Thread overview: 146+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-09-26 10:03 [PATCH RFC V2 00/37] Support of Virtual CPU Hotplug for ARMv8 Arch Salil Mehta via 2023-09-26 10:04 ` [PATCH RFC V2 01/37] arm/virt, target/arm: Add new ARMCPU {socket, cluster, core, thread}-id property Salil Mehta via 2023-09-26 23:57 ` [PATCH RFC V2 01/37] arm/virt,target/arm: Add new ARMCPU {socket,cluster,core,thread}-id property Gavin Shan 2023-10-02 9:53 ` Salil Mehta via 2023-10-02 9:53 ` Salil Mehta 2023-10-03 5:05 ` Gavin Shan 2023-09-26 10:04 ` [PATCH RFC V2 02/37] cpus-common: Add common CPU utility for possible vCPUs Salil Mehta via 2023-09-27 3:54 ` Gavin Shan 2023-10-02 10:21 ` Salil Mehta via 2023-10-02 10:21 ` Salil Mehta 2023-10-03 5:34 ` Gavin Shan 2023-09-26 10:04 ` [PATCH RFC V2 03/37] hw/arm/virt: Move setting of common CPU properties in a function Salil Mehta via 2023-09-27 5:16 ` Gavin Shan 2023-10-02 10:24 ` Salil Mehta via 2023-10-02 10:24 ` Salil Mehta 2023-10-10 6:46 ` Shaoqin Huang 2023-10-10 9:47 ` Salil Mehta via 2023-10-10 9:47 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 04/37] arm/virt, target/arm: Machine init time change common to vCPU {cold|hot}-plug Salil Mehta via 2023-09-27 6:28 ` [PATCH RFC V2 04/37] arm/virt,target/arm: " Gavin Shan 2023-10-02 16:12 ` Salil Mehta via 2023-10-02 16:12 ` Salil Mehta 2024-01-16 15:59 ` Jonathan Cameron via 2023-09-27 6:30 ` Gavin Shan 2023-10-02 10:27 ` Salil Mehta via 2023-10-02 10:27 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 05/37] accel/kvm: Extract common KVM vCPU {creation, parking} code Salil Mehta via 2023-09-27 6:51 ` [PATCH RFC V2 05/37] accel/kvm: Extract common KVM vCPU {creation,parking} code Gavin Shan 2023-10-02 16:20 ` Salil Mehta via 2023-10-02 16:20 ` Salil Mehta 2023-10-03 5:39 ` Gavin Shan 2023-09-26 10:04 ` [PATCH RFC V2 06/37] arm/virt, kvm: Pre-create disabled possible vCPUs @machine init Salil Mehta via 2023-09-27 10:04 ` [PATCH RFC V2 06/37] arm/virt,kvm: " Gavin Shan 2023-10-02 16:39 ` Salil Mehta via 2023-10-02 16:39 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 07/37] arm/virt, gicv3: Changes to pre-size GIC with possible vcpus " Salil Mehta via 2023-09-28 0:14 ` Gavin Shan 2023-10-16 16:15 ` Salil Mehta via 2023-10-16 16:15 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 08/37] arm/virt: Init PMU at host for all possible vcpus Salil Mehta via 2023-09-26 10:04 ` [PATCH RFC V2 09/37] hw/acpi: Move CPU ctrl-dev MMIO region len macro to common header file Salil Mehta via 2023-09-28 0:19 ` Gavin Shan 2023-10-16 16:20 ` Salil Mehta via 2023-10-16 16:20 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 10/37] arm/acpi: Enable ACPI support for vcpu hotplug Salil Mehta via 2023-09-28 0:25 ` Gavin Shan 2023-10-16 21:23 ` Salil Mehta via 2023-10-16 21:23 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 11/37] hw/acpi: Add ACPI CPU hotplug init stub Salil Mehta via 2023-09-28 0:28 ` Gavin Shan 2023-10-16 21:27 ` Salil Mehta via 2023-10-16 21:27 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 12/37] hw/acpi: Use qemu_present_cpu() API in ACPI CPU hotplug init Salil Mehta via 2023-09-28 0:40 ` Gavin Shan 2023-10-16 21:41 ` Salil Mehta via 2023-10-16 21:41 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 13/37] hw/acpi: Init GED framework with cpu hotplug events Salil Mehta via 2023-09-28 0:56 ` Gavin Shan 2023-10-16 21:44 ` Salil Mehta via 2023-10-16 21:44 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 14/37] arm/virt: Add cpu hotplug events to GED during creation Salil Mehta via 2023-09-28 1:03 ` Gavin Shan 2023-10-16 21:46 ` Salil Mehta via 2023-10-16 21:46 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 15/37] arm/virt: Create GED dev before *disabled* CPU Objs are destroyed Salil Mehta via 2023-09-28 1:08 ` Gavin Shan 2023-10-16 21:54 ` Salil Mehta via 2023-10-16 21:54 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 16/37] hw/acpi: Update CPUs AML with cpu-(ctrl)dev change Salil Mehta via 2023-09-28 1:26 ` Gavin Shan 2023-10-16 21:57 ` Salil Mehta via 2023-10-16 21:57 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 17/37] arm/virt/acpi: Build CPUs AML with CPU Hotplug support Salil Mehta via 2023-09-28 1:36 ` Gavin Shan 2023-10-16 22:05 ` Salil Mehta via 2023-10-16 22:05 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 18/37] arm/virt: Make ARM vCPU *present* status ACPI *persistent* Salil Mehta via 2023-09-28 23:18 ` Gavin Shan 2023-10-16 22:33 ` Salil Mehta via 2023-10-16 22:33 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 19/37] hw/acpi: ACPI/AML Changes to reflect the correct _STA.{PRES, ENA} Bits to Guest Salil Mehta via 2023-09-28 23:33 ` [PATCH RFC V2 19/37] hw/acpi: ACPI/AML Changes to reflect the correct _STA.{PRES,ENA} " Gavin Shan 2023-10-16 22:59 ` Salil Mehta via 2023-10-16 22:59 ` Salil Mehta 2024-01-17 21:46 ` [PATCH RFC V2 19/37] hw/acpi: ACPI/AML Changes to reflect the correct _STA.{PRES, ENA} " Jonathan Cameron via 2023-09-26 10:04 ` [PATCH RFC V2 20/37] hw/acpi: Update GED _EVT method AML with cpu scan Salil Mehta via 2023-09-28 23:35 ` Gavin Shan 2023-10-16 23:01 ` Salil Mehta via 2023-10-16 23:01 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 21/37] hw/arm: MADT Tbl change to size the guest with possible vCPUs Salil Mehta via 2023-09-28 23:43 ` Gavin Shan 2023-10-16 23:15 ` Salil Mehta via 2023-10-16 23:15 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 22/37] hw/acpi: Make _MAT method optional Salil Mehta via 2023-09-28 23:50 ` Gavin Shan 2023-10-16 23:17 ` Salil Mehta via 2023-10-16 23:17 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 23/37] arm/virt: Release objects for *disabled* possible vCPUs after init Salil Mehta via 2023-09-28 23:57 ` Gavin Shan 2023-10-16 23:28 ` Salil Mehta via 2023-10-16 23:28 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 24/37] hw/acpi: Update ACPI GED framework to support vCPU Hotplug Salil Mehta via 2023-09-26 11:02 ` Michael S. Tsirkin 2023-09-26 11:37 ` Salil Mehta via 2023-09-26 12:00 ` Michael S. Tsirkin 2023-09-26 12:27 ` Salil Mehta via 2023-09-26 13:02 ` lixianglai 2023-09-26 10:04 ` [PATCH RFC V2 25/37] arm/virt: Add/update basic hot-(un)plug framework Salil Mehta via 2023-09-29 0:20 ` Gavin Shan 2023-10-16 23:40 ` Salil Mehta via 2023-10-16 23:40 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 26/37] arm/virt: Changes to (un)wire GICC<->vCPU IRQs during hot-(un)plug Salil Mehta via 2023-09-26 10:04 ` [PATCH RFC V2 27/37] hw/arm, gicv3: Changes to update GIC with vCPU hot-plug notification Salil Mehta via 2023-09-26 10:04 ` [PATCH RFC V2 28/37] hw/intc/arm-gicv3*: Changes required to (re)init the vCPU register info Salil Mehta via 2023-09-26 10:04 ` [PATCH RFC V2 29/37] arm/virt: Update the guest(via GED) about CPU hot-(un)plug events Salil Mehta via 2023-09-29 0:30 ` Gavin Shan 2023-10-16 23:48 ` Salil Mehta via 2023-10-16 23:48 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 30/37] hw/arm: Changes required for reset and to support next boot Salil Mehta via 2023-09-26 10:04 ` [PATCH RFC V2 31/37] physmem, gdbstub: Common helping funcs/changes to *unrealize* vCPU Salil Mehta via 2023-10-03 6:33 ` [PATCH RFC V2 31/37] physmem,gdbstub: " Philippe Mathieu-Daudé 2023-10-03 10:22 ` Salil Mehta via 2023-10-03 10:22 ` Salil Mehta 2023-10-04 9:17 ` Salil Mehta via 2023-10-04 9:17 ` Salil Mehta 2023-09-26 10:36 ` [PATCH RFC V2 32/37] target/arm: Add support of *unrealize* ARMCPU during vCPU Hot-unplug Salil Mehta via 2023-09-26 10:36 ` [PATCH RFC V2 33/37] target/arm/kvm: Write CPU state back to KVM on reset Salil Mehta via 2023-09-26 10:36 ` [PATCH RFC V2 34/37] target/arm/kvm, tcg: Register/Handle SMCCC hypercall exits to VMM/Qemu Salil Mehta via 2023-09-29 4:15 ` [PATCH RFC V2 34/37] target/arm/kvm,tcg: " Gavin Shan 2023-10-17 0:03 ` Salil Mehta via [this message] 2023-10-17 0:03 ` Salil Mehta 2023-09-26 10:36 ` [PATCH RFC V2 35/37] hw/arm: Support hotplug capability check using _OSC method Salil Mehta via 2023-09-29 4:23 ` Gavin Shan 2023-10-17 0:13 ` Salil Mehta via 2023-10-17 0:13 ` Salil Mehta 2023-09-26 10:36 ` [PATCH RFC V2 36/37] tcg/mttcg: enable threads to unregister in tcg_ctxs[] Salil Mehta via 2023-09-26 10:36 ` [PATCH RFC V2 37/37] hw/arm/virt: Expose cold-booted CPUs as MADT GICC Enabled Salil Mehta via 2023-10-11 10:23 ` [PATCH RFC V2 00/37] Support of Virtual CPU Hotplug for ARMv8 Arch Vishnu Pajjuri 2023-10-11 10:32 ` Salil Mehta via 2023-10-11 10:32 ` Salil Mehta 2023-10-11 11:08 ` Vishnu Pajjuri 2023-10-11 20:15 ` Salil Mehta 2023-10-12 17:02 ` Miguel Luis 2023-10-12 17:54 ` Salil Mehta via 2023-10-12 17:54 ` Salil Mehta 2023-10-13 10:43 ` Miguel Luis
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