From: Salil Mehta via <qemu-devel@nongnu.org> To: Gavin Shan <gshan@redhat.com>, "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>, "qemu-arm@nongnu.org" <qemu-arm@nongnu.org> Cc: "maz@kernel.org" <maz@kernel.org>, "jean-philippe@linaro.org" <jean-philippe@linaro.org>, Jonathan Cameron <jonathan.cameron@huawei.com>, "lpieralisi@kernel.org" <lpieralisi@kernel.org>, "peter.maydell@linaro.org" <peter.maydell@linaro.org>, "richard.henderson@linaro.org" <richard.henderson@linaro.org>, "imammedo@redhat.com" <imammedo@redhat.com>, "andrew.jones@linux.dev" <andrew.jones@linux.dev>, "david@redhat.com" <david@redhat.com>, "philmd@linaro.org" <philmd@linaro.org>, "eric.auger@redhat.com" <eric.auger@redhat.com>, "will@kernel.org" <will@kernel.org>, "ardb@kernel.org" <ardb@kernel.org>, "oliver.upton@linux.dev" <oliver.upton@linux.dev>, "pbonzini@redhat.com" <pbonzini@redhat.com>, "mst@redhat.com" <mst@redhat.com>, "rafael@kernel.org" <rafael@kernel.org>, "borntraeger@linux.ibm.com" <borntraeger@linux.ibm.com>, "alex.bennee@linaro.org" <alex.bennee@linaro.org>, "linux@armlinux.org.uk" <linux@armlinux.org.uk>, "darren@os.amperecomputing.com" <darren@os.amperecomputing.com>, "ilkka@os.amperecomputing.com" <ilkka@os.amperecomputing.com>, "vishnu@os.amperecomputing.com" <vishnu@os.amperecomputing.com>, "karl.heubaum@oracle.com" <karl.heubaum@oracle.com>, "miguel.luis@oracle.com" <miguel.luis@oracle.com>, "salil.mehta@opnsrc.net" <salil.mehta@opnsrc.net>, zhukeqian <zhukeqian1@huawei.com>, "wangxiongfeng (C)" <wangxiongfeng2@huawei.com>, "wangyanan (Y)" <wangyanan55@huawei.com>, "jiakernel2@gmail.com" <jiakernel2@gmail.com>, "maobibo@loongson.cn" <maobibo@loongson.cn>, "lixianglai@loongson.cn" <lixianglai@loongson.cn> Subject: RE: [PATCH RFC V2 21/37] hw/arm: MADT Tbl change to size the guest with possible vCPUs Date: Mon, 16 Oct 2023 23:15:20 +0000 [thread overview] Message-ID: <8f946b9978584363b3b6f59afb75c005@huawei.com> (raw) In-Reply-To: <eb1ac571-7844-55e6-15e7-3dd7df21366b@redhat.com> Hi Gavin, > From: Gavin Shan <gshan@redhat.com> > Sent: Friday, September 29, 2023 12:44 AM > To: Salil Mehta <salil.mehta@huawei.com>; qemu-devel@nongnu.org; qemu-arm@nongnu.org > Cc: maz@kernel.org; jean-philippe@linaro.org; Jonathan Cameron > <jonathan.cameron@huawei.com>; lpieralisi@kernel.org; > peter.maydell@linaro.org; richard.henderson@linaro.org; > imammedo@redhat.com; andrew.jones@linux.dev; david@redhat.com; > philmd@linaro.org; eric.auger@redhat.com; will@kernel.org; ardb@kernel.org; > oliver.upton@linux.dev; pbonzini@redhat.com; mst@redhat.com; > rafael@kernel.org; borntraeger@linux.ibm.com; alex.bennee@linaro.org; > linux@armlinux.org.uk; darren@os.amperecomputing.com; > ilkka@os.amperecomputing.com; vishnu@os.amperecomputing.com; > karl.heubaum@oracle.com; miguel.luis@oracle.com; salil.mehta@opnsrc.net; > zhukeqian <zhukeqian1@huawei.com>; wangxiongfeng (C) > <wangxiongfeng2@huawei.com>; wangyanan (Y) <wangyanan55@huawei.com>; > jiakernel2@gmail.com; maobibo@loongson.cn; lixianglai@loongson.cn > Subject: Re: [PATCH RFC V2 21/37] hw/arm: MADT Tbl change to size the guest > with possible vCPUs > > Hi Salil, > > On 9/26/23 20:04, Salil Mehta wrote: > > Changes required during building of MADT Table by QEMU to accommodate disabled > > possible vCPUs. This info shall be used by the guest kernel to size up its > > resources during boot time. This pre-sizing of the guest kernel done on > > possible vCPUs will facilitate hotplug of the disabled vCPUs. > > > > This change also caters ACPI MADT GIC CPU Interface flag related changes > > recently introduced in the UEFI ACPI 6.5 Specification which allows deferred > > virtual CPU online'ing in the Guest Kernel. > > > > Link: > https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html#gic-cpu-interface-gicc-structure > > > > Co-developed-by: Salil Mehta <salil.mehta@huawei.com> > > Signed-off-by: Salil Mehta <salil.mehta@huawei.com> > > Co-developed-by: Keqian Zhu <zhukeqian1@huawei.com> > > Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com> > > Signed-off-by: Salil Mehta <salil.mehta@huawei.com> > > --- > > hw/arm/virt-acpi-build.c | 36 ++++++++++++++++++++++++++++++------ > > 1 file changed, 30 insertions(+), 6 deletions(-) > > > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c > > index d27df5030e..cbccd2ca2d 100644 > > --- a/hw/arm/virt-acpi-build.c > > +++ b/hw/arm/virt-acpi-build.c > > @@ -700,6 +700,29 @@ static void build_append_gicr(GArray *table_data, uint64_t base, uint32_t size) > > build_append_int_noprefix(table_data, size, 4); /* Discovery Range Length */ > > } > > > > +static uint32_t virt_acpi_get_gicc_flags(CPUState *cpu) > > +{ > > + MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine()); > > + > > + /* can only exist in 'enabled' state */ > > + if (!mc->has_hotpluggable_cpus) { > > + return 1; > > + } > > + > > + /* > > + * ARM GIC CPU Interface can be 'online-capable' or 'enabled' at boot > > + * We MUST set 'online-capable' Bit for all hotpluggable CPUs except the > ^^^ > bit :) > > + * first/boot CPU. Cold-booted CPUs without 'Id' can also be unplugged. > > + * Though as-of-now this is only used as a debugging feature. > > + * > > + * UEFI ACPI Specification 6.5 > > + * Section: 5.2.12.14. GIC CPU Interface (GICC) Structure > > + * Table: 5.37 GICC CPU Interface Flags > > + * Link: https://uefi.org/specs/ACPI/6.5 > > + */ > > + return cpu && !cpu->cpu_index ? 1 : (1 << 3); > > +} > > + > > I don't understand how a cold-booted CPU can be hot removed if it doesn't > have a ID? Besides, how cpu->cpu_index is zero for the first cold-booted > CPU? Some cold-booted CPUs can be 'pluggable'. Hence, can have 'ID' specified as part of the QEMU command line. This 'ID' can be used to hot(un)plug later (if supported). You can also start QEMU with '-s' option which will pause the QEMU and then you can cold-plug the CPUs during VM initialization time. Good point about boot CPU. But, it is a default assumption to have boot CPU as 0 on ARM - I think? I will need to cross this part. Thanks for pointing this though. > > > static void > > build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState > *vms) > > { > > @@ -726,12 +749,13 @@ build_madt(GArray *table_data, BIOSLinker *linker, > VirtMachineState *vms) > > build_append_int_noprefix(table_data, vms->gic_version, 1); > > build_append_int_noprefix(table_data, 0, 3); /* Reserved */ > > > > - for (i = 0; i < MACHINE(vms)->smp.cpus; i++) { > > - ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(i)); > > + for (i = 0; i < MACHINE(vms)->smp.max_cpus; i++) { > > + CPUState *cpu = qemu_get_possible_cpu(i); > > uint64_t physical_base_address = 0, gich = 0, gicv = 0; > > uint32_t vgic_interrupt = vms->virt ? PPI(ARCH_GIC_MAINT_IRQ) : > 0; > > - uint32_t pmu_interrupt = arm_feature(&armcpu->env, ARM_FEATURE_PMU) ? > > - PPI(VIRTUAL_PMU_IRQ) : 0; > > + uint32_t pmu_interrupt = vms->pmu ? PPI(VIRTUAL_PMU_IRQ) : 0; > > + uint32_t flags = virt_acpi_get_gicc_flags(cpu); > > + uint64_t mpidr = qemu_get_cpu_archid(i); > > > > qemu_get_cpu_archid() can be dropped since it's called for once. MPIDR > can be fetched from ms->possible_cpus->cpus[i].arch_id, which has been > initialized pre-hand. I want expose this API to other parts of QEMU and other architectures as well. It is an accessor API and should be encouraged all the time. It reduces the unnecessary boiler plate code. So would like to keep it but can move to board.h if you wish? Thanks Salil.
WARNING: multiple messages have this Message-ID (diff)
From: Salil Mehta <salil.mehta@huawei.com> To: Gavin Shan <gshan@redhat.com>, "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>, "qemu-arm@nongnu.org" <qemu-arm@nongnu.org> Cc: "maz@kernel.org" <maz@kernel.org>, "jean-philippe@linaro.org" <jean-philippe@linaro.org>, Jonathan Cameron <jonathan.cameron@huawei.com>, "lpieralisi@kernel.org" <lpieralisi@kernel.org>, "peter.maydell@linaro.org" <peter.maydell@linaro.org>, "richard.henderson@linaro.org" <richard.henderson@linaro.org>, "imammedo@redhat.com" <imammedo@redhat.com>, "andrew.jones@linux.dev" <andrew.jones@linux.dev>, "david@redhat.com" <david@redhat.com>, "philmd@linaro.org" <philmd@linaro.org>, "eric.auger@redhat.com" <eric.auger@redhat.com>, "will@kernel.org" <will@kernel.org>, "ardb@kernel.org" <ardb@kernel.org>, "oliver.upton@linux.dev" <oliver.upton@linux.dev>, "pbonzini@redhat.com" <pbonzini@redhat.com>, "mst@redhat.com" <mst@redhat.com>, "rafael@kernel.org" <rafael@kernel.org>, "borntraeger@linux.ibm.com" <borntraeger@linux.ibm.com>, "alex.bennee@linaro.org" <alex.bennee@linaro.org>, "linux@armlinux.org.uk" <linux@armlinux.org.uk>, "darren@os.amperecomputing.com" <darren@os.amperecomputing.com>, "ilkka@os.amperecomputing.com" <ilkka@os.amperecomputing.com>, "vishnu@os.amperecomputing.com" <vishnu@os.amperecomputing.com>, "karl.heubaum@oracle.com" <karl.heubaum@oracle.com>, "miguel.luis@oracle.com" <miguel.luis@oracle.com>, "salil.mehta@opnsrc.net" <salil.mehta@opnsrc.net>, zhukeqian <zhukeqian1@huawei.com>, "wangxiongfeng (C)" <wangxiongfeng2@huawei.com>, "wangyanan (Y)" <wangyanan55@huawei.com>, "jiakernel2@gmail.com" <jiakernel2@gmail.com>, "maobibo@loongson.cn" <maobibo@loongson.cn>, "lixianglai@loongson.cn" <lixianglai@loongson.cn> Subject: RE: [PATCH RFC V2 21/37] hw/arm: MADT Tbl change to size the guest with possible vCPUs Date: Mon, 16 Oct 2023 23:15:20 +0000 [thread overview] Message-ID: <8f946b9978584363b3b6f59afb75c005@huawei.com> (raw) Message-ID: <20231016231520.YY9uwC7oPnRw8H_Rt97EfNDQudDI_DIO57fRStIMQW8@z> (raw) In-Reply-To: <eb1ac571-7844-55e6-15e7-3dd7df21366b@redhat.com> Hi Gavin, > From: Gavin Shan <gshan@redhat.com> > Sent: Friday, September 29, 2023 12:44 AM > To: Salil Mehta <salil.mehta@huawei.com>; qemu-devel@nongnu.org; qemu-arm@nongnu.org > Cc: maz@kernel.org; jean-philippe@linaro.org; Jonathan Cameron > <jonathan.cameron@huawei.com>; lpieralisi@kernel.org; > peter.maydell@linaro.org; richard.henderson@linaro.org; > imammedo@redhat.com; andrew.jones@linux.dev; david@redhat.com; > philmd@linaro.org; eric.auger@redhat.com; will@kernel.org; ardb@kernel.org; > oliver.upton@linux.dev; pbonzini@redhat.com; mst@redhat.com; > rafael@kernel.org; borntraeger@linux.ibm.com; alex.bennee@linaro.org; > linux@armlinux.org.uk; darren@os.amperecomputing.com; > ilkka@os.amperecomputing.com; vishnu@os.amperecomputing.com; > karl.heubaum@oracle.com; miguel.luis@oracle.com; salil.mehta@opnsrc.net; > zhukeqian <zhukeqian1@huawei.com>; wangxiongfeng (C) > <wangxiongfeng2@huawei.com>; wangyanan (Y) <wangyanan55@huawei.com>; > jiakernel2@gmail.com; maobibo@loongson.cn; lixianglai@loongson.cn > Subject: Re: [PATCH RFC V2 21/37] hw/arm: MADT Tbl change to size the guest > with possible vCPUs > > Hi Salil, > > On 9/26/23 20:04, Salil Mehta wrote: > > Changes required during building of MADT Table by QEMU to accommodate disabled > > possible vCPUs. This info shall be used by the guest kernel to size up its > > resources during boot time. This pre-sizing of the guest kernel done on > > possible vCPUs will facilitate hotplug of the disabled vCPUs. > > > > This change also caters ACPI MADT GIC CPU Interface flag related changes > > recently introduced in the UEFI ACPI 6.5 Specification which allows deferred > > virtual CPU online'ing in the Guest Kernel. > > > > Link: > https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html#gic-cpu-interface-gicc-structure > > > > Co-developed-by: Salil Mehta <salil.mehta@huawei.com> > > Signed-off-by: Salil Mehta <salil.mehta@huawei.com> > > Co-developed-by: Keqian Zhu <zhukeqian1@huawei.com> > > Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com> > > Signed-off-by: Salil Mehta <salil.mehta@huawei.com> > > --- > > hw/arm/virt-acpi-build.c | 36 ++++++++++++++++++++++++++++++------ > > 1 file changed, 30 insertions(+), 6 deletions(-) > > > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c > > index d27df5030e..cbccd2ca2d 100644 > > --- a/hw/arm/virt-acpi-build.c > > +++ b/hw/arm/virt-acpi-build.c > > @@ -700,6 +700,29 @@ static void build_append_gicr(GArray *table_data, uint64_t base, uint32_t size) > > build_append_int_noprefix(table_data, size, 4); /* Discovery Range Length */ > > } > > > > +static uint32_t virt_acpi_get_gicc_flags(CPUState *cpu) > > +{ > > + MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine()); > > + > > + /* can only exist in 'enabled' state */ > > + if (!mc->has_hotpluggable_cpus) { > > + return 1; > > + } > > + > > + /* > > + * ARM GIC CPU Interface can be 'online-capable' or 'enabled' at boot > > + * We MUST set 'online-capable' Bit for all hotpluggable CPUs except the > ^^^ > bit :) > > + * first/boot CPU. Cold-booted CPUs without 'Id' can also be unplugged. > > + * Though as-of-now this is only used as a debugging feature. > > + * > > + * UEFI ACPI Specification 6.5 > > + * Section: 5.2.12.14. GIC CPU Interface (GICC) Structure > > + * Table: 5.37 GICC CPU Interface Flags > > + * Link: https://uefi.org/specs/ACPI/6.5 > > + */ > > + return cpu && !cpu->cpu_index ? 1 : (1 << 3); > > +} > > + > > I don't understand how a cold-booted CPU can be hot removed if it doesn't > have a ID? Besides, how cpu->cpu_index is zero for the first cold-booted > CPU? Some cold-booted CPUs can be 'pluggable'. Hence, can have 'ID' specified as part of the QEMU command line. This 'ID' can be used to hot(un)plug later (if supported). You can also start QEMU with '-s' option which will pause the QEMU and then you can cold-plug the CPUs during VM initialization time. Good point about boot CPU. But, it is a default assumption to have boot CPU as 0 on ARM - I think? I will need to cross this part. Thanks for pointing this though. > > > static void > > build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState > *vms) > > { > > @@ -726,12 +749,13 @@ build_madt(GArray *table_data, BIOSLinker *linker, > VirtMachineState *vms) > > build_append_int_noprefix(table_data, vms->gic_version, 1); > > build_append_int_noprefix(table_data, 0, 3); /* Reserved */ > > > > - for (i = 0; i < MACHINE(vms)->smp.cpus; i++) { > > - ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(i)); > > + for (i = 0; i < MACHINE(vms)->smp.max_cpus; i++) { > > + CPUState *cpu = qemu_get_possible_cpu(i); > > uint64_t physical_base_address = 0, gich = 0, gicv = 0; > > uint32_t vgic_interrupt = vms->virt ? PPI(ARCH_GIC_MAINT_IRQ) : > 0; > > - uint32_t pmu_interrupt = arm_feature(&armcpu->env, ARM_FEATURE_PMU) ? > > - PPI(VIRTUAL_PMU_IRQ) : 0; > > + uint32_t pmu_interrupt = vms->pmu ? PPI(VIRTUAL_PMU_IRQ) : 0; > > + uint32_t flags = virt_acpi_get_gicc_flags(cpu); > > + uint64_t mpidr = qemu_get_cpu_archid(i); > > > > qemu_get_cpu_archid() can be dropped since it's called for once. MPIDR > can be fetched from ms->possible_cpus->cpus[i].arch_id, which has been > initialized pre-hand. I want expose this API to other parts of QEMU and other architectures as well. It is an accessor API and should be encouraged all the time. It reduces the unnecessary boiler plate code. So would like to keep it but can move to board.h if you wish? Thanks Salil.
next prev parent reply other threads:[~2023-10-16 23:16 UTC|newest] Thread overview: 146+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-09-26 10:03 [PATCH RFC V2 00/37] Support of Virtual CPU Hotplug for ARMv8 Arch Salil Mehta via 2023-09-26 10:04 ` [PATCH RFC V2 01/37] arm/virt, target/arm: Add new ARMCPU {socket, cluster, core, thread}-id property Salil Mehta via 2023-09-26 23:57 ` [PATCH RFC V2 01/37] arm/virt,target/arm: Add new ARMCPU {socket,cluster,core,thread}-id property Gavin Shan 2023-10-02 9:53 ` Salil Mehta via 2023-10-02 9:53 ` Salil Mehta 2023-10-03 5:05 ` Gavin Shan 2023-09-26 10:04 ` [PATCH RFC V2 02/37] cpus-common: Add common CPU utility for possible vCPUs Salil Mehta via 2023-09-27 3:54 ` Gavin Shan 2023-10-02 10:21 ` Salil Mehta via 2023-10-02 10:21 ` Salil Mehta 2023-10-03 5:34 ` Gavin Shan 2023-09-26 10:04 ` [PATCH RFC V2 03/37] hw/arm/virt: Move setting of common CPU properties in a function Salil Mehta via 2023-09-27 5:16 ` Gavin Shan 2023-10-02 10:24 ` Salil Mehta via 2023-10-02 10:24 ` Salil Mehta 2023-10-10 6:46 ` Shaoqin Huang 2023-10-10 9:47 ` Salil Mehta via 2023-10-10 9:47 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 04/37] arm/virt, target/arm: Machine init time change common to vCPU {cold|hot}-plug Salil Mehta via 2023-09-27 6:28 ` [PATCH RFC V2 04/37] arm/virt,target/arm: " Gavin Shan 2023-10-02 16:12 ` Salil Mehta via 2023-10-02 16:12 ` Salil Mehta 2024-01-16 15:59 ` Jonathan Cameron via 2023-09-27 6:30 ` Gavin Shan 2023-10-02 10:27 ` Salil Mehta via 2023-10-02 10:27 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 05/37] accel/kvm: Extract common KVM vCPU {creation, parking} code Salil Mehta via 2023-09-27 6:51 ` [PATCH RFC V2 05/37] accel/kvm: Extract common KVM vCPU {creation,parking} code Gavin Shan 2023-10-02 16:20 ` Salil Mehta via 2023-10-02 16:20 ` Salil Mehta 2023-10-03 5:39 ` Gavin Shan 2023-09-26 10:04 ` [PATCH RFC V2 06/37] arm/virt, kvm: Pre-create disabled possible vCPUs @machine init Salil Mehta via 2023-09-27 10:04 ` [PATCH RFC V2 06/37] arm/virt,kvm: " Gavin Shan 2023-10-02 16:39 ` Salil Mehta via 2023-10-02 16:39 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 07/37] arm/virt, gicv3: Changes to pre-size GIC with possible vcpus " Salil Mehta via 2023-09-28 0:14 ` Gavin Shan 2023-10-16 16:15 ` Salil Mehta via 2023-10-16 16:15 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 08/37] arm/virt: Init PMU at host for all possible vcpus Salil Mehta via 2023-09-26 10:04 ` [PATCH RFC V2 09/37] hw/acpi: Move CPU ctrl-dev MMIO region len macro to common header file Salil Mehta via 2023-09-28 0:19 ` Gavin Shan 2023-10-16 16:20 ` Salil Mehta via 2023-10-16 16:20 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 10/37] arm/acpi: Enable ACPI support for vcpu hotplug Salil Mehta via 2023-09-28 0:25 ` Gavin Shan 2023-10-16 21:23 ` Salil Mehta via 2023-10-16 21:23 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 11/37] hw/acpi: Add ACPI CPU hotplug init stub Salil Mehta via 2023-09-28 0:28 ` Gavin Shan 2023-10-16 21:27 ` Salil Mehta via 2023-10-16 21:27 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 12/37] hw/acpi: Use qemu_present_cpu() API in ACPI CPU hotplug init Salil Mehta via 2023-09-28 0:40 ` Gavin Shan 2023-10-16 21:41 ` Salil Mehta via 2023-10-16 21:41 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 13/37] hw/acpi: Init GED framework with cpu hotplug events Salil Mehta via 2023-09-28 0:56 ` Gavin Shan 2023-10-16 21:44 ` Salil Mehta via 2023-10-16 21:44 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 14/37] arm/virt: Add cpu hotplug events to GED during creation Salil Mehta via 2023-09-28 1:03 ` Gavin Shan 2023-10-16 21:46 ` Salil Mehta via 2023-10-16 21:46 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 15/37] arm/virt: Create GED dev before *disabled* CPU Objs are destroyed Salil Mehta via 2023-09-28 1:08 ` Gavin Shan 2023-10-16 21:54 ` Salil Mehta via 2023-10-16 21:54 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 16/37] hw/acpi: Update CPUs AML with cpu-(ctrl)dev change Salil Mehta via 2023-09-28 1:26 ` Gavin Shan 2023-10-16 21:57 ` Salil Mehta via 2023-10-16 21:57 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 17/37] arm/virt/acpi: Build CPUs AML with CPU Hotplug support Salil Mehta via 2023-09-28 1:36 ` Gavin Shan 2023-10-16 22:05 ` Salil Mehta via 2023-10-16 22:05 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 18/37] arm/virt: Make ARM vCPU *present* status ACPI *persistent* Salil Mehta via 2023-09-28 23:18 ` Gavin Shan 2023-10-16 22:33 ` Salil Mehta via 2023-10-16 22:33 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 19/37] hw/acpi: ACPI/AML Changes to reflect the correct _STA.{PRES, ENA} Bits to Guest Salil Mehta via 2023-09-28 23:33 ` [PATCH RFC V2 19/37] hw/acpi: ACPI/AML Changes to reflect the correct _STA.{PRES,ENA} " Gavin Shan 2023-10-16 22:59 ` Salil Mehta via 2023-10-16 22:59 ` Salil Mehta 2024-01-17 21:46 ` [PATCH RFC V2 19/37] hw/acpi: ACPI/AML Changes to reflect the correct _STA.{PRES, ENA} " Jonathan Cameron via 2023-09-26 10:04 ` [PATCH RFC V2 20/37] hw/acpi: Update GED _EVT method AML with cpu scan Salil Mehta via 2023-09-28 23:35 ` Gavin Shan 2023-10-16 23:01 ` Salil Mehta via 2023-10-16 23:01 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 21/37] hw/arm: MADT Tbl change to size the guest with possible vCPUs Salil Mehta via 2023-09-28 23:43 ` Gavin Shan 2023-10-16 23:15 ` Salil Mehta via [this message] 2023-10-16 23:15 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 22/37] hw/acpi: Make _MAT method optional Salil Mehta via 2023-09-28 23:50 ` Gavin Shan 2023-10-16 23:17 ` Salil Mehta via 2023-10-16 23:17 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 23/37] arm/virt: Release objects for *disabled* possible vCPUs after init Salil Mehta via 2023-09-28 23:57 ` Gavin Shan 2023-10-16 23:28 ` Salil Mehta via 2023-10-16 23:28 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 24/37] hw/acpi: Update ACPI GED framework to support vCPU Hotplug Salil Mehta via 2023-09-26 11:02 ` Michael S. Tsirkin 2023-09-26 11:37 ` Salil Mehta via 2023-09-26 12:00 ` Michael S. Tsirkin 2023-09-26 12:27 ` Salil Mehta via 2023-09-26 13:02 ` lixianglai 2023-09-26 10:04 ` [PATCH RFC V2 25/37] arm/virt: Add/update basic hot-(un)plug framework Salil Mehta via 2023-09-29 0:20 ` Gavin Shan 2023-10-16 23:40 ` Salil Mehta via 2023-10-16 23:40 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 26/37] arm/virt: Changes to (un)wire GICC<->vCPU IRQs during hot-(un)plug Salil Mehta via 2023-09-26 10:04 ` [PATCH RFC V2 27/37] hw/arm, gicv3: Changes to update GIC with vCPU hot-plug notification Salil Mehta via 2023-09-26 10:04 ` [PATCH RFC V2 28/37] hw/intc/arm-gicv3*: Changes required to (re)init the vCPU register info Salil Mehta via 2023-09-26 10:04 ` [PATCH RFC V2 29/37] arm/virt: Update the guest(via GED) about CPU hot-(un)plug events Salil Mehta via 2023-09-29 0:30 ` Gavin Shan 2023-10-16 23:48 ` Salil Mehta via 2023-10-16 23:48 ` Salil Mehta 2023-09-26 10:04 ` [PATCH RFC V2 30/37] hw/arm: Changes required for reset and to support next boot Salil Mehta via 2023-09-26 10:04 ` [PATCH RFC V2 31/37] physmem, gdbstub: Common helping funcs/changes to *unrealize* vCPU Salil Mehta via 2023-10-03 6:33 ` [PATCH RFC V2 31/37] physmem,gdbstub: " Philippe Mathieu-Daudé 2023-10-03 10:22 ` Salil Mehta via 2023-10-03 10:22 ` Salil Mehta 2023-10-04 9:17 ` Salil Mehta via 2023-10-04 9:17 ` Salil Mehta 2023-09-26 10:36 ` [PATCH RFC V2 32/37] target/arm: Add support of *unrealize* ARMCPU during vCPU Hot-unplug Salil Mehta via 2023-09-26 10:36 ` [PATCH RFC V2 33/37] target/arm/kvm: Write CPU state back to KVM on reset Salil Mehta via 2023-09-26 10:36 ` [PATCH RFC V2 34/37] target/arm/kvm, tcg: Register/Handle SMCCC hypercall exits to VMM/Qemu Salil Mehta via 2023-09-29 4:15 ` [PATCH RFC V2 34/37] target/arm/kvm,tcg: " Gavin Shan 2023-10-17 0:03 ` Salil Mehta via 2023-10-17 0:03 ` Salil Mehta 2023-09-26 10:36 ` [PATCH RFC V2 35/37] hw/arm: Support hotplug capability check using _OSC method Salil Mehta via 2023-09-29 4:23 ` Gavin Shan 2023-10-17 0:13 ` Salil Mehta via 2023-10-17 0:13 ` Salil Mehta 2023-09-26 10:36 ` [PATCH RFC V2 36/37] tcg/mttcg: enable threads to unregister in tcg_ctxs[] Salil Mehta via 2023-09-26 10:36 ` [PATCH RFC V2 37/37] hw/arm/virt: Expose cold-booted CPUs as MADT GICC Enabled Salil Mehta via 2023-10-11 10:23 ` [PATCH RFC V2 00/37] Support of Virtual CPU Hotplug for ARMv8 Arch Vishnu Pajjuri 2023-10-11 10:32 ` Salil Mehta via 2023-10-11 10:32 ` Salil Mehta 2023-10-11 11:08 ` Vishnu Pajjuri 2023-10-11 20:15 ` Salil Mehta 2023-10-12 17:02 ` Miguel Luis 2023-10-12 17:54 ` Salil Mehta via 2023-10-12 17:54 ` Salil Mehta 2023-10-13 10:43 ` Miguel Luis
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