From: Richard Henderson <richard.henderson@linaro.org>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: Alistair Francis <alistair.francis@wdc.com>,
Bin Meng <bin.meng@windriver.com>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: [PATCH v4 15/21] target/riscv: Reorg csr instructions
Date: Mon, 23 Aug 2021 12:54:33 -0700 [thread overview]
Message-ID: <682775b2-7aa1-c962-1b15-3c03283df605@linaro.org> (raw)
In-Reply-To: <CAEUhbmXw1yHj42wubAg0zA5WO_3mXg2dYudD7G8ofLPgQ33JWQ@mail.gmail.com>
On 8/22/21 9:54 PM, Bin Meng wrote:
> On Sat, Aug 21, 2021 at 1:43 AM Richard Henderson
> <richard.henderson@linaro.org> wrote:
>>
>> Introduce csrr and csrw helpers, for read-only and write-only insns.
>>
>> Note that we do not properly implement this in riscv_csrrw, in that
>> we cannot distinguish true read-only (rs1 == 0) from any other zero
>> write_mask another source register -- this should still raise an
>> exception for read-only registers.
>>
>> Only issue gen_io_start for CF_USE_ICOUNT.
>> Use ctx->zero for csrrc.
>> Use get_gpr and dest_gpr.
>>
>> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> target/riscv/helper.h | 6 +-
>> target/riscv/op_helper.c | 18 +--
>> target/riscv/insn_trans/trans_rvi.c.inc | 172 +++++++++++++++++-------
>> 3 files changed, 131 insertions(+), 65 deletions(-)
>>
>
> When testing Linux kernel boot, there was a segment fault in the
> helper_csrw() path where ret_value pointer is now NULL, and some CSR
> write op does not test ret_value.
Thanks. It would be really nice to get an acceptance test in...
r~
next prev parent reply other threads:[~2021-08-23 19:55 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-20 17:42 [PATCH v4 00/21] target/riscv: Use tcg_constant_* Richard Henderson
2021-08-20 17:42 ` [PATCH v4 01/21] " Richard Henderson
2021-08-20 17:42 ` [PATCH v4 02/21] tests/tcg/riscv64: Add test for division Richard Henderson
2021-08-23 3:18 ` Bin Meng
2021-08-23 6:04 ` Alistair Francis
2021-08-20 17:42 ` [PATCH v4 03/21] target/riscv: Clean up division helpers Richard Henderson
2021-08-23 4:07 ` Bin Meng
2021-08-23 6:09 ` Alistair Francis
2021-08-20 17:42 ` [PATCH v4 04/21] target/riscv: Add DisasContext to gen_get_gpr, gen_set_gpr Richard Henderson
2021-08-20 17:42 ` [PATCH v4 05/21] target/riscv: Introduce DisasExtend and new helpers Richard Henderson
2021-08-20 17:42 ` [PATCH v4 06/21] target/riscv: Add DisasExtend to gen_arith* Richard Henderson
2021-08-20 17:42 ` [PATCH v4 07/21] target/riscv: Remove gen_arith_div* Richard Henderson
2021-08-20 17:42 ` [PATCH v4 08/21] target/riscv: Use gen_arith for mulh and mulhu Richard Henderson
2021-08-20 17:42 ` [PATCH v4 09/21] target/riscv: Move gen_* helpers for RVM Richard Henderson
2021-08-20 17:42 ` [PATCH v4 10/21] target/riscv: Move gen_* helpers for RVB Richard Henderson
2021-08-23 6:13 ` Alistair Francis
2021-08-20 17:42 ` [PATCH v4 11/21] target/riscv: Add DisasExtend to gen_unary Richard Henderson
2021-08-23 6:15 ` Alistair Francis
2021-08-20 17:42 ` [PATCH v4 12/21] target/riscv: Use DisasExtend in shift operations Richard Henderson
2021-08-23 6:18 ` Alistair Francis
2021-08-20 17:42 ` [PATCH v4 13/21] target/riscv: Use get_gpr in branches Richard Henderson
2021-08-23 6:19 ` Alistair Francis
2021-08-20 17:42 ` [PATCH v4 14/21] target/riscv: Use {get, dest}_gpr for integer load/store Richard Henderson
2021-08-23 7:04 ` Alistair Francis
2021-08-20 17:42 ` [PATCH v4 15/21] target/riscv: Reorg csr instructions Richard Henderson
2021-08-23 4:54 ` Bin Meng
2021-08-23 19:54 ` Richard Henderson [this message]
2021-08-20 17:42 ` [PATCH v4 16/21] target/riscv: Use {get,dest}_gpr for RVA Richard Henderson
2021-08-20 17:42 ` [PATCH v4 17/21] target/riscv: Use gen_shift_imm_fn for slli_uw Richard Henderson
2021-08-20 17:42 ` [PATCH v4 18/21] target/riscv: Use {get,dest}_gpr for RVF Richard Henderson
2021-08-20 17:42 ` [PATCH v4 19/21] target/riscv: Use {get,dest}_gpr for RVD Richard Henderson
2021-08-20 17:42 ` [PATCH v4 20/21] target/riscv: Tidy trans_rvh.c.inc Richard Henderson
2021-08-20 17:42 ` [PATCH v4 21/21] target/riscv: Use {get,dest}_gpr for RVV Richard Henderson
2021-08-30 10:12 ` [PATCH v4 00/21] target/riscv: Use tcg_constant_* Alistair Francis
2021-08-30 15:26 ` Richard Henderson
2021-08-31 0:20 ` Alistair Francis
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