From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, f4bug@amsat.org, mads@ynddal.dk,
qemu-arm@nongnu.org,
Richard Henderson <richard.henderson@linaro.org>
Subject: Re: [PATCH v2 05/11] hw/intc/gic: use MxTxAttrs to divine accessing CPU
Date: Mon, 26 Sep 2022 16:41:55 +0100 [thread overview]
Message-ID: <874jwu3zwr.fsf@linaro.org> (raw)
In-Reply-To: <CAFEAcA8D_SzU35DB-RvaegYkwkJHD0Y3stx7P=Jh=QC6LOqDZA@mail.gmail.com>
Peter Maydell <peter.maydell@linaro.org> writes:
> On Mon, 26 Sept 2022 at 16:08, Alex Bennée <alex.bennee@linaro.org> wrote:
>> Peter Maydell <peter.maydell@linaro.org> writes:
>> > On Mon, 26 Sept 2022 at 14:39, Alex Bennée <alex.bennee@linaro.org> wrote:
>> >> -static inline int gic_get_current_cpu(GICState *s)
>> >> +static inline int gic_get_current_cpu(GICState *s, MemTxAttrs attrs)
>> >> {
>> >> - if (!qtest_enabled() && s->num_cpu > 1) {
>> >> - return current_cpu->cpu_index;
>> >> - }
>> >> - return 0;
>> >> + /*
>> >> + * Something other than a CPU accessing the GIC would be a bug as
>> >> + * would a CPU index higher than the GICState expects to be
>> >> + * handling
>> >> + */
>> >> + g_assert(attrs.requester_type == MEMTXATTRS_CPU);
>> >> + g_assert(attrs.requester_id < s->num_cpu);
>> >
>> > Would it be a QEMU bug, or a guest code bug ? If it's possible
>> > for the guest to mis-program a DMA controller to do a read that
>> > goes through this function, we shouldn't assert. (Whether that
>> > can happen will depend on how the board/SoC code puts together
>> > the MemoryRegion hierarchy, I think.)
>>
>> Most likely a QEMU bug - how would a DMA master even access the GIC?
>
> If it's mapped into the system address space, the same way
> as it does any memory access. For instance on the virt board
> we just map the distributor MemoryRegion straight into the
> system address space, and any DMA master can talk to it.
> This is of course not how the hardware really works (where
> the GIC is part of the CPU itself), but, as noted in previous
> threads, up-ending the MemoryRegion handling in order to be
> able to put the GIC only in the address space(s) that the CPU
> sees would be a lot of work, which is why we didn't try to
> solve the "how do you figure out which CPU is writing to the
> GIC" problem that way.
So hw_error?
I don't think there is a way we can safely continue unless we just want
to fallback to "it was vCPU 0 what did it".
>
> thanks
> -- PMM
--
Alex Bennée
next prev parent reply other threads:[~2022-09-26 16:24 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-26 13:38 [PATCH v2 00/11] gdbstub/next (MemTxAttrs and re-factoring) Alex Bennée
2022-09-26 13:38 ` [PATCH v2 01/11] hw: encode accessing CPU index in MemTxAttrs Alex Bennée
2022-09-26 14:34 ` Peter Maydell
2022-09-26 15:09 ` Alex Bennée
2022-09-26 15:30 ` Peter Maydell
2022-09-26 20:15 ` Alexander Graf
2022-09-26 13:38 ` [PATCH v2 02/11] target/arm: enable tracking of " Alex Bennée
2022-09-26 14:12 ` Peter Maydell
2022-09-26 15:05 ` Alex Bennée
2022-09-26 15:07 ` Peter Maydell
2022-09-26 13:38 ` [PATCH v2 03/11] target/arm: ensure HVF traps set appropriate MemTxAttrs Alex Bennée
2022-09-26 14:10 ` Peter Maydell
2022-09-26 15:46 ` Alex Bennée
2022-09-26 20:19 ` Alexander Graf
2022-09-26 13:38 ` [PATCH v2 04/11] qtest: make read/write operation appear to be from CPU Alex Bennée
2022-09-27 9:45 ` Thomas Huth
2022-09-26 13:38 ` [PATCH v2 05/11] hw/intc/gic: use MxTxAttrs to divine accessing CPU Alex Bennée
2022-09-26 14:14 ` Peter Maydell
2022-09-26 15:06 ` Alex Bennée
2022-09-26 15:18 ` Peter Maydell
2022-09-26 15:41 ` Alex Bennée [this message]
2022-09-26 15:45 ` Peter Maydell
2022-09-26 13:38 ` [PATCH v2 06/11] hw/timer: convert mptimer access to attrs to derive cpu index Alex Bennée
2022-09-26 13:39 ` [PATCH v2 07/11] configure: move detected gdb to TCG's config-host.mak Alex Bennée
2022-09-26 13:39 ` [PATCH v2 08/11] gdbstub: move into its own sub directory Alex Bennée
2022-09-26 13:39 ` [PATCH v2 09/11] gdbstub: move sstep flags probing into AccelClass Alex Bennée
2022-09-26 13:39 ` [PATCH v2 10/11] gdbstub: move breakpoint logic to accel ops Alex Bennée
2022-09-26 13:39 ` [PATCH v2 11/11] gdbstub: move guest debug support check to ops Alex Bennée
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