From: gengdongjiu <gengdongjiu@huawei.com>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Fam Zheng <fam@euphon.net>,
Peter Maydell <peter.maydell@linaro.org>,
Xiao Guangrong <xiaoguangrong.eric@gmail.com>,
kvm-devel <kvm@vger.kernel.org>,
Igor Mammedov <imammedo@redhat.com>,
Marcelo Tosatti <mtosatti@redhat.com>,
QEMU Developers <qemu-devel@nongnu.org>,
Linuxarm <linuxarm@huawei.com>,
Shannon Zhao <shannon.zhaosl@gmail.com>,
Zheng Xiang <zhengxiang9@huawei.com>,
qemu-arm <qemu-arm@nongnu.org>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <rth@twiddle.net>,
Eduardo Habkost <ehabkost@redhat.com>
Subject: Re: [PATCH v25 00/10] Add ARMv8 RAS virtualization support in QEMU
Date: Thu, 7 May 2020 12:30:49 +0800 [thread overview]
Message-ID: <934931d5-b8c5-66db-db3d-ea19bdfc30f9@huawei.com> (raw)
In-Reply-To: <20200506162439-mutt-send-email-mst@kernel.org>
On 2020/5/7 4:25, Michael S. Tsirkin wrote:
> On Wed, May 06, 2020 at 07:42:19PM +0800, gengdongjiu wrote:
>> On 2020/4/17 21:32, Peter Maydell wrote:
>>> On Fri, 10 Apr 2020 at 12:46, Dongjiu Geng <gengdongjiu@huawei.com> wrote:
>>>>
>>>> In the ARMv8 platform, the CPU error types includes synchronous external abort(SEA)
>>>> and SError Interrupt (SEI). If exception happens in guest, host does not know the detailed
>>>> information of guest, so it is expected that guest can do the recovery. For example, if an
>>>> exception happens in a guest user-space application, host does not know which application
>>>> encounters errors, only guest knows it.
>>>>
>>>> For the ARMv8 SEA/SEI, KVM or host kernel delivers SIGBUS to notify userspace.
>>>> After user space gets the notification, it will record the CPER into guest GHES
>>>> buffer and inject an exception or IRQ to guest.
>>>>
>>>> In the current implementation, if the type of SIGBUS is BUS_MCEERR_AR, we will
>>>> treat it as a synchronous exception, and notify guest with ARMv8 SEA
>>>> notification type after recording CPER into guest.
>>>
>>> Hi. I left a comment on patch 1. The other 3 patches unreviewed
>>> are 5, 6 and 8, which are all ACPI core code, so that's for
>>> MST, Igor or Shannon to review.
>>>
>>> Once those have been reviewed, please ping me if you want this
>>> to go via target-arm.next.
>>
>> Hi Peter,
>> Igor have reviewed all ACPI core code. whether you can apply this series to target-arm.next I can make another patches to solve your comments on patch1 and another APCI comment.
>> Thanks very much in advance.
>
> Given it all starts with patch 1, it's probably easier to address the
> comment and repost.
Ok, I will do it. thanks.
>
>
>>>
>>> thanks
>>> -- PMM
>>>
>>> .
>>>
>
> .
>
next prev parent reply other threads:[~2020-05-07 4:31 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-10 11:46 [PATCH v25 00/10] Add ARMv8 RAS virtualization support in QEMU Dongjiu Geng
2020-04-10 11:46 ` [PATCH v25 01/10] acpi: nvdimm: change NVDIMM_UUID_LE to a common macro Dongjiu Geng
2020-04-17 13:15 ` Peter Maydell
2020-04-10 11:46 ` [PATCH v25 02/10] hw/arm/virt: Introduce a RAS machine option Dongjiu Geng
2020-05-05 10:23 ` Igor Mammedov
2020-04-10 11:46 ` [PATCH v25 03/10] docs: APEI GHES generation and CPER record description Dongjiu Geng
2020-04-10 11:46 ` [PATCH v25 04/10] ACPI: Build related register address fields via hardware error fw_cfg blob Dongjiu Geng
2020-05-06 20:22 ` Michael S. Tsirkin
2020-04-10 11:46 ` [PATCH v25 05/10] ACPI: Build Hardware Error Source Table Dongjiu Geng
2020-05-05 10:29 ` Igor Mammedov
2020-05-06 20:22 ` Michael S. Tsirkin
2020-04-10 11:46 ` [PATCH v25 06/10] ACPI: Record the Generic Error Status Block address Dongjiu Geng
2020-05-05 10:31 ` Igor Mammedov
2020-05-06 20:23 ` Michael S. Tsirkin
2020-04-10 11:46 ` [PATCH v25 07/10] KVM: Move hwpoison page related functions into kvm-all.c Dongjiu Geng
2020-04-10 11:46 ` [PATCH v25 08/10] ACPI: Record Generic Error Status Block(GESB) table Dongjiu Geng
2020-05-05 10:44 ` Igor Mammedov
2020-05-06 11:20 ` gengdongjiu
2020-05-06 20:23 ` Michael S. Tsirkin
2020-04-10 11:46 ` [PATCH v25 09/10] target-arm: kvm64: handle SIGBUS signal from kernel or KVM Dongjiu Geng
2020-05-05 11:23 ` Igor Mammedov
2020-04-10 11:46 ` [PATCH v25 10/10] MAINTAINERS: Add ACPI/HEST/GHES entries Dongjiu Geng
2020-04-16 13:53 ` [PATCH v25 00/10] Add ARMv8 RAS virtualization support in QEMU gengdongjiu
[not found] ` <5e9863af.1c69fb81.dbe22.5caaSMTPIN_ADDED_BROKEN@mx.google.com>
2020-04-16 14:02 ` Peter Maydell
2020-04-17 13:32 ` Peter Maydell
2020-04-17 13:37 ` gengdongjiu
2020-04-18 2:40 ` gengdongjiu
2020-04-30 3:56 ` gengdongjiu
2020-04-30 12:00 ` Igor Mammedov
2020-05-06 11:42 ` gengdongjiu
2020-05-06 20:25 ` Michael S. Tsirkin
2020-05-07 4:30 ` gengdongjiu [this message]
2020-05-07 13:46 ` gengdongjiu
2020-05-02 22:21 gengdongjiu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=934931d5-b8c5-66db-db3d-ea19bdfc30f9@huawei.com \
--to=gengdongjiu@huawei.com \
--cc=Jonathan.Cameron@huawei.com \
--cc=ehabkost@redhat.com \
--cc=fam@euphon.net \
--cc=imammedo@redhat.com \
--cc=kvm@vger.kernel.org \
--cc=linuxarm@huawei.com \
--cc=mst@redhat.com \
--cc=mtosatti@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
--cc=shannon.zhaosl@gmail.com \
--cc=xiaoguangrong.eric@gmail.com \
--cc=zhengxiang9@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).