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From: Alistair Francis <alistair23@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	alistair.francis@wdc.com,  palmer@dabbelt.com,
	zhiwei_liu@linux.alibaba.com, fei2.wu@intel.com
Subject: Re: [PATCH v6 19/25] target/riscv: Hoist pbmte and hade out of the level loop
Date: Tue, 11 Apr 2023 14:26:45 +1000	[thread overview]
Message-ID: <CAKmqyKMqMfkmobTojXcJqU1toG-bK9sRP4MxQDor2+m8zBfceg@mail.gmail.com> (raw)
In-Reply-To: <20230325105429.1142530-20-richard.henderson@linaro.org>

On Sat, Mar 25, 2023 at 9:56 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> These values are constant for every level of pte lookup.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/cpu_helper.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index 833ea6d3fa..00f70a3dd5 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -870,6 +870,14 @@ static int get_physical_address(CPURISCVState *env, hwaddr *physical,
>          return TRANSLATE_FAIL;
>      }
>
> +    bool pbmte = env->menvcfg & MENVCFG_PBMTE;
> +    bool hade = env->menvcfg & MENVCFG_HADE;
> +
> +    if (first_stage && two_stage && riscv_cpu_virt_enabled(env)) {
> +        pbmte = pbmte && (env->henvcfg & HENVCFG_PBMTE);
> +        hade = hade && (env->henvcfg & HENVCFG_HADE);
> +    }
> +
>      int ptshift = (levels - 1) * ptidxbits;
>      int i;
>
> @@ -930,14 +938,6 @@ restart:
>              return TRANSLATE_FAIL;
>          }
>
> -        bool pbmte = env->menvcfg & MENVCFG_PBMTE;
> -        bool hade = env->menvcfg & MENVCFG_HADE;
> -
> -        if (first_stage && two_stage && riscv_cpu_virt_enabled(env)) {
> -            pbmte = pbmte && (env->henvcfg & HENVCFG_PBMTE);
> -            hade = hade && (env->henvcfg & HENVCFG_HADE);
> -        }
> -
>          if (riscv_cpu_sxl(env) == MXL_RV32) {
>              ppn = pte >> PTE_PPN_SHIFT;
>          } else if (pbmte || cpu->cfg.ext_svnapot) {
> --
> 2.34.1
>
>


  reply	other threads:[~2023-04-11  4:27 UTC|newest]

Thread overview: 70+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-25 10:54 [PATCH v6 00/25] target/riscv: MSTATUS_SUM + cleanups Richard Henderson
2023-03-25 10:54 ` [PATCH v6 01/25] target/riscv: Extract virt enabled state from tb flags Richard Henderson
2023-04-06  2:35   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 02/25] target/riscv: Add a general status enum for extensions Richard Henderson
2023-03-26 12:54   ` liweiwei
2023-04-11  2:05   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 03/25] target/riscv: Encode the FS and VS on a normal way for tb flags Richard Henderson
2023-04-11  1:59   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 04/25] target/riscv: Remove mstatus_hs_{fs, vs} from tb_flags Richard Henderson
2023-03-27  1:34   ` liweiwei
2023-03-27 16:22     ` Richard Henderson
2023-03-28  2:34   ` [PATCH v6 04/25] target/riscv: Remove mstatus_hs_{fs,vs} " LIU Zhiwei
2023-04-11  2:02   ` [PATCH v6 04/25] target/riscv: Remove mstatus_hs_{fs, vs} " Alistair Francis
2023-03-25 10:54 ` [PATCH v6 05/25] target/riscv: Add a tb flags field for vstart Richard Henderson
2023-04-11  2:07   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 06/25] target/riscv: Separate priv from mmu_idx Richard Henderson
2023-03-28  2:39   ` LIU Zhiwei
2023-04-11  2:08   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 07/25] target/riscv: Reduce overhead of MSTATUS_SUM change Richard Henderson
2023-03-28  2:41   ` LIU Zhiwei
2023-04-11  2:11   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 08/25] accel/tcg: Add cpu_ld*_code_mmu Richard Henderson
2023-04-11  3:10   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 09/25] target/riscv: Use cpu_ld*_code_mmu for HLVX Richard Henderson
2023-04-11  3:12   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 10/25] target/riscv: Handle HLV, HSV via helpers Richard Henderson
2023-04-11  3:34   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 11/25] target/riscv: Rename MMU_HYP_ACCESS_BIT to MMU_2STAGE_BIT Richard Henderson
2023-04-11  3:36   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 12/25] target/riscv: Introduce mmuidx_sum Richard Henderson
2023-04-11  3:39   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 13/25] target/riscv: Introduce mmuidx_priv Richard Henderson
2023-03-27  2:07   ` LIU Zhiwei
2023-03-27 16:29     ` Richard Henderson
2023-03-28  1:33       ` LIU Zhiwei
2023-03-28  1:54         ` LIU Zhiwei
2023-03-28 14:27           ` Richard Henderson
2023-04-11  3:53   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 14/25] target/riscv: Introduce mmuidx_2stage Richard Henderson
2023-04-11  3:55   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 15/25] target/riscv: Move hstatus.spvp check to check_access_hlsv Richard Henderson
2023-04-11  3:56   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 16/25] target/riscv: Set MMU_2STAGE_BIT in riscv_cpu_mmu_index Richard Henderson
2023-04-11  4:02   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 17/25] target/riscv: Check SUM in the correct register Richard Henderson
2023-04-11  4:25   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 18/25] target/riscv: Hoist second stage mode change to callers Richard Henderson
2023-04-11  4:25   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 19/25] target/riscv: Hoist pbmte and hade out of the level loop Richard Henderson
2023-04-11  4:26   ` Alistair Francis [this message]
2023-03-25 10:54 ` [PATCH v6 20/25] target/riscv: Move leaf pte processing out of " Richard Henderson
2023-04-11  4:30   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 21/25] target/riscv: Suppress pte update with is_debug Richard Henderson
2023-04-11  4:30   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 22/25] target/riscv: Don't modify SUM " Richard Henderson
2023-04-11  4:31   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 23/25] target/riscv: Merge checks for reserved pte flags Richard Henderson
2023-04-11  4:32   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 24/25] target/riscv: Reorg access check in get_physical_address Richard Henderson
2023-04-11  4:55   ` Alistair Francis
2023-03-25 10:54 ` [PATCH v6 25/25] target/riscv: Reorg sum " Richard Henderson
2023-04-11  5:36   ` Alistair Francis
2023-03-26  5:17 ` [PATCH v6 00/25] target/riscv: MSTATUS_SUM + cleanups Richard Henderson
2023-03-26 14:18 ` liweiwei
2023-03-27 16:43 ` Daniel Henrique Barboza
2023-03-28  1:22   ` Wu, Fei
2023-04-04  6:42 ` Wu, Fei
2023-04-04  7:11   ` LIU Zhiwei
2023-04-04  7:23     ` Wu, Fei
2023-04-11  5:38 ` Alistair Francis

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