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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Luc Michel <luc@lmichel.fr>, qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Havard Skinnemoen <hskinnemoen@google.com>,
	Andrew Baumann <Andrew.Baumann@microsoft.com>,
	Paul Zimmerman <pauldzim@gmail.com>,
	Niek Linnenbank <nieklinnenbank@gmail.com>,
	qemu-arm@nongnu.org
Subject: Re: [PATCH v3 08/15] hw/misc/bcm2835_cprman: add a PLL channel skeleton implementation
Date: Sat, 17 Oct 2020 12:00:33 +0200	[thread overview]
Message-ID: <ced8b284-1581-ecef-6b07-edee64ac3233@amsat.org> (raw)
In-Reply-To: <e6e2341a-6ccc-b1cc-6e25-b3d57e1cae6d@amsat.org>

On 10/10/20 6:05 PM, Philippe Mathieu-Daudé wrote:
> On 10/10/20 3:57 PM, Luc Michel wrote:
>> PLLs are composed of multiple channels. Each channel outputs one clock
>> signal. They are modeled as one device taking the PLL generated clock as
>> input, and outputting a new clock.
>>
>> A channel shares the CM register with its parent PLL, and has its own
>> A2W_CTRL register. A write to the CM register will trigger an update of
>> the PLL and all its channels, while a write to an A2W_CTRL channel
>> register will update the required channel only.
>>
>> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> Signed-off-by: Luc Michel <luc@lmichel.fr>
>> ---
>>   include/hw/misc/bcm2835_cprman.h           |  44 ++++++
>>   include/hw/misc/bcm2835_cprman_internals.h | 146 +++++++++++++++++++
>>   hw/misc/bcm2835_cprman.c                   | 155 +++++++++++++++++++--
>>   3 files changed, 337 insertions(+), 8 deletions(-)
[...]

>> +#define FILL_PLL_CHANNEL_INIT_INFO_common(pll_, channel_)            \
>> +    .parent = CPRMAN_ ## pll_,                                       \
>> +    .cm_offset = R_CM_ ## pll_,                                      \
>> +    .cm_load_mask = R_CM_ ## pll_ ## _ ## LOAD ## channel_ ## _MASK, \
>> +    .a2w_ctrl_offset = R_A2W_ ## pll_ ## _ ## channel_
>> +
>> +#define FILL_PLL_CHANNEL_INIT_INFO(pll_, channel_)                   \
>> +    FILL_PLL_CHANNEL_INIT_INFO_common(pll_, channel_),               \
>> +    .cm_hold_mask = R_CM_ ## pll_ ## _ ## HOLD ## channel_ ## _MASK, \
>> +    .fixed_divider = 1
>> +
>> +#define FILL_PLL_CHANNEL_INIT_INFO_nohold(pll_, channel_) \
>> +    FILL_PLL_CHANNEL_INIT_INFO_common(pll_, channel_),    \
>> +    .cm_hold_mask = 0
>> +
>> +static PLLChannelInitInfo PLL_CHANNEL_INIT_INFO[] = {
> 
> Hmm I missed this static definition in an header.
> As it is local and only include once, I'd prefer match the
> rest of the source tree style and name it .c.inc:
> 
> -- >8 --
> diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
> index 7e415a017c9..9d4c0ee6c73 100644
> --- a/hw/misc/bcm2835_cprman.c
> +++ b/hw/misc/bcm2835_cprman.c
> @@ -48,7 +48,7 @@
>   #include "migration/vmstate.h"
>   #include "hw/qdev-properties.h"
>   #include "hw/misc/bcm2835_cprman.h"
> -#include "hw/misc/bcm2835_cprman_internals.h"
> +#include "bcm2835_cprman_internals.c.inc"
>   #include "trace.h"
> 
>   /* PLL */
> diff --git a/include/hw/misc/bcm2835_cprman_internals.h 
> b/hw/misc/bcm2835_cprman_internals.c.inc
> similarity index 100%
> rename from include/hw/misc/bcm2835_cprman_internals.h
> rename to hw/misc/bcm2835_cprman_internals.c.inc
> ---

This can be applied directly by Peter, or can
be cleaned later. This is not a blocker to get
this series merged.


  reply	other threads:[~2020-10-17 10:02 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-10 13:57 [PATCH v3 00/15] raspi: add the bcm2835 cprman clock manager Luc Michel
2020-10-10 13:57 ` [PATCH v3 01/15] hw/core/clock: provide the VMSTATE_ARRAY_CLOCK macro Luc Michel
2020-10-10 13:57 ` [PATCH v3 02/15] hw/core/clock: trace clock values in Hz instead of ns Luc Michel
2020-10-10 15:48   ` Philippe Mathieu-Daudé
2020-10-10 13:57 ` [PATCH v3 03/15] hw/core/clock: add the clock_new helper function Luc Michel
2020-10-10 15:17   ` Philippe Mathieu-Daudé
2020-10-10 15:44     ` Philippe Mathieu-Daudé
2020-10-10 13:57 ` [PATCH v3 04/15] hw/arm/raspi: fix CPRMAN base address Luc Michel
2020-10-10 13:57 ` [PATCH v3 05/15] hw/arm/raspi: add a skeleton implementation of the CPRMAN Luc Michel
2020-10-10 13:57 ` [PATCH v3 06/15] hw/misc/bcm2835_cprman: add a PLL skeleton implementation Luc Michel
2020-10-10 13:57 ` [PATCH v3 07/15] hw/misc/bcm2835_cprman: implement PLLs behaviour Luc Michel
2020-10-10 13:57 ` [PATCH v3 08/15] hw/misc/bcm2835_cprman: add a PLL channel skeleton implementation Luc Michel
2020-10-10 16:05   ` Philippe Mathieu-Daudé
2020-10-17 10:00     ` Philippe Mathieu-Daudé [this message]
2020-10-10 13:57 ` [PATCH v3 09/15] hw/misc/bcm2835_cprman: implement PLL channels behaviour Luc Michel
2020-10-10 13:57 ` [PATCH v3 10/15] hw/misc/bcm2835_cprman: add a clock mux skeleton implementation Luc Michel
2020-10-10 13:57 ` [PATCH v3 11/15] hw/misc/bcm2835_cprman: implement clock mux behaviour Luc Michel
2020-10-10 15:52   ` Philippe Mathieu-Daudé
2020-10-10 13:57 ` [PATCH v3 12/15] hw/misc/bcm2835_cprman: add the DSI0HSCK multiplexer Luc Michel
2020-10-10 13:57 ` [PATCH v3 13/15] hw/misc/bcm2835_cprman: add sane reset values to the registers Luc Michel
2020-10-10 16:18   ` Philippe Mathieu-Daudé
2020-10-11 18:26     ` Luc Michel
2020-10-16 17:10       ` Philippe Mathieu-Daudé
2020-10-19 15:44         ` Philippe Mathieu-Daudé
2020-10-10 13:57 ` [PATCH v3 14/15] hw/char/pl011: add a clock input Luc Michel
2020-10-10 13:57 ` [PATCH v3 15/15] hw/arm/bcm2835_peripherals: connect the UART clock Luc Michel
2020-10-16 17:11 ` [PATCH v3 00/15] raspi: add the bcm2835 cprman clock manager Philippe Mathieu-Daudé
2020-10-19 15:45 ` Peter Maydell
2020-10-19 19:31   ` Peter Maydell
2020-10-27  8:55     ` Philippe Mathieu-Daudé
2020-10-27 11:11       ` Peter Maydell
2020-10-22 22:06 ` Philippe Mathieu-Daudé
2020-10-22 22:48   ` Guenter Roeck
2020-10-23  3:55   ` Guenter Roeck
2020-10-23 11:13     ` Philippe Mathieu-Daudé

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