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* [PATCH] remove unnecessary ifdef TARGET_RISCV64
@ 2019-10-30  0:23 hiroyuki.obinata
  2019-11-01 16:58 ` Palmer Dabbelt
  0 siblings, 1 reply; 3+ messages in thread
From: hiroyuki.obinata @ 2019-10-30  0:23 UTC (permalink / raw)
  To: qemu-devel
  Cc: open list:RISC-V TCG CPUs, Sagar Karandikar, hiroyuki.obinata,
	Bastian Koppelmann, Palmer Dabbelt, Alistair Francis

From: "hiroyuki.obinata" <hiroyuki.obinata@gmail.com>

Signed-off-by: Hiroyuki Obinata <hiroyuki.obinata@gmail.com>
---
 target/riscv/translate.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index adeddb85f6..5c4dd21a98 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -64,12 +64,10 @@ static const int tcg_memop_lookup[8] = {
     [0] = MO_SB,
     [1] = MO_TESW,
     [2] = MO_TESL,
+    [3] = MO_TEQ,
     [4] = MO_UB,
     [5] = MO_TEUW,
-#ifdef TARGET_RISCV64
-    [3] = MO_TEQ,
     [6] = MO_TEUL,
-#endif
 };
 #endif
 
-- 
2.17.1



^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] remove unnecessary ifdef TARGET_RISCV64
  2019-10-30  0:23 [PATCH] remove unnecessary ifdef TARGET_RISCV64 hiroyuki.obinata
@ 2019-11-01 16:58 ` Palmer Dabbelt
  2019-11-02  1:16   ` Obinata Hiroyuki
  0 siblings, 1 reply; 3+ messages in thread
From: Palmer Dabbelt @ 2019-11-01 16:58 UTC (permalink / raw)
  To: hiroyuki.obinata
  Cc: qemu-riscv, sagark, hiroyuki.obinata, Bastian Koppelmann,
	qemu-devel, Alistair Francis

On Tue, 29 Oct 2019 17:23:18 PDT (-0700), hiroyuki.obinata@gmail.com wrote:
> From: "hiroyuki.obinata" <hiroyuki.obinata@gmail.com>
>
> Signed-off-by: Hiroyuki Obinata <hiroyuki.obinata@gmail.com>
> ---
>  target/riscv/translate.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index adeddb85f6..5c4dd21a98 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -64,12 +64,10 @@ static const int tcg_memop_lookup[8] = {
>      [0] = MO_SB,
>      [1] = MO_TESW,
>      [2] = MO_TESL,
> +    [3] = MO_TEQ,
>      [4] = MO_UB,
>      [5] = MO_TEUW,
> -#ifdef TARGET_RISCV64
> -    [3] = MO_TEQ,
>      [6] = MO_TEUL,
> -#endif
>  };
>  #endif

Reviewed-by: Palmer Dabbelt <palmer@dabbelt.com>

This is a non-functional change (the code in question was already wrapped in an 
"#ifdef TARGET_RISCV64", so this internal one was redundant), so I'm happy to 
include it during the soft freeze.

I've added this to the queue for my next PR.


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] remove unnecessary ifdef TARGET_RISCV64
  2019-11-01 16:58 ` Palmer Dabbelt
@ 2019-11-02  1:16   ` Obinata Hiroyuki
  0 siblings, 0 replies; 3+ messages in thread
From: Obinata Hiroyuki @ 2019-11-02  1:16 UTC (permalink / raw)
  To: Palmer Dabbelt
  Cc: Bastian Koppelmann, Alistair Francis, open list:RISC-V TCG CPUs,
	qemu-devel, Sagar Karandikar

[-- Attachment #1: Type: text/plain, Size: 1223 bytes --]

Thanks!

2019年11月2日(土) 1:58 Palmer Dabbelt <palmer@dabbelt.com>:

> On Tue, 29 Oct 2019 17:23:18 PDT (-0700), hiroyuki.obinata@gmail.com
> wrote:
> > From: "hiroyuki.obinata" <hiroyuki.obinata@gmail.com>
> >
> > Signed-off-by: Hiroyuki Obinata <hiroyuki.obinata@gmail.com>
> > ---
> >  target/riscv/translate.c | 4 +---
> >  1 file changed, 1 insertion(+), 3 deletions(-)
> >
> > diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> > index adeddb85f6..5c4dd21a98 100644
> > --- a/target/riscv/translate.c
> > +++ b/target/riscv/translate.c
> > @@ -64,12 +64,10 @@ static const int tcg_memop_lookup[8] = {
> >      [0] = MO_SB,
> >      [1] = MO_TESW,
> >      [2] = MO_TESL,
> > +    [3] = MO_TEQ,
> >      [4] = MO_UB,
> >      [5] = MO_TEUW,
> > -#ifdef TARGET_RISCV64
> > -    [3] = MO_TEQ,
> >      [6] = MO_TEUL,
> > -#endif
> >  };
> >  #endif
>
> Reviewed-by: Palmer Dabbelt <palmer@dabbelt.com>
>
> This is a non-functional change (the code in question was already wrapped
> in an
> "#ifdef TARGET_RISCV64", so this internal one was redundant), so I'm happy
> to
> include it during the soft freeze.
>
> I've added this to the queue for my next PR.
>

[-- Attachment #2: Type: text/html, Size: 1948 bytes --]

^ permalink raw reply	[flat|nested] 3+ messages in thread

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2019-10-30  0:23 [PATCH] remove unnecessary ifdef TARGET_RISCV64 hiroyuki.obinata
2019-11-01 16:58 ` Palmer Dabbelt
2019-11-02  1:16   ` Obinata Hiroyuki

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