All of lore.kernel.org
 help / color / mirror / Atom feed
From: Kevin Hilman <khilman@ti.com>
To: linux-omap@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 21/22] OMAP2+: PRM: add register access functions for VC/VP
Date: Mon, 29 Aug 2011 10:35:54 -0700	[thread overview]
Message-ID: <1314639355-12713-22-git-send-email-khilman@ti.com> (raw)
In-Reply-To: <1314639355-12713-1-git-send-email-khilman@ti.com>

On OMAP3+, the voltage controller (VC) and voltage processor (VP) are
inside the PRM.  Add some PRM helper functions for register access to
these module registers.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap2/prm2xxx_3xxx.c |   15 +++++++++++++++
 arch/arm/mach-omap2/prm2xxx_3xxx.h |    8 ++++++++
 arch/arm/mach-omap2/prm44xx.c      |   22 ++++++++++++++++++++++
 arch/arm/mach-omap2/prm44xx.h      |    8 ++++++++
 4 files changed, 53 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 58c5c87..3b83763 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -197,3 +197,18 @@ void omap3_prm_vp_clear_txdone(u8 vp_id)
 	omap2_prm_write_mod_reg(vp->tranxdone_status,
 				OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
 }
+
+u32 omap3_prm_vcvp_read(u8 offset)
+{
+	return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset);
+}
+
+void omap3_prm_vcvp_write(u32 val, u8 offset)
+{
+	omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset);
+}
+
+u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
+{
+	return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset);
+}
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 5112526..cef533d 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -307,7 +307,15 @@ extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
 u32 omap3_prm_vp_check_txdone(u8 vp_id);
 void omap3_prm_vp_clear_txdone(u8 vp_id);
 
+/*
+ * OMAP3 access functions for voltage controller (VC) and
+ * voltage proccessor (VP) in the PRM.
+ */
+extern u32 omap3_prm_vcvp_read(u8 offset);
+extern void omap3_prm_vcvp_write(u32 val, u8 offset);
+extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
 #endif	/* CONFIG_ARCH_OMAP4 */
+
 #endif
 
 /*
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 390e32c..495a31a 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -24,6 +24,8 @@
 #include "vp.h"
 #include "prm44xx.h"
 #include "prm-regbits-44xx.h"
+#include "prcm44xx.h"
+#include "prminst44xx.h"
 
 /* PRM low-level functions */
 
@@ -99,3 +101,23 @@ void omap4_prm_vp_clear_txdone(u8 vp_id)
 				     OMAP4430_PRM_OCP_SOCKET_INST,
 				     vp->irqstatus_mpu);
 };
+
+u32 omap4_prm_vcvp_read(u8 offset)
+{
+	return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
+					   OMAP4430_PRM_DEVICE_INST, offset);
+}
+
+void omap4_prm_vcvp_write(u32 val, u8 offset)
+{
+	omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION,
+				     OMAP4430_PRM_DEVICE_INST, offset);
+}
+
+u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
+{
+	return omap4_prminst_rmw_inst_reg_bits(mask, bits,
+					       OMAP4430_PRM_PARTITION,
+					       OMAP4430_PRM_DEVICE_INST,
+					       offset);
+}
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index b28c87d..3d66ccd 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -755,6 +755,14 @@ extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
 u32 omap4_prm_vp_check_txdone(u8 vp_id);
 void omap4_prm_vp_clear_txdone(u8 vp_id);
 
+/*
+ * OMAP4 access functions for voltage controller (VC) and
+ * voltage proccessor (VP) in the PRM.
+ */
+extern u32 omap4_prm_vcvp_read(u8 offset);
+extern void omap4_prm_vcvp_write(u32 val, u8 offset);
+extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
+
 # endif
 
 #endif
-- 
1.7.6


WARNING: multiple messages have this Message-ID (diff)
From: khilman@ti.com (Kevin Hilman)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 21/22] OMAP2+: PRM: add register access functions for VC/VP
Date: Mon, 29 Aug 2011 10:35:54 -0700	[thread overview]
Message-ID: <1314639355-12713-22-git-send-email-khilman@ti.com> (raw)
In-Reply-To: <1314639355-12713-1-git-send-email-khilman@ti.com>

On OMAP3+, the voltage controller (VC) and voltage processor (VP) are
inside the PRM.  Add some PRM helper functions for register access to
these module registers.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap2/prm2xxx_3xxx.c |   15 +++++++++++++++
 arch/arm/mach-omap2/prm2xxx_3xxx.h |    8 ++++++++
 arch/arm/mach-omap2/prm44xx.c      |   22 ++++++++++++++++++++++
 arch/arm/mach-omap2/prm44xx.h      |    8 ++++++++
 4 files changed, 53 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 58c5c87..3b83763 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -197,3 +197,18 @@ void omap3_prm_vp_clear_txdone(u8 vp_id)
 	omap2_prm_write_mod_reg(vp->tranxdone_status,
 				OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
 }
+
+u32 omap3_prm_vcvp_read(u8 offset)
+{
+	return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset);
+}
+
+void omap3_prm_vcvp_write(u32 val, u8 offset)
+{
+	omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset);
+}
+
+u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
+{
+	return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset);
+}
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 5112526..cef533d 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -307,7 +307,15 @@ extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
 u32 omap3_prm_vp_check_txdone(u8 vp_id);
 void omap3_prm_vp_clear_txdone(u8 vp_id);
 
+/*
+ * OMAP3 access functions for voltage controller (VC) and
+ * voltage proccessor (VP) in the PRM.
+ */
+extern u32 omap3_prm_vcvp_read(u8 offset);
+extern void omap3_prm_vcvp_write(u32 val, u8 offset);
+extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
 #endif	/* CONFIG_ARCH_OMAP4 */
+
 #endif
 
 /*
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 390e32c..495a31a 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -24,6 +24,8 @@
 #include "vp.h"
 #include "prm44xx.h"
 #include "prm-regbits-44xx.h"
+#include "prcm44xx.h"
+#include "prminst44xx.h"
 
 /* PRM low-level functions */
 
@@ -99,3 +101,23 @@ void omap4_prm_vp_clear_txdone(u8 vp_id)
 				     OMAP4430_PRM_OCP_SOCKET_INST,
 				     vp->irqstatus_mpu);
 };
+
+u32 omap4_prm_vcvp_read(u8 offset)
+{
+	return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
+					   OMAP4430_PRM_DEVICE_INST, offset);
+}
+
+void omap4_prm_vcvp_write(u32 val, u8 offset)
+{
+	omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION,
+				     OMAP4430_PRM_DEVICE_INST, offset);
+}
+
+u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
+{
+	return omap4_prminst_rmw_inst_reg_bits(mask, bits,
+					       OMAP4430_PRM_PARTITION,
+					       OMAP4430_PRM_DEVICE_INST,
+					       offset);
+}
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index b28c87d..3d66ccd 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -755,6 +755,14 @@ extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
 u32 omap4_prm_vp_check_txdone(u8 vp_id);
 void omap4_prm_vp_clear_txdone(u8 vp_id);
 
+/*
+ * OMAP4 access functions for voltage controller (VC) and
+ * voltage proccessor (VP) in the PRM.
+ */
+extern u32 omap4_prm_vcvp_read(u8 offset);
+extern void omap4_prm_vcvp_write(u32 val, u8 offset);
+extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
+
 # endif
 
 #endif
-- 
1.7.6

  parent reply	other threads:[~2011-08-29 17:36 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-08-29 17:35 [PATCH 00/22] OMAP: voltage cleanup part A Kevin Hilman
2011-08-29 17:35 ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 01/22] OMAP2+: hwmod: remove unused voltagedomain pointer Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 02/22] OMAP2+: voltage: move PRCM mod offets into VC/VP structures Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 03/22] OMAP2+: voltage: move prm_irqst_reg from VP into voltage domain Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 04/22] OMAP2+: voltage: start towards a new voltagedomain layer Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 05/22] OMAP3: voltage: rename "mpu" voltagedomain to "mpu_iva" Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 06/22] OMAP3: voltagedomain data: add wakeup domain Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 07/22] OMAP3+: voltage: add scalable flag to voltagedomain Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 08/22] OMAP2+: powerdomain: add voltagedomain to struct powerdomain Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 09/22] OMAP2: add voltage domains and connect to powerdomains Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-09-07 10:39   ` Jean Pihet
2011-09-07 10:39     ` Jean Pihet
2011-09-09 21:41     ` Kevin Hilman
2011-09-09 21:41       ` Kevin Hilman
2011-09-09 21:46     ` Kevin Hilman
2011-09-09 21:46       ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 10/22] OMAP3: powerdomain data: add voltage domains Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 11/22] OMAP4: " Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-09-07  9:04   ` Jean Pihet
2011-09-07  9:04     ` Jean Pihet
2011-09-09 21:48     ` Kevin Hilman
2011-09-09 21:48       ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 12/22] OMAP2+: powerdomain: add voltage domain lookup during register Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 13/22] OMAP2+: voltage: keep track of powerdomains in each voltagedomain Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-09-07  9:23   ` Jean Pihet
2011-09-07  9:23     ` Jean Pihet
2011-09-09 21:52     ` Kevin Hilman
2011-09-09 21:52       ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 14/22] OMAP2+: voltage: split voltage controller (VC) code into dedicated layer Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-09-07 10:42   ` Jean Pihet
2011-09-07 10:42     ` Jean Pihet
2011-09-09 21:51     ` Kevin Hilman
2011-09-09 21:51       ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 15/22] OMAP2+: voltage: move VC into struct voltagedomain, misc. renames Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 16/22] OMAP2+: voltage: enable VC bypass scale method when VC is initialized Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 17/22] OMAP2+: voltage: split out voltage processor (VP) code into new layer Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-09-07  9:52   ` Jean Pihet
2011-09-07  9:52     ` Jean Pihet
2011-08-29 17:35 ` [PATCH 18/22] OMAP2+: VC: support PMICs with separate voltage and command registers Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 19/22] OMAP2+: add PRM VP functions for checking/clearing VP TX done status Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-08-29 17:35 ` [PATCH 20/22] OMAP3+ VP: replace transaction done check/clear with VP ops Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-08-29 17:35 ` Kevin Hilman [this message]
2011-08-29 17:35   ` [PATCH 21/22] OMAP2+: PRM: add register access functions for VC/VP Kevin Hilman
2011-08-29 17:35 ` [PATCH 22/22] OMAP3+: voltage: convert to PRM register access functions Kevin Hilman
2011-08-29 17:35   ` Kevin Hilman
2011-09-07 19:12 ` [PATCH 00/22] OMAP: voltage cleanup part A Jean Pihet
2011-09-07 19:12   ` Jean Pihet

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1314639355-12713-22-git-send-email-khilman@ti.com \
    --to=khilman@ti.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-omap@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.