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From: Wu Hao <hao.wu@intel.com>
To: atull@kernel.org, mdf@kernel.org, linux-fpga@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: linux-api@vger.kernel.org, luwei.kang@intel.com,
	yi.z.zhang@intel.com, hao.wu@intel.com,
	Tim Whisonant <tim.whisonant@intel.com>,
	Enno Luebbers <enno.luebbers@intel.com>,
	Shiva Rao <shiva.rao@intel.com>,
	Christopher Rauer <christopher.rauer@intel.com>,
	Xiao Guangrong <guangrong.xiao@linux.intel.com>
Subject: [PATCH v5 14/28] fpga: dfl: add FPGA Management Engine driver basic framework
Date: Wed,  2 May 2018 10:50:17 +0800	[thread overview]
Message-ID: <1525229431-3087-15-git-send-email-hao.wu@intel.com> (raw)
In-Reply-To: <1525229431-3087-1-git-send-email-hao.wu@intel.com>

From: Kang Luwei <luwei.kang@intel.com>

The FPGA Management Engine (FME) provides power, thermal management,
performance counters, partial reconfiguration and other functions. For each
function, it is packaged into a private feature linked to the FME feature
device in the 'Device Feature List'. It's a platform device created by
DFL framework.

This patch adds the basic framework of FME platform driver. It defines
sub feature drivers to handle the different sub features, including init,
uinit and ioctl. It also registers the file operations for the device file.

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Signed-off-by: Enno Luebbers <enno.luebbers@intel.com>
Signed-off-by: Shiva Rao <shiva.rao@intel.com>
Signed-off-by: Christopher Rauer <christopher.rauer@intel.com>
Signed-off-by: Kang Luwei <luwei.kang@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
---
v3: rename driver from intel-fpga-fme to dfl-fme
    rename Kconfig from INTEL_FPGA_FME to FPGA_DFL_FME
v4: fix SPDX license issue, use dfl-fme as module name
v5: rebase, due to DFL framework naming changes on functions and data structures.
    fix uinit order in remove function.
    remove else block in fme_ioctl function per suggestion from Alan.
---
 drivers/fpga/Kconfig        |  10 +++
 drivers/fpga/Makefile       |   3 +
 drivers/fpga/dfl-fme-main.c | 158 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 171 insertions(+)
 create mode 100644 drivers/fpga/dfl-fme-main.c

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 87f3d44..103d5e2 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -140,6 +140,16 @@ config FPGA_DFL
 	  Gate Array (FPGA) solutions which implement Device Feature List.
 	  It provides enumeration APIs, and feature device infrastructure.
 
+config FPGA_DFL_FME
+	tristate "FPGA DFL FME Driver"
+	depends on FPGA_DFL
+	help
+	  The FPGA Management Engine (FME) is a feature device implemented
+	  under Device Feature List (DFL) framework. Select this option to
+	  enable the platform device driver for FME which implements all
+	  FPGA platform level management features. There shall be 1 FME
+	  per DFL based FPGA device.
+
 config FPGA_DFL_PCI
 	tristate "FPGA Device Feature List (DFL) PCIe Device Driver"
 	depends on PCI && FPGA_DFL
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 4375630..fbd1c85 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -30,6 +30,9 @@ obj-$(CONFIG_OF_FPGA_REGION)		+= of-fpga-region.o
 
 # FPGA Device Feature List Support
 obj-$(CONFIG_FPGA_DFL)			+= dfl.o
+obj-$(CONFIG_FPGA_DFL_FME)		+= dfl-fme.o
+
+dfl-fme-objs := dfl-fme-main.o
 
 # Drivers for FPGAs which implement DFL
 obj-$(CONFIG_FPGA_DFL_PCI)		+= dfl-pci.o
diff --git a/drivers/fpga/dfl-fme-main.c b/drivers/fpga/dfl-fme-main.c
new file mode 100644
index 0000000..000651f
--- /dev/null
+++ b/drivers/fpga/dfl-fme-main.c
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Driver for FPGA Management Engine (FME)
+ *
+ * Copyright (C) 2017 Intel Corporation, Inc.
+ *
+ * Authors:
+ *   Kang Luwei <luwei.kang@intel.com>
+ *   Xiao Guangrong <guangrong.xiao@linux.intel.com>
+ *   Joseph Grecco <joe.grecco@intel.com>
+ *   Enno Luebbers <enno.luebbers@intel.com>
+ *   Tim Whisonant <tim.whisonant@intel.com>
+ *   Ananda Ravuri <ananda.ravuri@intel.com>
+ *   Henry Mitchel <henry.mitchel@intel.com>
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+
+#include "dfl.h"
+
+static int
+fme_hdr_init(struct platform_device *pdev, struct dfl_feature *feature)
+{
+	dev_dbg(&pdev->dev, "FME HDR Init.\n");
+
+	return 0;
+}
+
+static void
+fme_hdr_uinit(struct platform_device *pdev, struct dfl_feature *feature)
+{
+	dev_dbg(&pdev->dev, "FME HDR UInit.\n");
+}
+
+static const struct dfl_feature_ops fme_hdr_ops = {
+	.init = fme_hdr_init,
+	.uinit = fme_hdr_uinit,
+};
+
+static struct dfl_feature_driver fme_feature_drvs[] = {
+	{
+		.id = FME_FEATURE_ID_HEADER,
+		.ops = &fme_hdr_ops,
+	},
+	{
+		.ops = NULL,
+	},
+};
+
+static int fme_open(struct inode *inode, struct file *filp)
+{
+	struct platform_device *fdev = dfl_fpga_inode_to_feature_dev(inode);
+	struct dfl_feature_platform_data *pdata = dev_get_platdata(&fdev->dev);
+	int ret;
+
+	if (WARN_ON(!pdata))
+		return -ENODEV;
+
+	ret = dfl_feature_dev_use_begin(pdata);
+	if (ret)
+		return ret;
+
+	dev_dbg(&fdev->dev, "Device File Open\n");
+	filp->private_data = pdata;
+
+	return 0;
+}
+
+static int fme_release(struct inode *inode, struct file *filp)
+{
+	struct dfl_feature_platform_data *pdata = filp->private_data;
+	struct platform_device *pdev = pdata->dev;
+
+	dev_dbg(&pdev->dev, "Device File Release\n");
+	dfl_feature_dev_use_end(pdata);
+
+	return 0;
+}
+
+static long fme_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
+{
+	struct dfl_feature_platform_data *pdata = filp->private_data;
+	struct platform_device *pdev = pdata->dev;
+	struct dfl_feature *f;
+	long ret;
+
+	dev_dbg(&pdev->dev, "%s cmd 0x%x\n", __func__, cmd);
+
+	switch (cmd) {
+	default:
+		/*
+		 * Let sub-feature's ioctl function to handle the cmd
+		 * Sub-feature's ioctl returns -ENODEV when cmd is not
+		 * handled in this sub feature, and returns 0 and other
+		 * error code if cmd is handled.
+		 */
+		dfl_fpga_dev_for_each_feature(pdata, f) {
+			if (f->ops && f->ops->ioctl) {
+				ret = f->ops->ioctl(pdev, f, cmd, arg);
+				if (ret != -ENODEV)
+					return ret;
+			}
+		}
+	}
+
+	return -EINVAL;
+}
+
+static const struct file_operations fme_fops = {
+	.owner		= THIS_MODULE,
+	.open		= fme_open,
+	.release	= fme_release,
+	.unlocked_ioctl = fme_ioctl,
+};
+
+static int fme_probe(struct platform_device *pdev)
+{
+	int ret;
+
+	ret = dfl_fpga_dev_feature_init(pdev, fme_feature_drvs);
+	if (ret)
+		goto exit;
+
+	ret = dfl_fpga_register_dev_ops(pdev, &fme_fops, THIS_MODULE);
+	if (ret)
+		goto feature_uinit;
+
+	return 0;
+
+feature_uinit:
+	dfl_fpga_dev_feature_uinit(pdev);
+exit:
+	return ret;
+}
+
+static int fme_remove(struct platform_device *pdev)
+{
+	dfl_fpga_unregister_dev_ops(pdev);
+	dfl_fpga_dev_feature_uinit(pdev);
+
+	return 0;
+}
+
+static struct platform_driver fme_driver = {
+	.driver	= {
+		.name    = DFL_FPGA_FEATURE_DEV_FME,
+	},
+	.probe   = fme_probe,
+	.remove  = fme_remove,
+};
+
+module_platform_driver(fme_driver);
+
+MODULE_DESCRIPTION("FPGA Management Engine driver");
+MODULE_AUTHOR("Intel Corporation");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:dfl-fme");
-- 
1.8.3.1


  parent reply	other threads:[~2018-05-02  3:06 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-02  2:50 [PATCH v5 00/28] FPGA Device Feature List (DFL) Device Drivers Wu Hao
2018-05-02  2:50 ` [PATCH v5 01/28] docs: fpga: add a document for FPGA Device Feature List (DFL) Framework Overview Wu Hao
2018-06-06 16:16   ` Alan Tull
2018-06-07  2:00     ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 02/28] fpga: mgr: add region_id to fpga_image_info Wu Hao
2018-05-02  2:50 ` [PATCH v5 03/28] fpga: mgr: add status for fpga-manager Wu Hao
2018-05-02  2:50 ` [PATCH v5 04/28] fpga: mgr: add compat_id support Wu Hao
2018-05-07 21:09   ` Alan Tull
2018-05-21  3:03     ` Wu Hao
2018-05-21 17:33       ` Alan Tull
2018-05-22  9:39         ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 05/28] fpga: region: " Wu Hao
2018-05-07 21:09   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 06/28] fpga: add device feature list support Wu Hao
2018-06-05 20:21   ` Alan Tull
2018-06-06 12:22     ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 07/28] fpga: dfl: add chardev support for feature devices Wu Hao
2018-06-05 20:21   ` Alan Tull
2018-06-06 12:24     ` Wu Hao
2018-06-07 18:03       ` Alan Tull
2018-06-08  0:11         ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 08/28] fpga: dfl: add dfl_fpga_cdev_find_port Wu Hao
2018-05-02  2:50 ` [PATCH v5 09/28] fpga: dfl: add feature device infrastructure Wu Hao
2018-06-05 21:14   ` Alan Tull
2018-06-06 12:33     ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 10/28] fpga: dfl: add dfl_fpga_port_ops support Wu Hao
2018-06-05 21:24   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 11/28] fpga: dfl: add dfl_fpga_check_port_id function Wu Hao
2018-06-05 21:25   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 12/28] fpga: add FPGA DFL PCIe device driver Wu Hao
2018-05-02  2:50 ` [PATCH v5 13/28] fpga: dfl-pci: add enumeration for feature devices Wu Hao
2018-05-02  2:50 ` Wu Hao [this message]
2018-06-06 16:08   ` [PATCH v5 14/28] fpga: dfl: add FPGA Management Engine driver basic framework Alan Tull
2018-05-02  2:50 ` [PATCH v5 15/28] fpga: dfl: fme: add header sub feature support Wu Hao
2018-05-02  2:50 ` [PATCH v5 16/28] fpga: dfl: fme: add DFL_FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2018-05-02  2:50 ` [PATCH v5 17/28] fpga: dfl: fme: add partial reconfiguration sub feature support Wu Hao
2018-06-06 16:08   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 18/28] fpga: dfl: add fpga manager platform driver for FME Wu Hao
2018-06-06 15:52   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 19/28] fpga: dfl: fme-mgr: add compat_id support Wu Hao
2018-05-07 21:12   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 20/28] fpga: dfl: add fpga bridge platform driver for FME Wu Hao
2018-05-23 15:15   ` Alan Tull
2018-05-23 15:28     ` Wu Hao
2018-05-23 21:06       ` Alan Tull
2018-05-23 23:42         ` Wu Hao
2018-05-24 17:26           ` Alan Tull
2018-05-24 23:59             ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 21/28] fpga: dfl: add fpga region " Wu Hao
2018-05-02  2:50 ` [PATCH v5 22/28] fpga: dfl: fme-region: add support for compat_id Wu Hao
2018-05-07 21:12   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 23/28] fpga: dfl: add FPGA Accelerated Function Unit driver basic framework Wu Hao
2018-05-02  2:50 ` [PATCH v5 24/28] fpga: dfl: afu: add port ops support Wu Hao
2018-06-06 15:57   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 25/28] fpga: dfl: afu: add header sub feature support Wu Hao
2018-05-02  2:50 ` [PATCH v5 26/28] fpga: dfl: afu: add DFL_FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2018-05-02  2:50 ` [PATCH v5 27/28] fpga: dfl: afu: add afu sub feature support Wu Hao
2018-06-06 16:04   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 28/28] fpga: dfl: afu: add DFL_FPGA_PORT_DMA_MAP/UNMAP ioctls support Wu Hao
2018-06-06 16:09   ` Alan Tull
2018-05-03 21:14 ` [PATCH v5 00/28] FPGA Device Feature List (DFL) Device Drivers Alan Tull
2018-05-04  0:15   ` Wu Hao

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