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From: Bin Meng <bmeng.cn@gmail.com>
To: "Peter Maydell" <peter.maydell@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Jean-Christophe Dubois" <jcd@tribudubois.net>,
	"Alistair Francis" <alistair.francis@wdc.com>
Cc: Bin Meng <bin.meng@windriver.com>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH v8 03/10] hw/ssi: imx_spi: Remove pointless variable initialization
Date: Tue, 19 Jan 2021 21:38:59 +0800	[thread overview]
Message-ID: <1611063546-20278-4-git-send-email-bmeng.cn@gmail.com> (raw)
In-Reply-To: <1611063546-20278-1-git-send-email-bmeng.cn@gmail.com>

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

'burst_length' is cleared in imx_spi_reset(), which is called
after imx_spi_realize(). Remove the initialization to simplify.

Reviewed-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210115153049.3353008-3-f4bug@amsat.org>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Signed-off-by: Bin Meng <bin.meng@windriver.com>

---

(no changes since v7)

Changes in v7:
- remove the RFC tag

Changes in v6:
- new patch: [RFC] remove pointless variable initialization

 hw/ssi/imx_spi.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index 4d488b1..8fb3c9b 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -434,8 +434,6 @@ static void imx_spi_realize(DeviceState *dev, Error **errp)
         sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->cs_lines[i]);
     }
 
-    s->burst_length = 0;
-
     fifo32_create(&s->tx_fifo, ECSPI_FIFO_SIZE);
     fifo32_create(&s->rx_fifo, ECSPI_FIFO_SIZE);
 }
-- 
2.7.4



  parent reply	other threads:[~2021-01-19 13:43 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-19 13:38 [PATCH v8 00/10] hw/ssi: imx_spi: Fix various bugs in the imx_spi model Bin Meng
2021-01-19 13:38 ` [PATCH v8 01/10] hw/ssi: imx_spi: Use a macro for number of chip selects supported Bin Meng
2021-01-19 13:38 ` [PATCH v8 02/10] hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset() Bin Meng
2021-01-28 13:34   ` Peter Maydell
2021-01-19 13:38 ` Bin Meng [this message]
2021-01-19 13:39 ` [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value Bin Meng
2021-01-28 13:43   ` Peter Maydell
2021-01-28 13:46     ` Bin Meng
2021-01-28 13:54       ` Peter Maydell
2021-01-28 14:15         ` Bin Meng
2021-01-28 14:17         ` Philippe Mathieu-Daudé
2021-01-28 14:22           ` Peter Maydell
2021-01-28 14:32             ` Philippe Mathieu-Daudé
2021-01-28 14:41               ` Peter Maydell
2021-01-28 14:49                 ` Philippe Mathieu-Daudé
2021-01-28 15:00                   ` Bin Meng
2021-01-19 13:39 ` [PATCH v8 05/10] hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabled Bin Meng
2021-01-19 13:39 ` [PATCH v8 06/10] hw/ssi: imx_spi: Rework imx_spi_write() " Bin Meng
2021-01-28 13:34   ` Peter Maydell
2021-01-19 13:39 ` [PATCH v8 07/10] hw/ssi: imx_spi: Disable chip selects when controller is disabled Bin Meng
2021-01-19 13:39 ` [PATCH v8 08/10] hw/ssi: imx_spi: Round up the burst length to be multiple of 8 Bin Meng
2021-01-28 13:50   ` Peter Maydell
2021-01-19 13:39 ` [PATCH v8 09/10] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic Bin Meng
2021-01-19 13:39 ` [PATCH v8 10/10] hw/ssi: imx_spi: Correct tx and rx fifo endianness Bin Meng
2021-01-28 13:32   ` Peter Maydell
2021-01-22 13:36 ` [PATCH v8 00/10] hw/ssi: imx_spi: Fix various bugs in the imx_spi model Bin Meng
2021-01-28  7:15   ` Bin Meng
2021-01-28 13:51     ` Peter Maydell

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