[PATCH v9 00/24] Remaining DSC + FEC patches

From: Manasi Navare <manasi.d.navare@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Manasi Navare <manasi.d.navare@intel.com>
Subject: [PATCH v9 00/24] Remaining DSC + FEC patches
Date: Tue, 13 Nov 2018 17:52:08 -0800	[thread overview]
Message-ID: <20181114015232.21952-1-manasi.d.navare@intel.com> (raw)

This patch series addresses review comments from DSC patch set:
https://patchwork.freedesktop.org/series/51986/
and FEc patch set:
https://patchwork.freedesktop.org/series/47848/

Anusha Srivatsa (4):
  i915/dp/fec: Add fec_enable to the crtc state.
  drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION
  i915/dp/fec: Configure the Forward Error Correction bits.
  drm/i915/fec: Disable FEC state.

Gaurav K Singh (3):
  drm/i915/dsc: Define & Compute VESA DSC params
  drm/i915/dsc: Compute Rate Control parameters for DSC
  drm/i915/dp: Enable/Disable DSC in DP Sink

Manasi Navare (16):
  drm/dsc: Modify DRM helper to return complete DSC color depth
    capabilities
  drm/dsc: Define Display Stream Compression PPS infoframe
  drm/dsc: Define VESA Display Stream Compression Capabilities
  drm/dsc: Add helpers for DSC picture parameter set infoframes
  drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants
  drm/i915/dp: Add DSC params and DSC config to intel_crtc_state
  drm/i915/dp: Compute DSC pipe config in atomic check
  drm/i915/dp: Do not enable PSR2 if DSC is enabled
  drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
  drm/i915/dp: Configure i915 Picture parameter Set registers during DSC
    enabling
  drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs
  drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
  drm/i915/dp: Configure Display stream splitter registers during DSC
    enable
  drm/i915/dp: Disable DSC in source by disabling DSS CTL bits
  drm/i915/dsc: Enable and disable appropriate power wells for VDSC
  drm/i915/dsc: Add Per connector debugfs node for DSC support/enable

Srivatsa, Anusha (1):
  drm/dsc: Define Rate Control values that do not change over
    configurations

 Documentation/gpu/drm-kms-helpers.rst   |   12 +
 drivers/gpu/drm/Makefile                |    2 +-
 drivers/gpu/drm/drm_dp_helper.c         |   29 +-
 drivers/gpu/drm/drm_dsc.c               |  228 +++++
 drivers/gpu/drm/i915/Makefile           |    3 +-
 drivers/gpu/drm/i915/i915_debugfs.c     |   77 ++
 drivers/gpu/drm/i915/i915_drv.h         |    4 +
 drivers/gpu/drm/i915/i915_reg.h         |    3 +
 drivers/gpu/drm/i915/intel_ddi.c        |   79 +-
 drivers/gpu/drm/i915/intel_display.c    |   23 +-
 drivers/gpu/drm/i915/intel_display.h    |    4 +-
 drivers/gpu/drm/i915/intel_dp.c         |  230 ++++-
 drivers/gpu/drm/i915/intel_dp_mst.c     |    2 +-
 drivers/gpu/drm/i915/intel_drv.h        |   24 +
 drivers/gpu/drm/i915/intel_hdmi.c       |   21 +-
 drivers/gpu/drm/i915/intel_psr.c        |   14 +
 drivers/gpu/drm/i915/intel_runtime_pm.c |    4 +-
 drivers/gpu/drm/i915/intel_vdsc.c       | 1097 +++++++++++++++++++++++
 include/drm/drm_dp_helper.h             |   12 +-
 include/drm/drm_dsc.h                   |  485 ++++++++++
 20 files changed, 2301 insertions(+), 52 deletions(-)
 create mode 100644 drivers/gpu/drm/drm_dsc.c
 create mode 100644 drivers/gpu/drm/i915/intel_vdsc.c
 create mode 100644 include/drm/drm_dsc.h

-- 
2.19.1

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