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From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 3/3] drm/i915: Assert the csb tail is within bounds
Date: Tue, 27 Nov 2018 19:38:45 +0200	[thread overview]
Message-ID: <20181127173845.17403-3-mika.kuoppala@linux.intel.com> (raw)
In-Reply-To: <20181127173845.17403-1-mika.kuoppala@linux.intel.com>

Make sure that the tail we get from hardware fits
within the bounds dictated by our count of csb entries.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 107244ab09ef..1a34e91c1305 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -888,6 +888,7 @@ static void process_csb(struct intel_engine_cs *engine)
 	 */
 	head = execlists->csb_head;
 	tail = READ_ONCE(*execlists->csb_write);
+	GEM_DEBUG_BUG_ON(tail >= execlists->csb_entries);
 	GEM_TRACE("%s cs-irq head=%d, tail=%d\n", engine->name, head, tail);
 	if (unlikely(head == tail))
 		return;
-- 
2.17.1

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  parent reply	other threads:[~2018-11-27 17:39 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-27 17:38 [PATCH 1/3] drm/i915: Prepare for larger CSB status FIFO size Mika Kuoppala
2018-11-27 17:38 ` [PATCH 2/3] drm/i915/icl: Switch to using 12 deep CSB status FIFO Mika Kuoppala
2018-11-27 17:38 ` Mika Kuoppala [this message]
2018-11-27 17:48   ` [PATCH 3/3] drm/i915: Assert the csb tail is within bounds Chris Wilson
2018-11-27 17:46 ` [PATCH 1/3] drm/i915: Prepare for larger CSB status FIFO size Chris Wilson
2018-11-27 18:43 ` ✓ Fi.CI.BAT: success for series starting with [1/3] " Patchwork
2018-11-27 19:00 ` [PATCH 1/3] " Daniele Ceraolo Spurio
2018-11-28  1:16 ` ✓ Fi.CI.IGT: success for series starting with [1/3] " Patchwork

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