All of lore.kernel.org
 help / color / mirror / Atom feed
From: Rob Herring <robh@kernel.org>
To: Andrew Murray <andrew.murray@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	bcm-kernel-feedback-list@broadcom.com,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Heiko Stuebner <heiko@sntech.de>,
	Hou Zhiqiang <Zhiqiang.Hou@nxp.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>,
	Ley Foon Tan <lftan@altera.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	linux-mediatek@lists.infradead.org,
	linux-renesas-soc@vger.kernel.org,
	linux-rockchip@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Michal Simek <michal.simek@xilinx.com>,
	Ray Jui <rjui@broadcom.com>,
	rfi@lists.rocketboards.org, Ryder Lee <ryder.lee@mediatek.com>,
	Scott Branden <sbranden@broadcom.com>,
	Shawn Lin <shawn.lin@rock-chips.com>,
	Simon Horman <horms@verge.net.au>,
	Srinath Mannam <srinath.mannam@broadcom.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Toan Le <toan@os.amperecomputing.com>,
	Tom Joseph <tjoseph@cadence.com>, Will Deacon <will@kernel.org>
Subject: [PATCH v2 11/25] PCI: rockchip: Drop storing driver private outbound resource data
Date: Wed, 16 Oct 2019 15:06:33 -0500	[thread overview]
Message-ID: <20191016200647.32050-12-robh@kernel.org> (raw)
In-Reply-To: <20191016200647.32050-1-robh@kernel.org>

The Rockchip host bridge driver doesn't need to store outboard resources
in its private struct as they are already stored in struct
pci_host_bridge.

Cc: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Andrew Murray <andrew.murray@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
---
v2:
- New patch

 drivers/pci/controller/pcie-rockchip-host.c | 54 +++++++++------------
 drivers/pci/controller/pcie-rockchip.h      |  5 --
 2 files changed, 23 insertions(+), 36 deletions(-)

diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
index 8d2e6f2e141e..2255ff53e2fb 100644
--- a/drivers/pci/controller/pcie-rockchip-host.c
+++ b/drivers/pci/controller/pcie-rockchip-host.c
@@ -806,19 +806,28 @@ static int rockchip_pcie_prog_ib_atu(struct rockchip_pcie *rockchip,
 static int rockchip_pcie_cfg_atu(struct rockchip_pcie *rockchip)
 {
 	struct device *dev = rockchip->dev;
+	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(rockchip);
+	struct resource_entry *entry;
+	u64 pci_addr, size;
 	int offset;
 	int err;
 	int reg_no;

 	rockchip_pcie_cfg_configuration_accesses(rockchip,
 						 AXI_WRAPPER_TYPE0_CFG);
+	entry = resource_list_get_entry_of_type(&bridge->windows, IORESOURCE_MEM);
+	if (!entry)
+		return -ENODEV;
+
+	size = resource_size(entry->res);
+	pci_addr = entry->res->start - entry->offset;
+	rockchip->msg_bus_addr = pci_addr;

-	for (reg_no = 0; reg_no < (rockchip->mem_size >> 20); reg_no++) {
+	for (reg_no = 0; reg_no < (size >> 20); reg_no++) {
 		err = rockchip_pcie_prog_ob_atu(rockchip, reg_no + 1,
 						AXI_WRAPPER_MEM_WRITE,
 						20 - 1,
-						rockchip->mem_bus_addr +
-						(reg_no << 20),
+						pci_addr + (reg_no << 20),
 						0);
 		if (err) {
 			dev_err(dev, "program RC mem outbound ATU failed\n");
@@ -832,14 +841,20 @@ static int rockchip_pcie_cfg_atu(struct rockchip_pcie *rockchip)
 		return err;
 	}

-	offset = rockchip->mem_size >> 20;
-	for (reg_no = 0; reg_no < (rockchip->io_size >> 20); reg_no++) {
+	entry = resource_list_get_entry_of_type(&bridge->windows, IORESOURCE_IO);
+	if (!entry)
+		return -ENODEV;
+
+	size = resource_size(entry->res);
+	pci_addr = entry->res->start - entry->offset;
+
+	offset = size >> 20;
+	for (reg_no = 0; reg_no < (size >> 20); reg_no++) {
 		err = rockchip_pcie_prog_ob_atu(rockchip,
 						reg_no + 1 + offset,
 						AXI_WRAPPER_IO_WRITE,
 						20 - 1,
-						rockchip->io_bus_addr +
-						(reg_no << 20),
+						pci_addr + (reg_no << 20),
 						0);
 		if (err) {
 			dev_err(dev, "program RC io outbound ATU failed\n");
@@ -852,8 +867,7 @@ static int rockchip_pcie_cfg_atu(struct rockchip_pcie *rockchip)
 				  AXI_WRAPPER_NOR_MSG,
 				  20 - 1, 0, 0);

-	rockchip->msg_bus_addr = rockchip->mem_bus_addr +
-					((reg_no + offset) << 20);
+	rockchip->msg_bus_addr += ((reg_no + offset) << 20);
 	return err;
 }

@@ -951,7 +965,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
 	struct pci_bus *bus, *child;
 	struct pci_host_bridge *bridge;
 	struct resource *bus_res;
-	struct resource_entry *win;
 	int err;

 	if (!dev->of_node)
@@ -997,27 +1010,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev)

 	rockchip->root_bus_nr = bus_res->start;

-	/* Get the I/O and memory ranges from DT */
-	resource_list_for_each_entry(win, &bridge->windows) {
-		switch (resource_type(win->res)) {
-		case IORESOURCE_IO:
-			io = win->res;
-			io->name = "I/O";
-			rockchip->io_size = resource_size(io);
-			rockchip->io_bus_addr = io->start - win->offset;
-			rockchip->io = io;
-			break;
-		case IORESOURCE_MEM:
-			mem = win->res;
-			mem->name = "MEM";
-			rockchip->mem_size = resource_size(mem);
-			rockchip->mem_bus_addr = mem->start - win->offset;
-			break;
-		default:
-			continue;
-		}
-	}
-
 	err = rockchip_pcie_cfg_atu(rockchip);
 	if (err)
 		goto err_remove_irq_domain;
diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
index 8e87a059ce73..bef42a803b56 100644
--- a/drivers/pci/controller/pcie-rockchip.h
+++ b/drivers/pci/controller/pcie-rockchip.h
@@ -304,13 +304,8 @@ struct rockchip_pcie {
 	struct	irq_domain *irq_domain;
 	int     offset;
 	struct pci_bus *root_bus;
-	struct resource *io;
-	phys_addr_t io_bus_addr;
-	u32     io_size;
 	void    __iomem *msg_region;
-	u32     mem_size;
 	phys_addr_t msg_bus_addr;
-	phys_addr_t mem_bus_addr;
 	bool is_rc;
 	struct resource *mem_res;
 };
--
2.20.1

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Andrew Murray <andrew.murray@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>,
	linux-pci@vger.kernel.org, Shawn Lin <shawn.lin@rock-chips.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Toan Le <toan@os.amperecomputing.com>,
	Will Deacon <will@kernel.org>, Ryder Lee <ryder.lee@mediatek.com>,
	Michal Simek <michal.simek@xilinx.com>,
	linux-rockchip@lists.infradead.org,
	bcm-kernel-feedback-list@broadcom.com,
	Linus Walleij <linus.walleij@linaro.org>,
	Ray Jui <rjui@broadcom.com>, Hou Zhiqiang <Zhiqiang.Hou@nxp.com>,
	Simon Horman <horms@verge.net.au>,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	Scott Branden <sbranden@broadcom.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	rfi@lists.rocketboards.org, linux-renesas-soc@vger.kernel.org,
	Tom Joseph <tjoseph@cadence.com>,
	Srinath Mannam <srinath.mannam@b>
Subject: [PATCH v2 11/25] PCI: rockchip: Drop storing driver private outbound resource data
Date: Wed, 16 Oct 2019 15:06:33 -0500	[thread overview]
Message-ID: <20191016200647.32050-12-robh@kernel.org> (raw)
In-Reply-To: <20191016200647.32050-1-robh@kernel.org>

The Rockchip host bridge driver doesn't need to store outboard resources
in its private struct as they are already stored in struct
pci_host_bridge.

Cc: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Andrew Murray <andrew.murray@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
---
v2:
- New patch

 drivers/pci/controller/pcie-rockchip-host.c | 54 +++++++++------------
 drivers/pci/controller/pcie-rockchip.h      |  5 --
 2 files changed, 23 insertions(+), 36 deletions(-)

diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
index 8d2e6f2e141e..2255ff53e2fb 100644
--- a/drivers/pci/controller/pcie-rockchip-host.c
+++ b/drivers/pci/controller/pcie-rockchip-host.c
@@ -806,19 +806,28 @@ static int rockchip_pcie_prog_ib_atu(struct rockchip_pcie *rockchip,
 static int rockchip_pcie_cfg_atu(struct rockchip_pcie *rockchip)
 {
 	struct device *dev = rockchip->dev;
+	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(rockchip);
+	struct resource_entry *entry;
+	u64 pci_addr, size;
 	int offset;
 	int err;
 	int reg_no;

 	rockchip_pcie_cfg_configuration_accesses(rockchip,
 						 AXI_WRAPPER_TYPE0_CFG);
+	entry = resource_list_get_entry_of_type(&bridge->windows, IORESOURCE_MEM);
+	if (!entry)
+		return -ENODEV;
+
+	size = resource_size(entry->res);
+	pci_addr = entry->res->start - entry->offset;
+	rockchip->msg_bus_addr = pci_addr;

-	for (reg_no = 0; reg_no < (rockchip->mem_size >> 20); reg_no++) {
+	for (reg_no = 0; reg_no < (size >> 20); reg_no++) {
 		err = rockchip_pcie_prog_ob_atu(rockchip, reg_no + 1,
 						AXI_WRAPPER_MEM_WRITE,
 						20 - 1,
-						rockchip->mem_bus_addr +
-						(reg_no << 20),
+						pci_addr + (reg_no << 20),
 						0);
 		if (err) {
 			dev_err(dev, "program RC mem outbound ATU failed\n");
@@ -832,14 +841,20 @@ static int rockchip_pcie_cfg_atu(struct rockchip_pcie *rockchip)
 		return err;
 	}

-	offset = rockchip->mem_size >> 20;
-	for (reg_no = 0; reg_no < (rockchip->io_size >> 20); reg_no++) {
+	entry = resource_list_get_entry_of_type(&bridge->windows, IORESOURCE_IO);
+	if (!entry)
+		return -ENODEV;
+
+	size = resource_size(entry->res);
+	pci_addr = entry->res->start - entry->offset;
+
+	offset = size >> 20;
+	for (reg_no = 0; reg_no < (size >> 20); reg_no++) {
 		err = rockchip_pcie_prog_ob_atu(rockchip,
 						reg_no + 1 + offset,
 						AXI_WRAPPER_IO_WRITE,
 						20 - 1,
-						rockchip->io_bus_addr +
-						(reg_no << 20),
+						pci_addr + (reg_no << 20),
 						0);
 		if (err) {
 			dev_err(dev, "program RC io outbound ATU failed\n");
@@ -852,8 +867,7 @@ static int rockchip_pcie_cfg_atu(struct rockchip_pcie *rockchip)
 				  AXI_WRAPPER_NOR_MSG,
 				  20 - 1, 0, 0);

-	rockchip->msg_bus_addr = rockchip->mem_bus_addr +
-					((reg_no + offset) << 20);
+	rockchip->msg_bus_addr += ((reg_no + offset) << 20);
 	return err;
 }

@@ -951,7 +965,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
 	struct pci_bus *bus, *child;
 	struct pci_host_bridge *bridge;
 	struct resource *bus_res;
-	struct resource_entry *win;
 	int err;

 	if (!dev->of_node)
@@ -997,27 +1010,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev)

 	rockchip->root_bus_nr = bus_res->start;

-	/* Get the I/O and memory ranges from DT */
-	resource_list_for_each_entry(win, &bridge->windows) {
-		switch (resource_type(win->res)) {
-		case IORESOURCE_IO:
-			io = win->res;
-			io->name = "I/O";
-			rockchip->io_size = resource_size(io);
-			rockchip->io_bus_addr = io->start - win->offset;
-			rockchip->io = io;
-			break;
-		case IORESOURCE_MEM:
-			mem = win->res;
-			mem->name = "MEM";
-			rockchip->mem_size = resource_size(mem);
-			rockchip->mem_bus_addr = mem->start - win->offset;
-			break;
-		default:
-			continue;
-		}
-	}
-
 	err = rockchip_pcie_cfg_atu(rockchip);
 	if (err)
 		goto err_remove_irq_domain;
diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
index 8e87a059ce73..bef42a803b56 100644
--- a/drivers/pci/controller/pcie-rockchip.h
+++ b/drivers/pci/controller/pcie-rockchip.h
@@ -304,13 +304,8 @@ struct rockchip_pcie {
 	struct	irq_domain *irq_domain;
 	int     offset;
 	struct pci_bus *root_bus;
-	struct resource *io;
-	phys_addr_t io_bus_addr;
-	u32     io_size;
 	void    __iomem *msg_region;
-	u32     mem_size;
 	phys_addr_t msg_bus_addr;
-	phys_addr_t mem_bus_addr;
 	bool is_rc;
 	struct resource *mem_res;
 };
--
2.20.1

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Andrew Murray <andrew.murray@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>,
	linux-pci@vger.kernel.org, Shawn Lin <shawn.lin@rock-chips.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Toan Le <toan@os.amperecomputing.com>,
	Will Deacon <will@kernel.org>, Ryder Lee <ryder.lee@mediatek.com>,
	Michal Simek <michal.simek@xilinx.com>,
	linux-rockchip@lists.infradead.org,
	bcm-kernel-feedback-list@broadcom.com,
	Linus Walleij <linus.walleij@linaro.org>,
	Ray Jui <rjui@broadcom.com>, Hou Zhiqiang <Zhiqiang.Hou@nxp.com>,
	Simon Horman <horms@verge.net.au>,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	Scott Branden <sbranden@broadcom.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	rfi@lists.rocketboards.org, linux-renesas-soc@vger.kernel.org,
	Tom Joseph <tjoseph@cadence.com>,
	Srinath Mannam <srinath.mannam@broadcom.com>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Ley Foon Tan <lftan@altera.com>
Subject: [PATCH v2 11/25] PCI: rockchip: Drop storing driver private outbound resource data
Date: Wed, 16 Oct 2019 15:06:33 -0500	[thread overview]
Message-ID: <20191016200647.32050-12-robh@kernel.org> (raw)
In-Reply-To: <20191016200647.32050-1-robh@kernel.org>

The Rockchip host bridge driver doesn't need to store outboard resources
in its private struct as they are already stored in struct
pci_host_bridge.

Cc: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Andrew Murray <andrew.murray@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
---
v2:
- New patch

 drivers/pci/controller/pcie-rockchip-host.c | 54 +++++++++------------
 drivers/pci/controller/pcie-rockchip.h      |  5 --
 2 files changed, 23 insertions(+), 36 deletions(-)

diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
index 8d2e6f2e141e..2255ff53e2fb 100644
--- a/drivers/pci/controller/pcie-rockchip-host.c
+++ b/drivers/pci/controller/pcie-rockchip-host.c
@@ -806,19 +806,28 @@ static int rockchip_pcie_prog_ib_atu(struct rockchip_pcie *rockchip,
 static int rockchip_pcie_cfg_atu(struct rockchip_pcie *rockchip)
 {
 	struct device *dev = rockchip->dev;
+	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(rockchip);
+	struct resource_entry *entry;
+	u64 pci_addr, size;
 	int offset;
 	int err;
 	int reg_no;

 	rockchip_pcie_cfg_configuration_accesses(rockchip,
 						 AXI_WRAPPER_TYPE0_CFG);
+	entry = resource_list_get_entry_of_type(&bridge->windows, IORESOURCE_MEM);
+	if (!entry)
+		return -ENODEV;
+
+	size = resource_size(entry->res);
+	pci_addr = entry->res->start - entry->offset;
+	rockchip->msg_bus_addr = pci_addr;

-	for (reg_no = 0; reg_no < (rockchip->mem_size >> 20); reg_no++) {
+	for (reg_no = 0; reg_no < (size >> 20); reg_no++) {
 		err = rockchip_pcie_prog_ob_atu(rockchip, reg_no + 1,
 						AXI_WRAPPER_MEM_WRITE,
 						20 - 1,
-						rockchip->mem_bus_addr +
-						(reg_no << 20),
+						pci_addr + (reg_no << 20),
 						0);
 		if (err) {
 			dev_err(dev, "program RC mem outbound ATU failed\n");
@@ -832,14 +841,20 @@ static int rockchip_pcie_cfg_atu(struct rockchip_pcie *rockchip)
 		return err;
 	}

-	offset = rockchip->mem_size >> 20;
-	for (reg_no = 0; reg_no < (rockchip->io_size >> 20); reg_no++) {
+	entry = resource_list_get_entry_of_type(&bridge->windows, IORESOURCE_IO);
+	if (!entry)
+		return -ENODEV;
+
+	size = resource_size(entry->res);
+	pci_addr = entry->res->start - entry->offset;
+
+	offset = size >> 20;
+	for (reg_no = 0; reg_no < (size >> 20); reg_no++) {
 		err = rockchip_pcie_prog_ob_atu(rockchip,
 						reg_no + 1 + offset,
 						AXI_WRAPPER_IO_WRITE,
 						20 - 1,
-						rockchip->io_bus_addr +
-						(reg_no << 20),
+						pci_addr + (reg_no << 20),
 						0);
 		if (err) {
 			dev_err(dev, "program RC io outbound ATU failed\n");
@@ -852,8 +867,7 @@ static int rockchip_pcie_cfg_atu(struct rockchip_pcie *rockchip)
 				  AXI_WRAPPER_NOR_MSG,
 				  20 - 1, 0, 0);

-	rockchip->msg_bus_addr = rockchip->mem_bus_addr +
-					((reg_no + offset) << 20);
+	rockchip->msg_bus_addr += ((reg_no + offset) << 20);
 	return err;
 }

@@ -951,7 +965,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
 	struct pci_bus *bus, *child;
 	struct pci_host_bridge *bridge;
 	struct resource *bus_res;
-	struct resource_entry *win;
 	int err;

 	if (!dev->of_node)
@@ -997,27 +1010,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev)

 	rockchip->root_bus_nr = bus_res->start;

-	/* Get the I/O and memory ranges from DT */
-	resource_list_for_each_entry(win, &bridge->windows) {
-		switch (resource_type(win->res)) {
-		case IORESOURCE_IO:
-			io = win->res;
-			io->name = "I/O";
-			rockchip->io_size = resource_size(io);
-			rockchip->io_bus_addr = io->start - win->offset;
-			rockchip->io = io;
-			break;
-		case IORESOURCE_MEM:
-			mem = win->res;
-			mem->name = "MEM";
-			rockchip->mem_size = resource_size(mem);
-			rockchip->mem_bus_addr = mem->start - win->offset;
-			break;
-		default:
-			continue;
-		}
-	}
-
 	err = rockchip_pcie_cfg_atu(rockchip);
 	if (err)
 		goto err_remove_irq_domain;
diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
index 8e87a059ce73..bef42a803b56 100644
--- a/drivers/pci/controller/pcie-rockchip.h
+++ b/drivers/pci/controller/pcie-rockchip.h
@@ -304,13 +304,8 @@ struct rockchip_pcie {
 	struct	irq_domain *irq_domain;
 	int     offset;
 	struct pci_bus *root_bus;
-	struct resource *io;
-	phys_addr_t io_bus_addr;
-	u32     io_size;
 	void    __iomem *msg_region;
-	u32     mem_size;
 	phys_addr_t msg_bus_addr;
-	phys_addr_t mem_bus_addr;
 	bool is_rc;
 	struct resource *mem_res;
 };
--
2.20.1

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-10-16 20:07 UTC|newest]

Thread overview: 148+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-16 20:06 [PATCH v2 00/25] PCI host resource consolidation Rob Herring
2019-10-16 20:06 ` Rob Herring
2019-10-16 20:06 ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 01/25] resource: Add a resource_list_get_entry_of_type helper Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-17  7:25   ` Christoph Hellwig
2019-10-17  7:25     ` Christoph Hellwig
2019-10-17  7:25     ` Christoph Hellwig
2019-10-18 12:14     ` Andrew Murray
2019-10-18 12:14       ` Andrew Murray
2019-10-18 12:14       ` Andrew Murray
2019-10-18 12:14       ` Andrew Murray
2019-10-16 20:06 ` [PATCH v2 02/25] PCI: Export pci_parse_request_of_pci_ranges() Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-18 12:06   ` Andrew Murray
2019-10-18 12:06     ` Andrew Murray
2019-10-18 12:06     ` Andrew Murray
2019-10-18 12:06     ` Andrew Murray
2019-10-16 20:06 ` [PATCH v2 03/25] PCI: aardvark: Use pci_parse_request_of_pci_ranges() Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 04/25] PCI: altera: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-18 12:09   ` Andrew Murray
2019-10-18 12:09     ` Andrew Murray
2019-10-18 12:09     ` Andrew Murray
2019-10-18 12:09     ` Andrew Murray
2019-10-16 20:06 ` [PATCH v2 05/25] PCI: dwc: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-18 12:35   ` Andrew Murray
2019-10-18 12:35     ` Andrew Murray
2019-10-18 12:35     ` Andrew Murray
2019-10-18 12:35     ` Andrew Murray
2019-10-20 21:39     ` Rob Herring
2019-10-20 21:39       ` Rob Herring
2019-10-20 21:39       ` Rob Herring
2019-10-20 21:39       ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 06/25] PCI: faraday: Use pci_parse_request_of_pci_ranges Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-18 12:57   ` Andrew Murray
2019-10-18 12:57     ` Andrew Murray
2019-10-18 12:57     ` Andrew Murray
2019-10-18 12:57     ` Andrew Murray
2019-10-16 20:06 ` [PATCH v2 07/25] PCI: iproc: Use pci_parse_request_of_pci_ranges() Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-18 13:00   ` Andrew Murray
2019-10-18 13:00     ` Andrew Murray
2019-10-18 13:00     ` Andrew Murray
2019-10-18 13:00     ` Andrew Murray
2019-10-16 20:06 ` [PATCH v2 08/25] PCI: mediatek: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 09/25] PCI: mobiveil: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-18 15:41   ` Andrew Murray
2019-10-18 15:41     ` Andrew Murray
2019-10-18 15:41     ` Andrew Murray
2019-10-18 15:41     ` Andrew Murray
2019-10-16 20:06 ` [PATCH v2 10/25] PCI: rockchip: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-18 15:51   ` Andrew Murray
2019-10-18 15:51     ` Andrew Murray
2019-10-18 15:51     ` Andrew Murray
2019-10-18 15:51     ` Andrew Murray
2019-10-20 21:36     ` Rob Herring
2019-10-20 21:36       ` Rob Herring
2019-10-20 21:36       ` Rob Herring
2019-10-20 21:36       ` Rob Herring
2019-10-16 20:06 ` Rob Herring [this message]
2019-10-16 20:06   ` [PATCH v2 11/25] PCI: rockchip: Drop storing driver private outbound resource data Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-17  7:26   ` Christoph Hellwig
2019-10-17  7:26     ` Christoph Hellwig
2019-10-17  7:26     ` Christoph Hellwig
2019-10-17 12:24     ` Rob Herring
2019-10-17 12:24       ` Rob Herring
2019-10-17 12:24       ` Rob Herring
2019-10-17 12:24       ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 12/25] PCI: v3-semi: Use pci_parse_request_of_pci_ranges() Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-21  0:38   ` Linus Walleij
2019-10-21  0:38     ` Linus Walleij
2019-10-21  0:38     ` Linus Walleij
2019-10-21  0:38     ` Linus Walleij
2019-10-16 20:06 ` [PATCH v2 13/25] PCI: xgene: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 14/25] PCI: xilinx: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 15/25] PCI: xilinx-nwl: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 16/25] PCI: versatile: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-21  0:39   ` Linus Walleij
2019-10-21  0:39     ` Linus Walleij
2019-10-21  0:39     ` Linus Walleij
2019-10-21  0:39     ` Linus Walleij
2019-10-16 20:06 ` [PATCH v2 17/25] PCI: versatile: Remove usage of PHYS_OFFSET Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-21  0:40   ` Linus Walleij
2019-10-21  0:40     ` Linus Walleij
2019-10-21  0:40     ` Linus Walleij
2019-10-21  0:40     ` Linus Walleij
2019-10-16 20:06 ` [PATCH v2 18/25] PCI: versatile: Enable COMPILE_TEST Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-21  0:41   ` Linus Walleij
2019-10-21  0:41     ` Linus Walleij
2019-10-21  0:41     ` Linus Walleij
2019-10-21  0:41     ` Linus Walleij
2019-10-16 20:06 ` [PATCH v2 19/25] PCI: of: Add inbound resource parsing to helpers Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 20/25] PCI: ftpci100: Use inbound resources for setup Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-21  0:41   ` Linus Walleij
2019-10-21  0:41     ` Linus Walleij
2019-10-21  0:41     ` Linus Walleij
2019-10-21  0:41     ` Linus Walleij
2019-10-16 20:06 ` [PATCH v2 21/25] PCI: v3-semi: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 22/25] PCI: xgene: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 23/25] PCI: iproc: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 24/25] PCI: rcar: " Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06 ` [PATCH v2 25/25] PCI: Make devm_of_pci_get_host_bridge_resources() static Rob Herring
2019-10-16 20:06   ` Rob Herring
2019-10-16 20:06   ` Rob Herring

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20191016200647.32050-12-robh@kernel.org \
    --to=robh@kernel.org \
    --cc=Zhiqiang.Hou@nxp.com \
    --cc=andrew.murray@arm.com \
    --cc=bcm-kernel-feedback-list@broadcom.com \
    --cc=bhelgaas@google.com \
    --cc=gustavo.pimentel@synopsys.com \
    --cc=heiko@sntech.de \
    --cc=horms@verge.net.au \
    --cc=jingoohan1@gmail.com \
    --cc=lftan@altera.com \
    --cc=linus.walleij@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-renesas-soc@vger.kernel.org \
    --cc=linux-rockchip@lists.infradead.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=m.karthikeyan@mobiveil.co.in \
    --cc=matthias.bgg@gmail.com \
    --cc=michal.simek@xilinx.com \
    --cc=rfi@lists.rocketboards.org \
    --cc=rjui@broadcom.com \
    --cc=ryder.lee@mediatek.com \
    --cc=sbranden@broadcom.com \
    --cc=shawn.lin@rock-chips.com \
    --cc=srinath.mannam@broadcom.com \
    --cc=thomas.petazzoni@bootlin.com \
    --cc=tjoseph@cadence.com \
    --cc=toan@os.amperecomputing.com \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.