From: Lars Povlsen <lars.povlsen@microchip.com> To: SoC Team <soc@kernel.org>, Arnd Bergmann <arnd@arndb.de>, Stephen Boyd <sboyd@kernel.org>, Linus Walleij <linus.walleij@linaro.org>, Rob Herring <robh+dt@kernel.org> Cc: Lars Povlsen <lars.povlsen@microchip.com>, Steen Hegelund <Steen.Hegelund@microchip.com>, Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>, Olof Johansson <olof@lixom.net>, "Michael Turquette" <mturquette@baylibre.com>, <devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-gpio@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, Alexandre Belloni <alexandre.belloni@bootlin.com> Subject: [PATCH 10/14] dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL clock Date: Wed, 13 May 2020 14:55:28 +0200 [thread overview] Message-ID: <20200513125532.24585-11-lars.povlsen@microchip.com> (raw) In-Reply-To: <20200513125532.24585-1-lars.povlsen@microchip.com> This add the DT bindings documentation for the Sparx5 SoC DPLL clock Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> --- .../bindings/clock/microchip,sparx5-dpll.yaml | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml diff --git a/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml b/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml new file mode 100644 index 0000000000000..594007d8fc59a --- /dev/null +++ b/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/microchip,sparx5-dpll.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip Sparx5 DPLL Clock + +maintainers: + - Lars Povlsen <lars.povlsen@microchip.com> + +description: | + The Sparx5 DPLL clock controller generates and supplies clock to + various peripherals within the SoC. + + This binding uses common clock bindings + [1] Documentation/devicetree/bindings/clock/clock-bindings.txt + +properties: + compatible: + const: microchip,sparx5-dpll + + reg: + items: + - description: dpll registers + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + # Clock provider for eMMC: + - | + clks: clks@61110000c { + compatible = "microchip,sparx5-dpll"; + #clock-cells = <1>; + reg = <0x1110000c 0x24>; + }; + +... -- 2.26.2
WARNING: multiple messages have this Message-ID (diff)
From: Lars Povlsen <lars.povlsen@microchip.com> To: SoC Team <soc@kernel.org>, Arnd Bergmann <arnd@arndb.de>, Stephen Boyd <sboyd@kernel.org>, Linus Walleij <linus.walleij@linaro.org>, Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org, Alexandre Belloni <alexandre.belloni@bootlin.com>, Steen Hegelund <Steen.Hegelund@microchip.com>, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Olof Johansson <olof@lixom.net>, Michael Turquette <mturquette@baylibre.com>, Lars Povlsen <lars.povlsen@microchip.com> Subject: [PATCH 10/14] dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL clock Date: Wed, 13 May 2020 14:55:28 +0200 [thread overview] Message-ID: <20200513125532.24585-11-lars.povlsen@microchip.com> (raw) In-Reply-To: <20200513125532.24585-1-lars.povlsen@microchip.com> This add the DT bindings documentation for the Sparx5 SoC DPLL clock Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> --- .../bindings/clock/microchip,sparx5-dpll.yaml | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml diff --git a/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml b/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml new file mode 100644 index 0000000000000..594007d8fc59a --- /dev/null +++ b/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/microchip,sparx5-dpll.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip Sparx5 DPLL Clock + +maintainers: + - Lars Povlsen <lars.povlsen@microchip.com> + +description: | + The Sparx5 DPLL clock controller generates and supplies clock to + various peripherals within the SoC. + + This binding uses common clock bindings + [1] Documentation/devicetree/bindings/clock/clock-bindings.txt + +properties: + compatible: + const: microchip,sparx5-dpll + + reg: + items: + - description: dpll registers + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + # Clock provider for eMMC: + - | + clks: clks@61110000c { + compatible = "microchip,sparx5-dpll"; + #clock-cells = <1>; + reg = <0x1110000c 0x24>; + }; + +... -- 2.26.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-05-13 12:57 UTC|newest] Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-05-13 12:55 [PATCH 00/14] Adding support for Microchip Sparx5 SoC Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 01/14] pinctrl: ocelot: Should register GPIO's even if not irq controller Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-18 7:29 ` Linus Walleij 2020-05-18 7:29 ` Linus Walleij 2020-05-13 12:55 ` [PATCH 02/14] pinctrl: ocelot: Remove instance number from pin functions Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-18 7:31 ` Linus Walleij 2020-05-18 7:31 ` Linus Walleij 2020-05-13 12:55 ` [PATCH 03/14] pinctrl: ocelot: Fix GPIO interrupt decoding on Jaguar2 Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-18 7:31 ` Linus Walleij 2020-05-18 7:31 ` Linus Walleij 2020-05-13 12:55 ` [PATCH 04/14] arm64: sparx5: Add support for Microchip 2xA53 SoC Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 05/14] dt-bindings: arm: sparx5: Add documentation for Microchip Sparx5 SoC Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-28 2:11 ` Rob Herring 2020-05-28 2:11 ` Rob Herring 2020-06-02 9:10 ` Lars Povlsen 2020-06-02 9:10 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 06/14] arm64: dts: sparx5: Add basic cpu support Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-13 15:39 ` Marc Zyngier 2020-05-13 15:39 ` Marc Zyngier 2020-05-15 15:09 ` Lars Povlsen 2020-05-15 15:09 ` Lars Povlsen 2020-05-15 15:30 ` Robin Murphy 2020-05-15 15:30 ` Robin Murphy 2020-05-18 7:43 ` Lars Povlsen 2020-05-18 7:43 ` Lars Povlsen 2020-05-15 16:31 ` Marc Zyngier 2020-05-13 12:55 ` [PATCH 07/14] dt-bindings: pinctrl: ocelot: Add Sparx5 SoC support Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-18 7:33 ` Linus Walleij 2020-05-18 7:33 ` Linus Walleij 2020-05-13 12:55 ` [PATCH 08/14] arm64: dts: sparx5: Add pinctrl support Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 09/14] pinctrl: ocelot: Add Sparx5 SoC support Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-14 18:09 ` kbuild test robot 2020-05-14 18:09 ` kbuild test robot 2020-05-14 18:09 ` kbuild test robot 2020-05-15 15:52 ` Lars Povlsen 2020-05-15 15:52 ` Lars Povlsen 2020-05-15 15:52 ` Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen [this message] 2020-05-13 12:55 ` [PATCH 10/14] dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL clock Lars Povlsen 2020-05-27 2:46 ` Stephen Boyd 2020-05-29 14:04 ` Lars Povlsen 2020-05-29 14:04 ` Lars Povlsen 2020-05-28 2:18 ` Rob Herring 2020-05-28 2:18 ` Rob Herring 2020-06-02 8:39 ` Lars Povlsen 2020-06-02 8:39 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 11/14] dt-bindings: clock: sparx5: Add bindings include file Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-27 2:56 ` Stephen Boyd 2020-05-13 12:55 ` [PATCH 12/14] clk: sparx5: Add Sparx5 SoC DPLL clock driver Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-27 2:56 ` Stephen Boyd 2020-05-27 14:29 ` Lars Povlsen 2020-05-27 14:29 ` Lars Povlsen 2020-05-27 19:08 ` Stephen Boyd 2020-05-13 12:55 ` [PATCH 13/14] arm64: dts: sparx5: Add Sparx5 SoC DPLL clock Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 14/14] arm64: dts: sparx5: Add i2c devices, i2c muxes Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-21 10:16 ` [PATCH 00/14] Adding support for Microchip Sparx5 SoC Arnd Bergmann 2020-05-21 10:16 ` Arnd Bergmann
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