From: "Philippe Mathieu-Daudé" <f4bug@amsat.org> To: qemu-devel@nongnu.org Cc: "Peter Maydell" <peter.maydell@linaro.org>, "Stefano Stabellini" <sstabellini@kernel.org>, "Eduardo Habkost" <ehabkost@redhat.com>, "Paul Durrant" <paul@xen.org>, "Andrew Jeffery" <andrew@aj.id.au>, "Helge Deller" <deller@gmx.de>, "Michael S. Tsirkin" <mst@redhat.com>, "Joel Stanley" <joel@jms.id.au>, "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-trivial@nongnu.org, qemu-arm@nongnu.org, "Hervé Poussineau" <hpoussin@reactos.org>, "Cédric Le Goater" <clg@kaod.org>, "Paolo Bonzini" <pbonzini@redhat.com>, "Anthony Perard" <anthony.perard@citrix.com>, xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org, "Richard Henderson" <rth@twiddle.net> Subject: [PATCH 4/8] hw/pci/pci_bridge: Use the IEC binary prefix definitions Date: Sun, 31 May 2020 19:38:10 +0200 [thread overview] Message-ID: <20200531173814.8734-5-f4bug@amsat.org> (raw) In-Reply-To: <20200531173814.8734-1-f4bug@amsat.org> IEC binary prefixes ease code review: the unit is explicit. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- hw/pci/pci_bridge.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index 3ba3203f72..3789c17edc 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -423,14 +423,14 @@ int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset, } if (res_reserve.mem_non_pref != (uint64_t)-1 && - res_reserve.mem_non_pref >= (1ULL << 32)) { + res_reserve.mem_non_pref >= 4 * GiB) { error_setg(errp, "PCI resource reserve cap: mem-reserve must be less than 4G"); return -EINVAL; } if (res_reserve.mem_pref_32 != (uint64_t)-1 && - res_reserve.mem_pref_32 >= (1ULL << 32)) { + res_reserve.mem_pref_32 >= 4 * GiB) { error_setg(errp, "PCI resource reserve cap: pref32-reserve must be less than 4G"); return -EINVAL; -- 2.21.3
WARNING: multiple messages have this Message-ID (diff)
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org> To: qemu-devel@nongnu.org Cc: "Peter Maydell" <peter.maydell@linaro.org>, "Stefano Stabellini" <sstabellini@kernel.org>, "Eduardo Habkost" <ehabkost@redhat.com>, "Paul Durrant" <paul@xen.org>, "Andrew Jeffery" <andrew@aj.id.au>, "Helge Deller" <deller@gmx.de>, "Michael S. Tsirkin" <mst@redhat.com>, "Joel Stanley" <joel@jms.id.au>, "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-trivial@nongnu.org, qemu-arm@nongnu.org, "Hervé Poussineau" <hpoussin@reactos.org>, "Cédric Le Goater" <clg@kaod.org>, "Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>, "Paolo Bonzini" <pbonzini@redhat.com>, "Anthony Perard" <anthony.perard@citrix.com>, xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org, "Richard Henderson" <rth@twiddle.net> Subject: [PATCH 4/8] hw/pci/pci_bridge: Use the IEC binary prefix definitions Date: Sun, 31 May 2020 19:38:10 +0200 [thread overview] Message-ID: <20200531173814.8734-5-f4bug@amsat.org> (raw) In-Reply-To: <20200531173814.8734-1-f4bug@amsat.org> IEC binary prefixes ease code review: the unit is explicit. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- hw/pci/pci_bridge.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index 3ba3203f72..3789c17edc 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -423,14 +423,14 @@ int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset, } if (res_reserve.mem_non_pref != (uint64_t)-1 && - res_reserve.mem_non_pref >= (1ULL << 32)) { + res_reserve.mem_non_pref >= 4 * GiB) { error_setg(errp, "PCI resource reserve cap: mem-reserve must be less than 4G"); return -EINVAL; } if (res_reserve.mem_pref_32 != (uint64_t)-1 && - res_reserve.mem_pref_32 >= (1ULL << 32)) { + res_reserve.mem_pref_32 >= 4 * GiB) { error_setg(errp, "PCI resource reserve cap: pref32-reserve must be less than 4G"); return -EINVAL; -- 2.21.3
next prev parent reply other threads:[~2020-05-31 17:43 UTC|newest] Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-05-31 17:38 [PATCH 0/8] hw: Fix some incomplete memory region size Philippe Mathieu-Daudé 2020-05-31 17:38 ` Philippe Mathieu-Daudé 2020-05-31 17:38 ` [PATCH 1/8] hw/arm/aspeed: Correct DRAM container " Philippe Mathieu-Daudé 2020-05-31 17:38 ` Philippe Mathieu-Daudé 2020-05-31 17:38 ` [PATCH 2/8] hw/pci-host/prep: Correct RAVEN bus bridge memory " Philippe Mathieu-Daudé 2020-05-31 17:38 ` Philippe Mathieu-Daudé 2020-05-31 17:38 ` [PATCH 3/8] hw/pci/pci_bridge: Correct pci_bridge_io " Philippe Mathieu-Daudé 2020-05-31 17:38 ` Philippe Mathieu-Daudé 2020-05-31 17:38 ` Philippe Mathieu-Daudé [this message] 2020-05-31 17:38 ` [PATCH 4/8] hw/pci/pci_bridge: Use the IEC binary prefix definitions Philippe Mathieu-Daudé 2020-05-31 17:38 ` [PATCH 5/8] hw/pci-host: " Philippe Mathieu-Daudé 2020-05-31 17:38 ` Philippe Mathieu-Daudé 2020-05-31 17:38 ` [PATCH 6/8] hw/hppa/dino: " Philippe Mathieu-Daudé 2020-05-31 17:38 ` Philippe Mathieu-Daudé 2020-05-31 17:38 ` [PATCH 7/8] hw/i386/xen/xen-hvm: " Philippe Mathieu-Daudé 2020-05-31 17:38 ` Philippe Mathieu-Daudé 2020-06-01 7:26 ` Paul Durrant 2020-06-01 7:26 ` Paul Durrant 2020-06-01 8:33 ` Philippe Mathieu-Daudé 2020-06-01 8:33 ` Philippe Mathieu-Daudé 2020-06-01 11:15 ` Philippe Mathieu-Daudé 2020-05-31 17:38 ` [PATCH 8/8] target/i386/cpu: " Philippe Mathieu-Daudé 2020-05-31 17:38 ` Philippe Mathieu-Daudé 2020-05-31 19:48 ` [PATCH 0/8] hw: Fix some incomplete memory region size Peter Maydell 2020-05-31 19:48 ` Peter Maydell
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