From: Vignesh Raghavendra <vigneshr@ti.com> To: Tudor Ambarus <tudor.ambarus@microchip.com>, Mark Brown <broonie@kernel.org> Cc: Vignesh Raghavendra <vigneshr@ti.com>, Boris Brezillon <bbrezillon@kernel.org>, Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>, <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>, <simon.k.r.goldschmidt@gmail.com>, <dinguyen@kernel.org>, <marex@denx.de> Subject: [RESEND PATCH v3 8/8] spi: Move cadence-quadspi driver to drivers/spi/ Date: Mon, 1 Jun 2020 12:34:44 +0530 [thread overview] Message-ID: <20200601070444.16923-9-vigneshr@ti.com> (raw) In-Reply-To: <20200601070444.16923-1-vigneshr@ti.com> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Now that cadence-quadspi has been converted to use spi-mem framework, move it under drivers/spi/ Update license header to match SPI subsystem style Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> --- drivers/mtd/spi-nor/controllers/Kconfig | 11 ----------- drivers/mtd/spi-nor/controllers/Makefile | 1 - drivers/spi/Kconfig | 11 +++++++++++ drivers/spi/Makefile | 1 + .../spi-cadence-quadspi.c} | 14 +++++++------- 5 files changed, 19 insertions(+), 19 deletions(-) rename drivers/{mtd/spi-nor/controllers/cadence-quadspi.c => spi/spi-cadence-quadspi.c} (99%) diff --git a/drivers/mtd/spi-nor/controllers/Kconfig b/drivers/mtd/spi-nor/controllers/Kconfig index 10b86660b8214..95fcd4b435be5 100644 --- a/drivers/mtd/spi-nor/controllers/Kconfig +++ b/drivers/mtd/spi-nor/controllers/Kconfig @@ -9,17 +9,6 @@ config SPI_ASPEED_SMC and support for the SPI flash memory controller (SPI) for the host firmware. The implementation only supports SPI NOR. -config SPI_CADENCE_QUADSPI - tristate "Cadence Quad SPI controller" - depends on OF && (ARM || ARM64 || COMPILE_TEST) - help - Enable support for the Cadence Quad SPI Flash controller. - - Cadence QSPI is a specialized controller for connecting an SPI - Flash over 1/2/4-bit wide bus. Enable this option if you have a - device with a Cadence QSPI controller and want to access the - Flash as an MTD device. - config SPI_HISI_SFC tristate "Hisilicon FMC SPI-NOR Flash Controller(SFC)" depends on ARCH_HISI || COMPILE_TEST diff --git a/drivers/mtd/spi-nor/controllers/Makefile b/drivers/mtd/spi-nor/controllers/Makefile index 46e6fbe586e34..e7abba491d983 100644 --- a/drivers/mtd/spi-nor/controllers/Makefile +++ b/drivers/mtd/spi-nor/controllers/Makefile @@ -1,6 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_SPI_ASPEED_SMC) += aspeed-smc.o -obj-$(CONFIG_SPI_CADENCE_QUADSPI) += cadence-quadspi.o obj-$(CONFIG_SPI_HISI_SFC) += hisi-sfc.o obj-$(CONFIG_SPI_NXP_SPIFI) += nxp-spifi.o obj-$(CONFIG_SPI_INTEL_SPI) += intel-spi.o diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 741b9140992a8..a4f65d956fa0a 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -200,6 +200,17 @@ config SPI_CADENCE This selects the Cadence SPI controller master driver used by Xilinx Zynq and ZynqMP. +config SPI_CADENCE_QUADSPI + tristate "Cadence Quad SPI controller" + depends on OF && (ARM || ARM64 || COMPILE_TEST) + help + Enable support for the Cadence Quad SPI Flash controller. + + Cadence QSPI is a specialized controller for connecting an SPI + Flash over 1/2/4-bit wide bus. Enable this option if you have a + device with a Cadence QSPI controller and want to access the + Flash as an MTD device. + config SPI_CLPS711X tristate "CLPS711X host SPI controller" depends on ARCH_CLPS711X || COMPILE_TEST diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 28f601327f8c7..c02caeeb99b85 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -31,6 +31,7 @@ obj-$(CONFIG_SPI_BCM_QSPI) += spi-iproc-qspi.o spi-brcmstb-qspi.o spi-bcm-qspi. obj-$(CONFIG_SPI_BITBANG) += spi-bitbang.o obj-$(CONFIG_SPI_BUTTERFLY) += spi-butterfly.o obj-$(CONFIG_SPI_CADENCE) += spi-cadence.o +obj-$(CONFIG_SPI_CADENCE_QUADSPI) += spi-cadence-quadspi.o obj-$(CONFIG_SPI_CLPS711X) += spi-clps711x.o obj-$(CONFIG_SPI_COLDFIRE_QSPI) += spi-coldfire-qspi.o obj-$(CONFIG_SPI_DAVINCI) += spi-davinci.o diff --git a/drivers/mtd/spi-nor/controllers/cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c similarity index 99% rename from drivers/mtd/spi-nor/controllers/cadence-quadspi.c rename to drivers/spi/spi-cadence-quadspi.c index c12a1c0191b92..1c1a9d17eec0d 100644 --- a/drivers/mtd/spi-nor/controllers/cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1,11 +1,11 @@ // SPDX-License-Identifier: GPL-2.0-only -/* - * Driver for Cadence QSPI Controller - * - * Copyright Altera Corporation (C) 2012-2014. All rights reserved. - * Copyright Intel Corporation (C) 2019-2020. All rights reserved. - * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com - */ +// +// Driver for Cadence QSPI Controller +// +// Copyright Altera Corporation (C) 2012-2014. All rights reserved. +// Copyright Intel Corporation (C) 2019-2020. All rights reserved. +// Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com + #include <linux/clk.h> #include <linux/completion.h> #include <linux/delay.h> -- 2.26.2
WARNING: multiple messages have this Message-ID (diff)
From: Vignesh Raghavendra <vigneshr@ti.com> To: Tudor Ambarus <tudor.ambarus@microchip.com>, Mark Brown <broonie@kernel.org> Cc: marex@denx.de, Vignesh Raghavendra <vigneshr@ti.com>, Boris Brezillon <bbrezillon@kernel.org>, dinguyen@kernel.org, simon.k.r.goldschmidt@gmail.com, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>, linux-mtd@lists.infradead.org Subject: [RESEND PATCH v3 8/8] spi: Move cadence-quadspi driver to drivers/spi/ Date: Mon, 1 Jun 2020 12:34:44 +0530 [thread overview] Message-ID: <20200601070444.16923-9-vigneshr@ti.com> (raw) In-Reply-To: <20200601070444.16923-1-vigneshr@ti.com> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Now that cadence-quadspi has been converted to use spi-mem framework, move it under drivers/spi/ Update license header to match SPI subsystem style Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> --- drivers/mtd/spi-nor/controllers/Kconfig | 11 ----------- drivers/mtd/spi-nor/controllers/Makefile | 1 - drivers/spi/Kconfig | 11 +++++++++++ drivers/spi/Makefile | 1 + .../spi-cadence-quadspi.c} | 14 +++++++------- 5 files changed, 19 insertions(+), 19 deletions(-) rename drivers/{mtd/spi-nor/controllers/cadence-quadspi.c => spi/spi-cadence-quadspi.c} (99%) diff --git a/drivers/mtd/spi-nor/controllers/Kconfig b/drivers/mtd/spi-nor/controllers/Kconfig index 10b86660b8214..95fcd4b435be5 100644 --- a/drivers/mtd/spi-nor/controllers/Kconfig +++ b/drivers/mtd/spi-nor/controllers/Kconfig @@ -9,17 +9,6 @@ config SPI_ASPEED_SMC and support for the SPI flash memory controller (SPI) for the host firmware. The implementation only supports SPI NOR. -config SPI_CADENCE_QUADSPI - tristate "Cadence Quad SPI controller" - depends on OF && (ARM || ARM64 || COMPILE_TEST) - help - Enable support for the Cadence Quad SPI Flash controller. - - Cadence QSPI is a specialized controller for connecting an SPI - Flash over 1/2/4-bit wide bus. Enable this option if you have a - device with a Cadence QSPI controller and want to access the - Flash as an MTD device. - config SPI_HISI_SFC tristate "Hisilicon FMC SPI-NOR Flash Controller(SFC)" depends on ARCH_HISI || COMPILE_TEST diff --git a/drivers/mtd/spi-nor/controllers/Makefile b/drivers/mtd/spi-nor/controllers/Makefile index 46e6fbe586e34..e7abba491d983 100644 --- a/drivers/mtd/spi-nor/controllers/Makefile +++ b/drivers/mtd/spi-nor/controllers/Makefile @@ -1,6 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_SPI_ASPEED_SMC) += aspeed-smc.o -obj-$(CONFIG_SPI_CADENCE_QUADSPI) += cadence-quadspi.o obj-$(CONFIG_SPI_HISI_SFC) += hisi-sfc.o obj-$(CONFIG_SPI_NXP_SPIFI) += nxp-spifi.o obj-$(CONFIG_SPI_INTEL_SPI) += intel-spi.o diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 741b9140992a8..a4f65d956fa0a 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -200,6 +200,17 @@ config SPI_CADENCE This selects the Cadence SPI controller master driver used by Xilinx Zynq and ZynqMP. +config SPI_CADENCE_QUADSPI + tristate "Cadence Quad SPI controller" + depends on OF && (ARM || ARM64 || COMPILE_TEST) + help + Enable support for the Cadence Quad SPI Flash controller. + + Cadence QSPI is a specialized controller for connecting an SPI + Flash over 1/2/4-bit wide bus. Enable this option if you have a + device with a Cadence QSPI controller and want to access the + Flash as an MTD device. + config SPI_CLPS711X tristate "CLPS711X host SPI controller" depends on ARCH_CLPS711X || COMPILE_TEST diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 28f601327f8c7..c02caeeb99b85 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -31,6 +31,7 @@ obj-$(CONFIG_SPI_BCM_QSPI) += spi-iproc-qspi.o spi-brcmstb-qspi.o spi-bcm-qspi. obj-$(CONFIG_SPI_BITBANG) += spi-bitbang.o obj-$(CONFIG_SPI_BUTTERFLY) += spi-butterfly.o obj-$(CONFIG_SPI_CADENCE) += spi-cadence.o +obj-$(CONFIG_SPI_CADENCE_QUADSPI) += spi-cadence-quadspi.o obj-$(CONFIG_SPI_CLPS711X) += spi-clps711x.o obj-$(CONFIG_SPI_COLDFIRE_QSPI) += spi-coldfire-qspi.o obj-$(CONFIG_SPI_DAVINCI) += spi-davinci.o diff --git a/drivers/mtd/spi-nor/controllers/cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c similarity index 99% rename from drivers/mtd/spi-nor/controllers/cadence-quadspi.c rename to drivers/spi/spi-cadence-quadspi.c index c12a1c0191b92..1c1a9d17eec0d 100644 --- a/drivers/mtd/spi-nor/controllers/cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1,11 +1,11 @@ // SPDX-License-Identifier: GPL-2.0-only -/* - * Driver for Cadence QSPI Controller - * - * Copyright Altera Corporation (C) 2012-2014. All rights reserved. - * Copyright Intel Corporation (C) 2019-2020. All rights reserved. - * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com - */ +// +// Driver for Cadence QSPI Controller +// +// Copyright Altera Corporation (C) 2012-2014. All rights reserved. +// Copyright Intel Corporation (C) 2019-2020. All rights reserved. +// Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com + #include <linux/clk.h> #include <linux/completion.h> #include <linux/delay.h> -- 2.26.2 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2020-06-01 7:06 UTC|newest] Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-06-01 7:04 [RESEND PATCH v3 0/8] mtd: spi-nor: Move cadence-qaudspi to spi-mem framework Vignesh Raghavendra 2020-06-01 7:04 ` Vignesh Raghavendra 2020-06-01 7:04 ` [RESEND PATCH v3 1/8] mtd: spi-nor: cadence-quadspi: Make driver independent of flash geometry Vignesh Raghavendra 2020-06-01 7:04 ` Vignesh Raghavendra 2020-06-01 7:04 ` [RESEND PATCH v3 2/8] mtd: spi-nor: cadence-quadspi: Provide a way to disable DAC mode Vignesh Raghavendra 2020-06-01 7:04 ` Vignesh Raghavendra 2020-06-01 7:04 ` [RESEND PATCH v3 3/8] mtd: spi-nor: cadence-quadspi: Don't initialize rx_dma_complete on failure Vignesh Raghavendra 2020-06-01 7:04 ` Vignesh Raghavendra 2020-06-01 7:04 ` [RESEND PATCH v3 4/8] mtd: spi-nor: cadence-quadspi: Fix error path on failure to acquire reset lines Vignesh Raghavendra 2020-06-01 7:04 ` Vignesh Raghavendra 2020-06-01 7:04 ` [RESEND PATCH v3 5/8] mtd: spi-nor: cadence-quadspi: Handle probe deferral while requesting DMA channel Vignesh Raghavendra 2020-06-01 7:04 ` Vignesh Raghavendra 2020-08-22 18:05 ` Jan Kiszka 2020-08-22 18:05 ` Jan Kiszka 2020-08-24 11:45 ` Vignesh Raghavendra 2020-08-24 11:45 ` Vignesh Raghavendra 2020-08-24 12:49 ` Jan Kiszka 2020-08-24 12:49 ` Jan Kiszka 2020-08-24 17:20 ` Jan Kiszka 2020-08-24 17:20 ` Jan Kiszka 2020-08-26 10:12 ` Jan Kiszka 2020-08-26 10:12 ` Jan Kiszka 2020-08-26 12:18 ` Vignesh Raghavendra 2020-08-26 12:18 ` Vignesh Raghavendra 2020-08-26 13:31 ` Jan Kiszka 2020-08-26 13:31 ` Jan Kiszka 2020-08-27 7:04 ` Vignesh Raghavendra 2020-08-27 7:04 ` Vignesh Raghavendra 2020-08-25 3:12 ` Jin, Le 2020-08-25 3:12 ` Jin, Le 2020-06-01 7:04 ` [RESEND PATCH v3 6/8] mtd: spi-nor: cadence-quadspi: Drop redundant WREN in erase path Vignesh Raghavendra 2020-06-01 7:04 ` Vignesh Raghavendra 2020-06-01 7:04 ` [RESEND PATCH v3 7/8] mtd: spi-nor: Convert cadence-quadspi to use spi-mem framework Vignesh Raghavendra 2020-06-01 7:04 ` Vignesh Raghavendra 2020-08-24 5:55 ` Jan Kiszka 2020-08-24 5:55 ` Jan Kiszka 2020-08-24 11:44 ` Vignesh Raghavendra 2020-08-24 11:44 ` Vignesh Raghavendra 2020-08-24 12:04 ` Boris Brezillon 2020-08-24 12:04 ` Boris Brezillon 2020-08-24 13:52 ` Jan Kiszka 2020-08-24 13:52 ` Jan Kiszka 2020-08-24 12:06 ` Jan Kiszka 2020-08-24 12:06 ` Jan Kiszka 2020-06-01 7:04 ` Vignesh Raghavendra [this message] 2020-06-01 7:04 ` [RESEND PATCH v3 8/8] spi: Move cadence-quadspi driver to drivers/spi/ Vignesh Raghavendra 2020-06-19 10:57 ` [RESEND PATCH v3 0/8] mtd: spi-nor: Move cadence-qaudspi to spi-mem framework Mark Brown 2020-06-19 10:57 ` Mark Brown 2020-06-19 11:47 ` Tudor.Ambarus 2020-06-19 11:47 ` Tudor.Ambarus 2020-06-19 15:17 ` Mark Brown 2020-06-19 15:17 ` Mark Brown 2020-06-26 9:25 ` Tudor.Ambarus 2020-06-26 9:25 ` Tudor.Ambarus 2020-06-19 13:28 ` Mark Brown 2020-06-19 13:28 ` Mark Brown
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