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From: Hans de Goede <hdegoede@redhat.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Jani Nikula" <jani.nikula@linux.intel.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	"Len Brown" <lenb@kernel.org>
Cc: Hans de Goede <hdegoede@redhat.com>,
	linux-pwm@vger.kernel.org,
	intel-gfx <intel-gfx@lists.freedesktop.org>,
	dri-devel@lists.freedesktop.org,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	linux-acpi@vger.kernel.org
Subject: [PATCH v4 03/16] pwm: lpss: Fix off by one error in base_unit math in pwm_lpss_prepare()
Date: Wed,  8 Jul 2020 23:14:19 +0200	[thread overview]
Message-ID: <20200708211432.28612-4-hdegoede@redhat.com> (raw)
In-Reply-To: <20200708211432.28612-1-hdegoede@redhat.com>

According to the data-sheet the way the PWM controller works is that
each input clock-cycle the base_unit gets added to a N bit counter and
that counter overflowing determines the PWM output frequency.

So assuming e.g. a 16 bit counter this means that if base_unit is set to 1,
after 65535 input clock-cycles the counter has been increased from 0 to
65535 and it will overflow on the next cycle, so it will overflow after
every 65536 clock cycles and thus the calculations done in
pwm_lpss_prepare() should use 65536 and not 65535.

This commit fixes this. Note this also aligns the calculations in
pwm_lpss_prepare() with those in pwm_lpss_get_state().

Note this effectively reverts commit 684309e5043e ("pwm: lpss: Avoid
potential overflow of base_unit"). The next patch in this series really
fixes the potential overflow of the base_unit value.

Fixes: 684309e5043e ("pwm: lpss: Avoid potential overflow of base_unit")
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
Changes in v3:
- Add Fixes tag
- Add Reviewed-by: Andy Shevchenko tag
---
 drivers/pwm/pwm-lpss.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
index 9d965ffe66d1..43b1fc634af1 100644
--- a/drivers/pwm/pwm-lpss.c
+++ b/drivers/pwm/pwm-lpss.c
@@ -93,7 +93,7 @@ static void pwm_lpss_prepare(struct pwm_lpss_chip *lpwm, struct pwm_device *pwm,
 	 * The equation is:
 	 * base_unit = round(base_unit_range * freq / c)
 	 */
-	base_unit_range = BIT(lpwm->info->base_unit_bits) - 1;
+	base_unit_range = BIT(lpwm->info->base_unit_bits);
 	freq *= base_unit_range;
 
 	base_unit = DIV_ROUND_CLOSEST_ULL(freq, c);
@@ -104,8 +104,8 @@ static void pwm_lpss_prepare(struct pwm_lpss_chip *lpwm, struct pwm_device *pwm,
 
 	orig_ctrl = ctrl = pwm_lpss_read(pwm);
 	ctrl &= ~PWM_ON_TIME_DIV_MASK;
-	ctrl &= ~(base_unit_range << PWM_BASE_UNIT_SHIFT);
-	base_unit &= base_unit_range;
+	ctrl &= ~((base_unit_range - 1) << PWM_BASE_UNIT_SHIFT);
+	base_unit &= (base_unit_range - 1);
 	ctrl |= (u32) base_unit << PWM_BASE_UNIT_SHIFT;
 	ctrl |= on_time_div;
 
-- 
2.26.2


WARNING: multiple messages have this Message-ID (diff)
From: Hans de Goede <hdegoede@redhat.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Jani Nikula" <jani.nikula@linux.intel.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	"Len Brown" <lenb@kernel.org>
Cc: linux-pwm@vger.kernel.org, linux-acpi@vger.kernel.org,
	intel-gfx <intel-gfx@lists.freedesktop.org>,
	dri-devel@lists.freedesktop.org,
	Hans de Goede <hdegoede@redhat.com>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>
Subject: [PATCH v4 03/16] pwm: lpss: Fix off by one error in base_unit math in pwm_lpss_prepare()
Date: Wed,  8 Jul 2020 23:14:19 +0200	[thread overview]
Message-ID: <20200708211432.28612-4-hdegoede@redhat.com> (raw)
In-Reply-To: <20200708211432.28612-1-hdegoede@redhat.com>

According to the data-sheet the way the PWM controller works is that
each input clock-cycle the base_unit gets added to a N bit counter and
that counter overflowing determines the PWM output frequency.

So assuming e.g. a 16 bit counter this means that if base_unit is set to 1,
after 65535 input clock-cycles the counter has been increased from 0 to
65535 and it will overflow on the next cycle, so it will overflow after
every 65536 clock cycles and thus the calculations done in
pwm_lpss_prepare() should use 65536 and not 65535.

This commit fixes this. Note this also aligns the calculations in
pwm_lpss_prepare() with those in pwm_lpss_get_state().

Note this effectively reverts commit 684309e5043e ("pwm: lpss: Avoid
potential overflow of base_unit"). The next patch in this series really
fixes the potential overflow of the base_unit value.

Fixes: 684309e5043e ("pwm: lpss: Avoid potential overflow of base_unit")
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
Changes in v3:
- Add Fixes tag
- Add Reviewed-by: Andy Shevchenko tag
---
 drivers/pwm/pwm-lpss.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
index 9d965ffe66d1..43b1fc634af1 100644
--- a/drivers/pwm/pwm-lpss.c
+++ b/drivers/pwm/pwm-lpss.c
@@ -93,7 +93,7 @@ static void pwm_lpss_prepare(struct pwm_lpss_chip *lpwm, struct pwm_device *pwm,
 	 * The equation is:
 	 * base_unit = round(base_unit_range * freq / c)
 	 */
-	base_unit_range = BIT(lpwm->info->base_unit_bits) - 1;
+	base_unit_range = BIT(lpwm->info->base_unit_bits);
 	freq *= base_unit_range;
 
 	base_unit = DIV_ROUND_CLOSEST_ULL(freq, c);
@@ -104,8 +104,8 @@ static void pwm_lpss_prepare(struct pwm_lpss_chip *lpwm, struct pwm_device *pwm,
 
 	orig_ctrl = ctrl = pwm_lpss_read(pwm);
 	ctrl &= ~PWM_ON_TIME_DIV_MASK;
-	ctrl &= ~(base_unit_range << PWM_BASE_UNIT_SHIFT);
-	base_unit &= base_unit_range;
+	ctrl &= ~((base_unit_range - 1) << PWM_BASE_UNIT_SHIFT);
+	base_unit &= (base_unit_range - 1);
 	ctrl |= (u32) base_unit << PWM_BASE_UNIT_SHIFT;
 	ctrl |= on_time_div;
 
-- 
2.26.2

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: Hans de Goede <hdegoede@redhat.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Jani Nikula" <jani.nikula@linux.intel.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	"Len Brown" <lenb@kernel.org>
Cc: linux-pwm@vger.kernel.org, linux-acpi@vger.kernel.org,
	intel-gfx <intel-gfx@lists.freedesktop.org>,
	dri-devel@lists.freedesktop.org,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>
Subject: [Intel-gfx] [PATCH v4 03/16] pwm: lpss: Fix off by one error in base_unit math in pwm_lpss_prepare()
Date: Wed,  8 Jul 2020 23:14:19 +0200	[thread overview]
Message-ID: <20200708211432.28612-4-hdegoede@redhat.com> (raw)
In-Reply-To: <20200708211432.28612-1-hdegoede@redhat.com>

According to the data-sheet the way the PWM controller works is that
each input clock-cycle the base_unit gets added to a N bit counter and
that counter overflowing determines the PWM output frequency.

So assuming e.g. a 16 bit counter this means that if base_unit is set to 1,
after 65535 input clock-cycles the counter has been increased from 0 to
65535 and it will overflow on the next cycle, so it will overflow after
every 65536 clock cycles and thus the calculations done in
pwm_lpss_prepare() should use 65536 and not 65535.

This commit fixes this. Note this also aligns the calculations in
pwm_lpss_prepare() with those in pwm_lpss_get_state().

Note this effectively reverts commit 684309e5043e ("pwm: lpss: Avoid
potential overflow of base_unit"). The next patch in this series really
fixes the potential overflow of the base_unit value.

Fixes: 684309e5043e ("pwm: lpss: Avoid potential overflow of base_unit")
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
Changes in v3:
- Add Fixes tag
- Add Reviewed-by: Andy Shevchenko tag
---
 drivers/pwm/pwm-lpss.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
index 9d965ffe66d1..43b1fc634af1 100644
--- a/drivers/pwm/pwm-lpss.c
+++ b/drivers/pwm/pwm-lpss.c
@@ -93,7 +93,7 @@ static void pwm_lpss_prepare(struct pwm_lpss_chip *lpwm, struct pwm_device *pwm,
 	 * The equation is:
 	 * base_unit = round(base_unit_range * freq / c)
 	 */
-	base_unit_range = BIT(lpwm->info->base_unit_bits) - 1;
+	base_unit_range = BIT(lpwm->info->base_unit_bits);
 	freq *= base_unit_range;
 
 	base_unit = DIV_ROUND_CLOSEST_ULL(freq, c);
@@ -104,8 +104,8 @@ static void pwm_lpss_prepare(struct pwm_lpss_chip *lpwm, struct pwm_device *pwm,
 
 	orig_ctrl = ctrl = pwm_lpss_read(pwm);
 	ctrl &= ~PWM_ON_TIME_DIV_MASK;
-	ctrl &= ~(base_unit_range << PWM_BASE_UNIT_SHIFT);
-	base_unit &= base_unit_range;
+	ctrl &= ~((base_unit_range - 1) << PWM_BASE_UNIT_SHIFT);
+	base_unit &= (base_unit_range - 1);
 	ctrl |= (u32) base_unit << PWM_BASE_UNIT_SHIFT;
 	ctrl |= on_time_div;
 
-- 
2.26.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-07-08 21:14 UTC|newest]

Thread overview: 110+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-08 21:14 [PATCH v4 00/15] acpi/pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API Hans de Goede
2020-07-08 21:14 ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14 ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 01/16] ACPI / LPSS: Resume Cherry Trail PWM controller in no-irq phase Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 02/16] ACPI / LPSS: Save Cherry Trail PWM ctx registers only once (at activation) Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` Hans de Goede [this message]
2020-07-08 21:14   ` [Intel-gfx] [PATCH v4 03/16] pwm: lpss: Fix off by one error in base_unit math in pwm_lpss_prepare() Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 04/16] pwm: lpss: Add range limit check for the base_unit register value Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-09 12:53   ` Andy Shevchenko
2020-07-09 12:53     ` [Intel-gfx] " Andy Shevchenko
2020-07-09 12:53     ` Andy Shevchenko
2020-07-09 13:23     ` Hans de Goede
2020-07-09 13:23       ` [Intel-gfx] " Hans de Goede
2020-07-09 13:23       ` Hans de Goede
2020-07-09 14:21       ` Andy Shevchenko
2020-07-09 14:21         ` [Intel-gfx] " Andy Shevchenko
2020-07-09 14:21         ` Andy Shevchenko
2020-07-09 14:33         ` Hans de Goede
2020-07-09 14:33           ` [Intel-gfx] " Hans de Goede
2020-07-09 14:33           ` Hans de Goede
2020-07-09 14:51           ` Andy Shevchenko
2020-07-09 14:51             ` [Intel-gfx] " Andy Shevchenko
2020-07-09 14:51             ` Andy Shevchenko
2020-07-08 21:14 ` [PATCH v4 05/16] pwm: lpss: Use pwm_lpss_apply() when restoring state on resume Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-09 13:36   ` Andy Shevchenko
2020-07-09 13:36     ` [Intel-gfx] " Andy Shevchenko
2020-07-09 13:36     ` Andy Shevchenko
2020-07-09 13:48     ` Hans de Goede
2020-07-09 13:48       ` [Intel-gfx] " Hans de Goede
2020-07-09 13:48       ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 06/16] pwm: lpss: Correct get_state result for base_unit == 0 Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-09 14:50   ` Andy Shevchenko
2020-07-09 14:50     ` [Intel-gfx] " Andy Shevchenko
2020-07-09 14:50     ` Andy Shevchenko
2020-07-09 15:47     ` Hans de Goede
2020-07-09 15:47       ` [Intel-gfx] " Hans de Goede
2020-07-09 15:47       ` Hans de Goede
2020-07-11  6:11       ` Uwe Kleine-König
2020-07-11  6:11         ` [Intel-gfx] " Uwe Kleine-König
2020-07-11  6:11         ` Uwe Kleine-König
2020-07-11 13:58         ` Hans de Goede
2020-07-11 13:58           ` [Intel-gfx] " Hans de Goede
2020-07-11 13:58           ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 07/16] pwm: crc: Fix period / duty_cycle times being off by a factor of 256 Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 08/16] pwm: crc: Fix off-by-one error in the clock-divider calculations Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 09/16] pwm: crc: Fix period changes not having any effect Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 10/16] pwm: crc: Enable/disable PWM output on enable/disable Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 11/16] pwm: crc: Implement apply() method to support the new atomic PWM API Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 12/16] pwm: crc: Implement get_state() method Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 13/16] drm/i915: panel: Add get_vbt_pwm_freq() helper Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 14/16] drm/i915: panel: Honor the VBT PWM frequency for devs with an external PWM controller Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 15/16] drm/i915: panel: Honor the VBT PWM min setting " Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 16/16] drm/i915: panel: Use atomic PWM API " Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-11  6:32   ` Uwe Kleine-König
2020-07-11  6:32     ` [Intel-gfx] " Uwe Kleine-König
2020-07-11  6:32     ` Uwe Kleine-König
2020-07-11 13:51     ` Hans de Goede
2020-07-11 13:51       ` [Intel-gfx] " Hans de Goede
2020-07-11 13:51       ` Hans de Goede
2020-07-08 22:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for acpi/pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API (rev2) Patchwork
2020-07-08 22:49 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-09  3:33 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-07-09  7:09   ` Hans de Goede
2020-07-09 14:14 ` [PATCH v4 00/15] acpi/pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API Sam Ravnborg
2020-07-09 14:14   ` [Intel-gfx] " Sam Ravnborg
2020-07-09 14:14   ` Sam Ravnborg
2020-07-09 14:40   ` Hans de Goede
2020-07-09 14:40     ` [Intel-gfx] " Hans de Goede
2020-07-09 14:40     ` Hans de Goede
2020-07-09 15:23     ` Sam Ravnborg
2020-07-09 15:23       ` [Intel-gfx] " Sam Ravnborg
2020-07-09 15:23       ` Sam Ravnborg
2020-07-11  6:19     ` Uwe Kleine-König
2020-07-11  6:19       ` [Intel-gfx] " Uwe Kleine-König
2020-07-11  6:19       ` Uwe Kleine-König
2020-07-11 13:46       ` Hans de Goede
2020-07-11 13:46         ` [Intel-gfx] " Hans de Goede
2020-07-11 13:46         ` Hans de Goede

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