From: Stephan Gerhold <stephan@gerhold.net> To: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Andy Gross <agross@kernel.org>, linux-arm-msm@vger.kernel.org, Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Stephan Gerhold <stephan@gerhold.net> Subject: [PATCH v2 13/15] arm64: dts: qcom: msm8916: Add CPU ACC and SAW/SPM Date: Mon, 4 Oct 2021 22:49:53 +0200 [thread overview] Message-ID: <20211004204955.21077-13-stephan@gerhold.net> (raw) In-Reply-To: <20211004201921.18526-1-stephan@gerhold.net> Add the device tree nodes necessary for SMP bring-up and cpuidle without PSCI on ARM32. The hardware is typically controlled by the PSCI implementation in the TrustZone firmware and is therefore marked as status = "reserved" by default (from the device tree specification): "Indicates that the device is operational, but should not be used. Typically this is used for devices that are controlled by another software component, such as platform firmware." Since this is part of the MSM8916 SoC it should be added to msm8916.dtsi but in practice these nodes should only get enabled via an extra include on ARM32. This is necessary for some devices with signed firmware which is missing both ARM64 and PSCI support and can therefore only boot ARM32 kernels. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> --- Changes in v2: None. --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 56 +++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 6b06b387b021..3e7e5c9e6f1b 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -124,6 +124,8 @@ CPU0: cpu@0 { #cooling-cells = <2>; power-domains = <&CPU_PD0>; power-domain-names = "psci"; + qcom,acc = <&cpu0_acc>; + qcom,saw = <&cpu0_saw>; }; CPU1: cpu@1 { @@ -137,6 +139,8 @@ CPU1: cpu@1 { #cooling-cells = <2>; power-domains = <&CPU_PD1>; power-domain-names = "psci"; + qcom,acc = <&cpu1_acc>; + qcom,saw = <&cpu1_saw>; }; CPU2: cpu@2 { @@ -150,6 +154,8 @@ CPU2: cpu@2 { #cooling-cells = <2>; power-domains = <&CPU_PD2>; power-domain-names = "psci"; + qcom,acc = <&cpu2_acc>; + qcom,saw = <&cpu2_saw>; }; CPU3: cpu@3 { @@ -163,6 +169,8 @@ CPU3: cpu@3 { #cooling-cells = <2>; power-domains = <&CPU_PD3>; power-domain-names = "psci"; + qcom,acc = <&cpu3_acc>; + qcom,saw = <&cpu3_saw>; }; L2_0: l2-cache { @@ -1877,6 +1885,54 @@ frame@b028000 { status = "disabled"; }; }; + + cpu0_acc: power-manager@b088000 { + compatible = "qcom,msm8916-acc"; + reg = <0x0b088000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu0_saw: power-manager@b089000 { + compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2"; + reg = <0x0b089000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu1_acc: power-manager@b098000 { + compatible = "qcom,msm8916-acc"; + reg = <0x0b098000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu1_saw: power-manager@b099000 { + compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2"; + reg = <0x0b099000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu2_acc: power-manager@b0a8000 { + compatible = "qcom,msm8916-acc"; + reg = <0x0b0a8000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu2_saw: power-manager@b0a9000 { + compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2"; + reg = <0x0b0a9000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu3_acc: power-manager@b0b8000 { + compatible = "qcom,msm8916-acc"; + reg = <0x0b0b8000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu3_saw: power-manager@b0b9000 { + compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2"; + reg = <0x0b0b9000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; }; thermal-zones { -- 2.33.0
WARNING: multiple messages have this Message-ID (diff)
From: Stephan Gerhold <stephan@gerhold.net> To: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Andy Gross <agross@kernel.org>, linux-arm-msm@vger.kernel.org, Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Stephan Gerhold <stephan@gerhold.net> Subject: [PATCH v2 13/15] arm64: dts: qcom: msm8916: Add CPU ACC and SAW/SPM Date: Mon, 4 Oct 2021 22:49:53 +0200 [thread overview] Message-ID: <20211004204955.21077-13-stephan@gerhold.net> (raw) In-Reply-To: <20211004201921.18526-1-stephan@gerhold.net> Add the device tree nodes necessary for SMP bring-up and cpuidle without PSCI on ARM32. The hardware is typically controlled by the PSCI implementation in the TrustZone firmware and is therefore marked as status = "reserved" by default (from the device tree specification): "Indicates that the device is operational, but should not be used. Typically this is used for devices that are controlled by another software component, such as platform firmware." Since this is part of the MSM8916 SoC it should be added to msm8916.dtsi but in practice these nodes should only get enabled via an extra include on ARM32. This is necessary for some devices with signed firmware which is missing both ARM64 and PSCI support and can therefore only boot ARM32 kernels. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> --- Changes in v2: None. --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 56 +++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 6b06b387b021..3e7e5c9e6f1b 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -124,6 +124,8 @@ CPU0: cpu@0 { #cooling-cells = <2>; power-domains = <&CPU_PD0>; power-domain-names = "psci"; + qcom,acc = <&cpu0_acc>; + qcom,saw = <&cpu0_saw>; }; CPU1: cpu@1 { @@ -137,6 +139,8 @@ CPU1: cpu@1 { #cooling-cells = <2>; power-domains = <&CPU_PD1>; power-domain-names = "psci"; + qcom,acc = <&cpu1_acc>; + qcom,saw = <&cpu1_saw>; }; CPU2: cpu@2 { @@ -150,6 +154,8 @@ CPU2: cpu@2 { #cooling-cells = <2>; power-domains = <&CPU_PD2>; power-domain-names = "psci"; + qcom,acc = <&cpu2_acc>; + qcom,saw = <&cpu2_saw>; }; CPU3: cpu@3 { @@ -163,6 +169,8 @@ CPU3: cpu@3 { #cooling-cells = <2>; power-domains = <&CPU_PD3>; power-domain-names = "psci"; + qcom,acc = <&cpu3_acc>; + qcom,saw = <&cpu3_saw>; }; L2_0: l2-cache { @@ -1877,6 +1885,54 @@ frame@b028000 { status = "disabled"; }; }; + + cpu0_acc: power-manager@b088000 { + compatible = "qcom,msm8916-acc"; + reg = <0x0b088000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu0_saw: power-manager@b089000 { + compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2"; + reg = <0x0b089000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu1_acc: power-manager@b098000 { + compatible = "qcom,msm8916-acc"; + reg = <0x0b098000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu1_saw: power-manager@b099000 { + compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2"; + reg = <0x0b099000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu2_acc: power-manager@b0a8000 { + compatible = "qcom,msm8916-acc"; + reg = <0x0b0a8000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu2_saw: power-manager@b0a9000 { + compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2"; + reg = <0x0b0a9000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu3_acc: power-manager@b0b8000 { + compatible = "qcom,msm8916-acc"; + reg = <0x0b0b8000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu3_saw: power-manager@b0b9000 { + compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2"; + reg = <0x0b0b9000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; }; thermal-zones { -- 2.33.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-10-04 20:51 UTC|newest] Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-10-04 20:19 [PATCH v2 00/15] Add support for Samsung Galaxy S4 Mini Value Edition Stephan Gerhold 2021-10-04 20:19 ` Stephan Gerhold 2021-10-04 20:19 ` [PATCH v2 01/15] arm64: dts: qcom: Add device tree " Stephan Gerhold 2021-10-04 20:19 ` Stephan Gerhold 2021-10-04 20:19 ` [PATCH v2 02/15] arm64: dts: qcom: msm8916-samsung-serranove: Add touch screen Stephan Gerhold 2021-10-04 20:19 ` Stephan Gerhold 2021-10-04 20:19 ` [PATCH v2 03/15] arm64: dts: qcom: msm8916-samsung-serranove: Add touch key Stephan Gerhold 2021-10-04 20:19 ` Stephan Gerhold 2021-10-04 20:19 ` [PATCH v2 04/15] arm64: dts: qcom: msm8916-samsung-serranove: Add IMU Stephan Gerhold 2021-10-04 20:19 ` Stephan Gerhold 2021-10-04 20:19 ` [PATCH v2 05/15] arm64: dts: qcom: msm8916-samsung-serranove: Add rt5033 battery Stephan Gerhold 2021-10-04 20:19 ` Stephan Gerhold 2021-10-04 20:19 ` [PATCH v2 06/15] arm64: dts: qcom: msm8916-samsung-serranove: Add NFC Stephan Gerhold 2021-10-04 20:19 ` Stephan Gerhold 2021-10-04 20:49 ` [PATCH v2 07/15] ARM: qcom: Add ARCH_MSM8916 for MSM8916 on ARM32 Stephan Gerhold 2021-10-04 20:49 ` Stephan Gerhold 2021-10-04 20:49 ` [PATCH v2 08/15] dt-bindings: arm: cpus: Document qcom,msm8916-smp enable-method Stephan Gerhold 2021-10-04 20:49 ` [PATCH v2 08/15] dt-bindings: arm: cpus: Document qcom, msm8916-smp enable-method Stephan Gerhold 2021-10-14 16:40 ` [PATCH v2 08/15] dt-bindings: arm: cpus: Document qcom,msm8916-smp enable-method Rob Herring 2021-10-14 16:40 ` Rob Herring 2021-10-04 20:49 ` [PATCH v2 09/15] ARM: qcom: Add qcom,msm8916-smp enable-method identical to MSM8226 Stephan Gerhold 2021-10-04 20:49 ` [PATCH v2 09/15] ARM: qcom: Add qcom, msm8916-smp " Stephan Gerhold 2021-10-04 20:49 ` [PATCH v2 10/15] dt-bindings: soc: qcom: spm: Document qcom,msm8916-saw2-v3.0-cpu Stephan Gerhold 2021-10-04 20:49 ` [PATCH v2 10/15] dt-bindings: soc: qcom: spm: Document qcom, msm8916-saw2-v3.0-cpu Stephan Gerhold 2021-10-04 20:49 ` [PATCH v2 11/15] soc: qcom: spm: Add 8916 SPM register data Stephan Gerhold 2021-10-04 20:49 ` Stephan Gerhold 2021-10-04 20:49 ` [PATCH v2 12/15] firmware: qcom: scm: Add support for MC boot address API Stephan Gerhold 2021-10-04 20:49 ` Stephan Gerhold 2021-10-04 20:49 ` Stephan Gerhold [this message] 2021-10-04 20:49 ` [PATCH v2 13/15] arm64: dts: qcom: msm8916: Add CPU ACC and SAW/SPM Stephan Gerhold 2021-10-04 20:49 ` [PATCH v2 14/15] ARM: dts: qcom: msm8916: Add include for SMP without PSCI on ARM32 Stephan Gerhold 2021-10-04 20:49 ` Stephan Gerhold 2021-10-04 20:49 ` [PATCH v2 15/15] ARM: dts: qcom: msm8916-samsung-serranove: Include dts from arm64 Stephan Gerhold 2021-10-04 20:49 ` Stephan Gerhold
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