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From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org,
	"Thomas Hellström" <thomas.hellstrom@linux.intel.com>
Subject: [PATCH 2/9] drm/i915: mark userptr objects as ALLOC_USER
Date: Mon, 18 Oct 2021 18:45:01 +0100	[thread overview]
Message-ID: <20211018174508.2137279-2-matthew.auld@intel.com> (raw)
In-Reply-To: <20211018174508.2137279-1-matthew.auld@intel.com>

These are userspace objects, so mark them as such. In a later patch it's
useful to determine how paranoid we need to be when managing cache
flushes. In theory no functional changes.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
index 8ea0fa665e53..887aca9e8dd2 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
@@ -546,7 +546,8 @@ i915_gem_userptr_ioctl(struct drm_device *dev,
 		return -ENOMEM;
 
 	drm_gem_private_object_init(dev, &obj->base, args->user_size);
-	i915_gem_object_init(obj, &i915_gem_userptr_ops, &lock_class, 0);
+	i915_gem_object_init(obj, &i915_gem_userptr_ops, &lock_class,
+			     I915_BO_ALLOC_USER);
 	obj->mem_flags = I915_BO_FLAG_STRUCT_PAGE;
 	obj->read_domains = I915_GEM_DOMAIN_CPU;
 	obj->write_domain = I915_GEM_DOMAIN_CPU;
-- 
2.26.3


WARNING: multiple messages have this Message-ID (diff)
From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org,
	"Thomas Hellström" <thomas.hellstrom@linux.intel.com>
Subject: [Intel-gfx] [PATCH 2/9] drm/i915: mark userptr objects as ALLOC_USER
Date: Mon, 18 Oct 2021 18:45:01 +0100	[thread overview]
Message-ID: <20211018174508.2137279-2-matthew.auld@intel.com> (raw)
In-Reply-To: <20211018174508.2137279-1-matthew.auld@intel.com>

These are userspace objects, so mark them as such. In a later patch it's
useful to determine how paranoid we need to be when managing cache
flushes. In theory no functional changes.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
index 8ea0fa665e53..887aca9e8dd2 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
@@ -546,7 +546,8 @@ i915_gem_userptr_ioctl(struct drm_device *dev,
 		return -ENOMEM;
 
 	drm_gem_private_object_init(dev, &obj->base, args->user_size);
-	i915_gem_object_init(obj, &i915_gem_userptr_ops, &lock_class, 0);
+	i915_gem_object_init(obj, &i915_gem_userptr_ops, &lock_class,
+			     I915_BO_ALLOC_USER);
 	obj->mem_flags = I915_BO_FLAG_STRUCT_PAGE;
 	obj->read_domains = I915_GEM_DOMAIN_CPU;
 	obj->write_domain = I915_GEM_DOMAIN_CPU;
-- 
2.26.3


  reply	other threads:[~2021-10-18 17:49 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-18 17:45 [PATCH 1/9] drm/i915: mark dmabuf objects as ALLOC_USER Matthew Auld
2021-10-18 17:45 ` [Intel-gfx] " Matthew Auld
2021-10-18 17:45 ` Matthew Auld [this message]
2021-10-18 17:45   ` [Intel-gfx] [PATCH 2/9] drm/i915: mark userptr " Matthew Auld
2021-10-20 14:36   ` Thomas Hellström
2021-10-20 14:36     ` [Intel-gfx] " Thomas Hellström
2021-10-18 17:45 ` [PATCH 3/9] drm/i915: extract bypass-llc check into helper Matthew Auld
2021-10-18 17:45   ` [Intel-gfx] " Matthew Auld
2021-10-20 14:38   ` Thomas Hellström
2021-10-20 14:38     ` [Intel-gfx] " Thomas Hellström
2021-10-18 17:45 ` [Intel-gfx] [PATCH 4/9] drm/i915/dmabuf: add paranoid flush-on-acquire Matthew Auld
2021-10-18 17:45   ` Matthew Auld
2021-10-20 14:42   ` Thomas Hellström
2021-10-20 14:42     ` [Intel-gfx] " Thomas Hellström
2021-10-22 10:50   ` kernel test robot
2021-10-26 13:44   ` Guenter Roeck
2021-10-26 13:44     ` [Intel-gfx] " Guenter Roeck
2021-10-18 17:45 ` [PATCH 5/9] drm/i915/userptr: " Matthew Auld
2021-10-18 17:45   ` [Intel-gfx] " Matthew Auld
2021-10-20 14:52   ` Thomas Hellström
2021-10-20 14:52     ` [Intel-gfx] " Thomas Hellström
2021-10-18 17:45 ` [PATCH 6/9] drm/i915/shmem: ensure flush during swap-in on non-LLC Matthew Auld
2021-10-18 17:45   ` [Intel-gfx] " Matthew Auld
2021-10-20 14:53   ` Thomas Hellström
2021-10-20 14:53     ` [Intel-gfx] " Thomas Hellström
2021-10-18 17:45 ` [PATCH 7/9] drm/i915: expand on the kernel-doc for cache_dirty Matthew Auld
2021-10-18 17:45   ` [Intel-gfx] " Matthew Auld
2021-10-20 14:58   ` Thomas Hellström
2021-10-20 14:58     ` [Intel-gfx] " Thomas Hellström
2021-10-18 17:45 ` [PATCH 8/9] drm/i915: mark up internal objects with start_cpu_write Matthew Auld
2021-10-18 17:45   ` [Intel-gfx] " Matthew Auld
2021-10-20 15:11   ` Thomas Hellström
2021-10-20 15:11     ` [Intel-gfx] " Thomas Hellström
2021-10-18 17:45 ` [PATCH 9/9] drm/i915/selftests: mark up hugepages object " Matthew Auld
2021-10-18 17:45   ` [Intel-gfx] " Matthew Auld
2021-10-20 15:12   ` Thomas Hellström
2021-10-20 15:12     ` [Intel-gfx] " Thomas Hellström
2021-10-18 19:11 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915: mark dmabuf objects as ALLOC_USER Patchwork
2021-10-18 19:13 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-10-18 19:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-19  2:39 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-10-20 14:34 ` [PATCH 1/9] " Thomas Hellström
2021-10-20 14:34   ` [Intel-gfx] " Thomas Hellström

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