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From: Yazen Ghannam <yazen.ghannam@amd.com>
To: <linux-edac@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <bp@alien8.de>,
	<mchehab@kernel.org>, <tony.luck@intel.com>,
	<james.morse@arm.com>, <rric@kernel.org>,
	<Smita.KoralahalliChannabasappa@amd.com>,
	<NaveenKrishna.Chatradhi@amd.com>, <Muralidhara.MK@amd.com>,
	Yazen Ghannam <yazen.ghannam@amd.com>
Subject: [PATCH v3 22/33] EDAC/amd64: Define function to calculate CS ID
Date: Thu, 28 Oct 2021 17:57:17 +0000	[thread overview]
Message-ID: <20211028175728.121452-23-yazen.ghannam@amd.com> (raw)
In-Reply-To: <20211028175728.121452-1-yazen.ghannam@amd.com>

Move code used to calculate the CS ID into a separate helper function.

Drop redundant code comment about reading DF register.

The "num_intlv_bits" variable is left uninitialized as it will be removed
in a later patch.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
Link:
https://lkml.kernel.org/r/20210623192002.3671647-24-yazen.ghannam@amd.com

v2->v3:
* Was patch 23 in v2.

v1->v2:
* Moved from arch/x86 to EDAC.

 drivers/edac/amd64_edac.c | 98 ++++++++++++++++++++-------------------
 1 file changed, 50 insertions(+), 48 deletions(-)

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 9ca822c1ea9c..2da0170f6d84 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1247,10 +1247,55 @@ static void get_intlv_num_chan(struct addr_ctx *ctx)
 	}
 }
 
-static int denormalize_addr(struct addr_ctx *ctx)
+static int calculate_cs_id(struct addr_ctx *ctx)
 {
 	u8 die_id_shift, die_id_mask, socket_id_shift, socket_id_mask;
-	u8 num_intlv_bits, cs_mask = 0;
+	u8 die_id_bit, sock_id_bit, cs_fabric_id, cs_mask = 0;
+
+	/* Read D18F0x50 (FabricBlockInstanceInformation3). */
+	if (df_indirect_read_instance(ctx->nid, 0, 0x50, ctx->inst_id, &ctx->tmp))
+		return -EINVAL;
+
+	cs_fabric_id = (ctx->tmp >> 8) & 0xFF;
+	die_id_bit   = 0;
+
+	/* If interleaved over more than 1 channel: */
+	if (ctx->intlv_num_chan) {
+		die_id_bit = ctx->intlv_num_chan;
+		cs_mask	   = (1 << die_id_bit) - 1;
+		ctx->cs_id = cs_fabric_id & cs_mask;
+	}
+
+	sock_id_bit = die_id_bit;
+
+	/* Read D18F1x208 (SystemFabricIdMask). */
+	if (ctx->intlv_num_dies || ctx->intlv_num_sockets)
+		if (df_indirect_read_broadcast(ctx->nid, 1, 0x208, &ctx->tmp))
+			return -EINVAL;
+
+	/* If interleaved over more than 1 die: */
+	if (ctx->intlv_num_dies) {
+		sock_id_bit  = die_id_bit + ctx->intlv_num_dies;
+		die_id_shift = (ctx->tmp >> 24) & 0xF;
+		die_id_mask  = (ctx->tmp >> 8) & 0xFF;
+
+		ctx->cs_id |= ((cs_fabric_id & die_id_mask) >> die_id_shift) << die_id_bit;
+	}
+
+	/* If interleaved over more than 1 socket: */
+	if (ctx->intlv_num_sockets) {
+		socket_id_shift	= (ctx->tmp >> 28) & 0xF;
+		socket_id_mask	= (ctx->tmp >> 16) & 0xFF;
+
+		ctx->cs_id |= ((cs_fabric_id & socket_id_mask) >> socket_id_shift) << sock_id_bit;
+	}
+
+	return 0;
+}
+
+static int denormalize_addr(struct addr_ctx *ctx)
+{
+	u8 num_intlv_bits;
 
 	/* Return early if no interleaving. */
 	if (ctx->intlv_mode == NONE)
@@ -1265,55 +1310,12 @@ static int denormalize_addr(struct addr_ctx *ctx)
 
 	ctx->make_space_for_cs_id(ctx);
 
+	if (calculate_cs_id(ctx))
+		return -EINVAL;
+
 	if (num_intlv_bits > 0) {
-		u8 die_id_bit, sock_id_bit, cs_fabric_id;
 		u64 temp_addr_i;
 
-		/*
-		 * Read FabricBlockInstanceInformation3_CS[BlockFabricID].
-		 * This is the fabric id for this coherent slave. Use
-		 * umc/channel# as instance id of the coherent slave
-		 * for FICAA.
-		 */
-		if (df_indirect_read_instance(ctx->nid, 0, 0x50, ctx->inst_id, &ctx->tmp))
-			return -EINVAL;
-
-		cs_fabric_id = (ctx->tmp >> 8) & 0xFF;
-		die_id_bit   = 0;
-
-		/* If interleaved over more than 1 channel: */
-		if (ctx->intlv_num_chan) {
-			die_id_bit = ctx->intlv_num_chan;
-			cs_mask	   = (1 << die_id_bit) - 1;
-			ctx->cs_id = cs_fabric_id & cs_mask;
-		}
-
-		sock_id_bit = die_id_bit;
-
-		/* Read D18F1x208 (SystemFabricIdMask). */
-		if (ctx->intlv_num_dies || ctx->intlv_num_sockets)
-			if (df_indirect_read_broadcast(ctx->nid, 1, 0x208, &ctx->tmp))
-				return -EINVAL;
-
-		/* If interleaved over more than 1 die. */
-		if (ctx->intlv_num_dies) {
-			sock_id_bit  = die_id_bit + ctx->intlv_num_dies;
-			die_id_shift = (ctx->tmp >> 24) & 0xF;
-			die_id_mask  = (ctx->tmp >> 8) & 0xFF;
-
-			ctx->cs_id |= ((cs_fabric_id & die_id_mask)
-					>> die_id_shift) << die_id_bit;
-		}
-
-		/* If interleaved over more than 1 socket. */
-		if (ctx->intlv_num_sockets) {
-			socket_id_shift	= (ctx->tmp >> 28) & 0xF;
-			socket_id_mask	= (ctx->tmp >> 16) & 0xFF;
-
-			ctx->cs_id |= ((cs_fabric_id & socket_id_mask)
-					>> socket_id_shift) << sock_id_bit;
-		}
-
 		/*
 		 * The pre-interleaved address consists of XXXXXXIIIYYYYY
 		 * where III is the ID for this CS, and XXXXXXYYYYY are the
-- 
2.25.1


  parent reply	other threads:[~2021-10-28 17:59 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-28 17:56 [PATCH v3 00/33] AMD MCA Address Translation Updates Yazen Ghannam
2021-10-28 17:56 ` [PATCH v3 01/33] x86/MCE/AMD, EDAC/amd64: Move address translation to AMD64 EDAC Yazen Ghannam
2021-11-15 16:17   ` [tip: ras/core] " tip-bot2 for Yazen Ghannam
2021-10-28 17:56 ` [PATCH v3 02/33] x86/amd_nb, EDAC/amd64: Move DF Indirect Read " Yazen Ghannam
2021-11-15 16:17   ` [tip: ras/core] " tip-bot2 for Yazen Ghannam
2021-10-28 17:56 ` [PATCH v3 03/33] EDAC/amd64: Allow for DF Indirect Broadcast reads Yazen Ghannam
2021-11-15 16:17   ` [tip: ras/core] " tip-bot2 for Yazen Ghannam
2021-10-28 17:56 ` [PATCH v3 04/33] EDAC/amd64: Add context struct Yazen Ghannam
2021-11-15 16:17   ` [tip: ras/core] " tip-bot2 for Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 05/33] EDAC/amd64: Define Data Fabric operations Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 06/33] EDAC/amd64: Define functions for DramOffset Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 07/33] EDAC/amd64: Define function to read DRAM address map registers Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 08/33] EDAC/amd64: Define function to find interleaving mode Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 09/33] EDAC/amd64: Define function to denormalize address Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 10/33] EDAC/amd64: Define function to add DRAM base and hole Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 11/33] EDAC/amd64: Define function to dehash address Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 12/33] EDAC/amd64: Define function to check DRAM limit address Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 13/33] EDAC/amd64: Remove goto statements Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 14/33] EDAC/amd64: Simplify function parameters Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 15/33] EDAC/amd64: Define function to get Interleave Address Bit Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 16/33] EDAC/amd64: Skip denormalization if no interleaving Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 17/33] EDAC/amd64: Define function to get number of interleaved channels Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 18/33] EDAC/amd64: Define function to get number of interleaved dies Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 19/33] EDAC/amd64: Define function to get number of interleaved sockets Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 20/33] EDAC/amd64: Remove unnecessary assert Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 21/33] EDAC/amd64: Define function to make space for CS ID Yazen Ghannam
2021-10-28 17:57 ` Yazen Ghannam [this message]
2021-10-28 17:57 ` [PATCH v3 23/33] EDAC/amd64: Define function to insert CS ID into address Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 24/33] EDAC/amd64: Define function to get CS Fabric ID Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 25/33] EDAC/amd64: Define function to find shift and mask values Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 26/33] EDAC/amd64: Update CS ID calculation to match reference code Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 27/33] EDAC/amd64: Match hash function to " Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 28/33] EDAC/amd64: Define function to get interleave address select bit Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 29/33] EDAC/amd64: Add support for address translation on DF3 systems Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 30/33] EDAC/amd64: Add glossary of acronyms for address translation Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 31/33] EDAC/amd64: Add check for when to add DRAM base and hole Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 32/33] EDAC/amd64: Save the number of block instances Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 33/33] EDAC/amd64: Add address translation support for DF3.5 Yazen Ghannam

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