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From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
	<matthias.bgg@gmail.com>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>
Cc: <p.zabel@pengutronix.de>,
	<angelogioacchino.delregno@collabora.com>,
	<chun-jie.chen@mediatek.com>, <wenst@chromium.org>,
	<runyang.chen@mediatek.com>, <linux-kernel@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Rex-BC Chen <rex-bc.chen@mediatek.com>
Subject: [PATCH v7 09/19] clk: mediatek: reset: Change return type for clock reset register function
Date: Thu, 19 May 2022 20:55:17 +0800	[thread overview]
Message-ID: <20220519125527.18544-10-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220519125527.18544-1-rex-bc.chen@mediatek.com>

To deal with error handling, we change the function return type from
void to int for mtk_clk_register_rst_ctrl().

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/clk/mediatek/reset.c | 15 +++++++++------
 drivers/clk/mediatek/reset.h |  6 ++++--
 2 files changed, 13 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c
index 89e617ea6393..b9718f0f9d16 100644
--- a/drivers/clk/mediatek/reset.c
+++ b/drivers/clk/mediatek/reset.c
@@ -110,8 +110,8 @@ static int reset_xlate(struct reset_controller_dev *rcdev,
 	return data->desc->rst_idx_map[reset_spec->args[0]];
 }
 
-void mtk_register_reset_controller(struct device_node *np,
-				   const struct mtk_clk_rst_desc *desc)
+int mtk_register_reset_controller(struct device_node *np,
+				  const struct mtk_clk_rst_desc *desc)
 {
 	struct regmap *regmap;
 	const struct reset_control_ops *rcops = NULL;
@@ -120,7 +120,7 @@ void mtk_register_reset_controller(struct device_node *np,
 
 	if (!desc) {
 		pr_err("mtk clock reset desc is NULL\n");
-		return;
+		return -EINVAL;
 	}
 
 	switch (desc->version) {
@@ -132,18 +132,18 @@ void mtk_register_reset_controller(struct device_node *np,
 		break;
 	default:
 		pr_err("Unknown reset version %d\n", desc->version);
-		return;
+		return -EINVAL;
 	}
 
 	regmap = device_node_to_regmap(np);
 	if (IS_ERR(regmap)) {
 		pr_err("Cannot find regmap for %pOF: %pe\n", np, regmap);
-		return;
+		return -EINVAL;
 	}
 
 	data = kzalloc(sizeof(*data), GFP_KERNEL);
 	if (!data)
-		return;
+		return -ENOMEM;
 
 	data->desc = desc;
 	data->regmap = regmap;
@@ -163,7 +163,10 @@ void mtk_register_reset_controller(struct device_node *np,
 	if (ret) {
 		pr_err("could not register reset controller: %d\n", ret);
 		kfree(data);
+		return ret;
 	}
+
+	return 0;
 }
 
 MODULE_LICENSE("GPL");
diff --git a/drivers/clk/mediatek/reset.h b/drivers/clk/mediatek/reset.h
index 47635d964c69..cc67934c69e2 100644
--- a/drivers/clk/mediatek/reset.h
+++ b/drivers/clk/mediatek/reset.h
@@ -56,8 +56,10 @@ struct mtk_clk_rst_data {
  * mtk_register_reset_controller - Register MediaTek clock reset controller
  * @np: Pointer to device node.
  * @desc: Constant pointer to description of clock reset.
+ *
+ * Return: 0 on success and errorno otherwise.
  */
-void mtk_register_reset_controller(struct device_node *np,
-				   const struct mtk_clk_rst_desc *desc);
+int mtk_register_reset_controller(struct device_node *np,
+				  const struct mtk_clk_rst_desc *desc);
 
 #endif /* __DRV_CLK_MTK_RESET_H */
-- 
2.18.0


WARNING: multiple messages have this Message-ID (diff)
From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
	<matthias.bgg@gmail.com>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>
Cc: <p.zabel@pengutronix.de>,
	<angelogioacchino.delregno@collabora.com>,
	<chun-jie.chen@mediatek.com>, <wenst@chromium.org>,
	<runyang.chen@mediatek.com>, <linux-kernel@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	 <Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Rex-BC Chen <rex-bc.chen@mediatek.com>
Subject: [PATCH v7 09/19] clk: mediatek: reset: Change return type for clock reset register function
Date: Thu, 19 May 2022 20:55:17 +0800	[thread overview]
Message-ID: <20220519125527.18544-10-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220519125527.18544-1-rex-bc.chen@mediatek.com>

To deal with error handling, we change the function return type from
void to int for mtk_clk_register_rst_ctrl().

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/clk/mediatek/reset.c | 15 +++++++++------
 drivers/clk/mediatek/reset.h |  6 ++++--
 2 files changed, 13 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c
index 89e617ea6393..b9718f0f9d16 100644
--- a/drivers/clk/mediatek/reset.c
+++ b/drivers/clk/mediatek/reset.c
@@ -110,8 +110,8 @@ static int reset_xlate(struct reset_controller_dev *rcdev,
 	return data->desc->rst_idx_map[reset_spec->args[0]];
 }
 
-void mtk_register_reset_controller(struct device_node *np,
-				   const struct mtk_clk_rst_desc *desc)
+int mtk_register_reset_controller(struct device_node *np,
+				  const struct mtk_clk_rst_desc *desc)
 {
 	struct regmap *regmap;
 	const struct reset_control_ops *rcops = NULL;
@@ -120,7 +120,7 @@ void mtk_register_reset_controller(struct device_node *np,
 
 	if (!desc) {
 		pr_err("mtk clock reset desc is NULL\n");
-		return;
+		return -EINVAL;
 	}
 
 	switch (desc->version) {
@@ -132,18 +132,18 @@ void mtk_register_reset_controller(struct device_node *np,
 		break;
 	default:
 		pr_err("Unknown reset version %d\n", desc->version);
-		return;
+		return -EINVAL;
 	}
 
 	regmap = device_node_to_regmap(np);
 	if (IS_ERR(regmap)) {
 		pr_err("Cannot find regmap for %pOF: %pe\n", np, regmap);
-		return;
+		return -EINVAL;
 	}
 
 	data = kzalloc(sizeof(*data), GFP_KERNEL);
 	if (!data)
-		return;
+		return -ENOMEM;
 
 	data->desc = desc;
 	data->regmap = regmap;
@@ -163,7 +163,10 @@ void mtk_register_reset_controller(struct device_node *np,
 	if (ret) {
 		pr_err("could not register reset controller: %d\n", ret);
 		kfree(data);
+		return ret;
 	}
+
+	return 0;
 }
 
 MODULE_LICENSE("GPL");
diff --git a/drivers/clk/mediatek/reset.h b/drivers/clk/mediatek/reset.h
index 47635d964c69..cc67934c69e2 100644
--- a/drivers/clk/mediatek/reset.h
+++ b/drivers/clk/mediatek/reset.h
@@ -56,8 +56,10 @@ struct mtk_clk_rst_data {
  * mtk_register_reset_controller - Register MediaTek clock reset controller
  * @np: Pointer to device node.
  * @desc: Constant pointer to description of clock reset.
+ *
+ * Return: 0 on success and errorno otherwise.
  */
-void mtk_register_reset_controller(struct device_node *np,
-				   const struct mtk_clk_rst_desc *desc);
+int mtk_register_reset_controller(struct device_node *np,
+				  const struct mtk_clk_rst_desc *desc);
 
 #endif /* __DRV_CLK_MTK_RESET_H */
-- 
2.18.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
	<matthias.bgg@gmail.com>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>
Cc: <p.zabel@pengutronix.de>,
	<angelogioacchino.delregno@collabora.com>,
	<chun-jie.chen@mediatek.com>, <wenst@chromium.org>,
	<runyang.chen@mediatek.com>, <linux-kernel@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	 <Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Rex-BC Chen <rex-bc.chen@mediatek.com>
Subject: [PATCH v7 09/19] clk: mediatek: reset: Change return type for clock reset register function
Date: Thu, 19 May 2022 20:55:17 +0800	[thread overview]
Message-ID: <20220519125527.18544-10-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220519125527.18544-1-rex-bc.chen@mediatek.com>

To deal with error handling, we change the function return type from
void to int for mtk_clk_register_rst_ctrl().

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/clk/mediatek/reset.c | 15 +++++++++------
 drivers/clk/mediatek/reset.h |  6 ++++--
 2 files changed, 13 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c
index 89e617ea6393..b9718f0f9d16 100644
--- a/drivers/clk/mediatek/reset.c
+++ b/drivers/clk/mediatek/reset.c
@@ -110,8 +110,8 @@ static int reset_xlate(struct reset_controller_dev *rcdev,
 	return data->desc->rst_idx_map[reset_spec->args[0]];
 }
 
-void mtk_register_reset_controller(struct device_node *np,
-				   const struct mtk_clk_rst_desc *desc)
+int mtk_register_reset_controller(struct device_node *np,
+				  const struct mtk_clk_rst_desc *desc)
 {
 	struct regmap *regmap;
 	const struct reset_control_ops *rcops = NULL;
@@ -120,7 +120,7 @@ void mtk_register_reset_controller(struct device_node *np,
 
 	if (!desc) {
 		pr_err("mtk clock reset desc is NULL\n");
-		return;
+		return -EINVAL;
 	}
 
 	switch (desc->version) {
@@ -132,18 +132,18 @@ void mtk_register_reset_controller(struct device_node *np,
 		break;
 	default:
 		pr_err("Unknown reset version %d\n", desc->version);
-		return;
+		return -EINVAL;
 	}
 
 	regmap = device_node_to_regmap(np);
 	if (IS_ERR(regmap)) {
 		pr_err("Cannot find regmap for %pOF: %pe\n", np, regmap);
-		return;
+		return -EINVAL;
 	}
 
 	data = kzalloc(sizeof(*data), GFP_KERNEL);
 	if (!data)
-		return;
+		return -ENOMEM;
 
 	data->desc = desc;
 	data->regmap = regmap;
@@ -163,7 +163,10 @@ void mtk_register_reset_controller(struct device_node *np,
 	if (ret) {
 		pr_err("could not register reset controller: %d\n", ret);
 		kfree(data);
+		return ret;
 	}
+
+	return 0;
 }
 
 MODULE_LICENSE("GPL");
diff --git a/drivers/clk/mediatek/reset.h b/drivers/clk/mediatek/reset.h
index 47635d964c69..cc67934c69e2 100644
--- a/drivers/clk/mediatek/reset.h
+++ b/drivers/clk/mediatek/reset.h
@@ -56,8 +56,10 @@ struct mtk_clk_rst_data {
  * mtk_register_reset_controller - Register MediaTek clock reset controller
  * @np: Pointer to device node.
  * @desc: Constant pointer to description of clock reset.
+ *
+ * Return: 0 on success and errorno otherwise.
  */
-void mtk_register_reset_controller(struct device_node *np,
-				   const struct mtk_clk_rst_desc *desc);
+int mtk_register_reset_controller(struct device_node *np,
+				  const struct mtk_clk_rst_desc *desc);
 
 #endif /* __DRV_CLK_MTK_RESET_H */
-- 
2.18.0


_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

  parent reply	other threads:[~2022-05-19 12:56 UTC|newest]

Thread overview: 105+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-19 12:55 [PATCH v7 00/19] Cleanup MediaTek clk reset drivers and support SoCs Rex-BC Chen
2022-05-19 12:55 ` Rex-BC Chen
2022-05-19 12:55 ` Rex-BC Chen
2022-05-19 12:55 ` [PATCH v7 01/19] clk: mediatek: reset: Add reset.h Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55 ` [PATCH v7 02/19] clk: mediatek: reset: Fix written reset bit offset Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55 ` [PATCH v7 03/19] clk: mediatek: reset: Refine and reorder functions in reset.c Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55 ` [PATCH v7 04/19] clk: mediatek: reset: Extract common drivers to update function Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-20 14:55   ` Nícolas F. R. A. Prado
2022-05-20 14:55     ` Nícolas F. R. A. Prado
2022-05-20 14:55     ` Nícolas F. R. A. Prado
2022-05-23  5:08     ` Rex-BC Chen
2022-05-23  5:08       ` Rex-BC Chen
2022-05-23  5:08       ` Rex-BC Chen
2022-05-19 12:55 ` [PATCH v7 05/19] clk: mediatek: reset: Merge and revise reset register function Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-20 15:12   ` Nícolas F. R. A. Prado
2022-05-20 15:12     ` Nícolas F. R. A. Prado
2022-05-20 15:12     ` Nícolas F. R. A. Prado
2022-05-23  5:09     ` Rex-BC Chen
2022-05-23  5:09       ` Rex-BC Chen
2022-05-23  5:09       ` Rex-BC Chen
2022-05-19 12:55 ` [PATCH v7 06/19] clk: mediatek: reset: Revise structure to control reset register Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55 ` [PATCH v7 07/19] clk: mediatek: reset: Support nonsequence base offsets of reset registers Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-20 15:18   ` Nícolas F. R. A. Prado
2022-05-20 15:18     ` Nícolas F. R. A. Prado
2022-05-20 15:18     ` Nícolas F. R. A. Prado
2022-05-23  5:10     ` Rex-BC Chen
2022-05-23  5:10       ` Rex-BC Chen
2022-05-23  5:10       ` Rex-BC Chen
2022-05-19 12:55 ` [PATCH v7 08/19] clk: mediatek: reset: Support inuput argument index mode Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55 ` Rex-BC Chen [this message]
2022-05-19 12:55   ` [PATCH v7 09/19] clk: mediatek: reset: Change return type for clock reset register function Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55 ` [PATCH v7 10/19] clk: mediatek: reset: Add new register reset function with device Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55 ` [PATCH v7 11/19] clk: mediatek: reset: Add reset support for simple probe Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55 ` [PATCH v7 12/19] dt-bindings: arm: mediatek: Add #reset-cells property for MT8192/MT8195 Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55 ` [PATCH v7 13/19] dt-bindings: reset: mediatek: Add infra_ao reset index " Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-20  2:58   ` Rex-BC Chen
2022-05-20  2:58     ` Rex-BC Chen
2022-05-20  2:58     ` Rex-BC Chen
2022-05-20  3:10     ` Chen-Yu Tsai
2022-05-20  3:10       ` Chen-Yu Tsai
2022-05-20  3:10       ` Chen-Yu Tsai
     [not found]       ` <20220521042323.BA60AC385A5@smtp.kernel.org>
2022-05-23  5:14         ` Rex-BC Chen
2022-05-23  5:14           ` Rex-BC Chen
2022-05-23  5:14           ` Rex-BC Chen
2022-05-19 12:55 ` [PATCH v7 14/19] clk: mediatek: reset: Add infra_ao reset support " Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55 ` [PATCH v7 15/19] arm64: dts: mediatek: Add infra #reset-cells property for MT8192 Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55 ` [PATCH v7 16/19] arm64: dts: mediatek: Add infra #reset-cells property for MT8195 Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-20 15:30   ` Nícolas F. R. A. Prado
2022-05-20 15:30     ` Nícolas F. R. A. Prado
2022-05-20 15:30     ` Nícolas F. R. A. Prado
2022-05-23  5:11     ` Rex-BC Chen
2022-05-23  5:11       ` Rex-BC Chen
2022-05-23  5:11       ` Rex-BC Chen
2022-05-19 12:55 ` [PATCH v7 17/19] dt-bindings: reset: mediatek: Add infra_ao reset index for MT8186 Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-20 22:32   ` Rob Herring
2022-05-20 22:32     ` Rob Herring
2022-05-20 22:32     ` Rob Herring
2022-05-19 12:55 ` [PATCH v7 18/19] dt-bindings: arm: mediatek: Add #reset-cells property " Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-20 22:33   ` Rob Herring
2022-05-20 22:33     ` Rob Herring
2022-05-20 22:33     ` Rob Herring
2022-05-19 12:55 ` [PATCH v7 19/19] clk: mediatek: reset: Add infra_ao reset support " Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-19 12:55   ` Rex-BC Chen
2022-05-20 15:40 ` [PATCH v7 00/19] Cleanup MediaTek clk reset drivers and support SoCs Nícolas F. R. A. Prado
2022-05-20 15:40   ` Nícolas F. R. A. Prado
2022-05-20 15:40   ` Nícolas F. R. A. Prado
2022-05-23  5:12   ` Rex-BC Chen
2022-05-23  5:12     ` Rex-BC Chen
2022-05-23  5:12     ` Rex-BC Chen

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