From: Samuel Holland <samuel@sholland.org>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Prabhakar <prabhakar.csengg@gmail.com>,
Marc Zyngier <maz@kernel.org>,
Sagar Kadam <sagar.kadam@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>
Cc: Guo Ren <guoren@kernel.org>, Thomas Gleixner <tglx@linutronix.de>,
Geert Uytterhoeven <geert+renesas@glider.be>,
linux-renesas-soc@vger.kernel.org,
Biju Das <biju.das.jz@bp.renesas.com>,
Samuel Holland <samuel@sholland.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: [PATCH v3 4/4] irqchip/sifive-plic: Fix T-HEAD PLIC edge trigger handling
Date: Thu, 30 Jun 2022 05:02:41 -0500 [thread overview]
Message-ID: <20220630100241.35233-5-samuel@sholland.org> (raw)
In-Reply-To: <20220630100241.35233-1-samuel@sholland.org>
The T-HEAD PLIC ignores additional edges seen while an edge-triggered
interrupt is being handled. Because of this behavior, the driver needs
to complete edge-triggered interrupts in the .irq_ack callback before
handling them, instead of in the .irq_eoi callback afterward. Otherwise,
it could miss some interrupts.
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
Changes in v3:
- Rebased on top of the RZ/Five patches
drivers/irqchip/irq-sifive-plic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index 90e44367bee9..b3a36dca7f1b 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -474,7 +474,6 @@ static int __init plic_init(struct device_node *node,
IRQCHIP_DECLARE(sifive_plic, "sifive,plic-1.0.0", plic_init);
IRQCHIP_DECLARE(riscv_plic0, "riscv,plic0", plic_init); /* for legacy systems */
-IRQCHIP_DECLARE(thead_c900_plic, "thead,c900-plic", plic_init); /* for firmware driver */
static int __init plic_edge_init(struct device_node *node,
struct device_node *parent)
@@ -483,3 +482,4 @@ static int __init plic_edge_init(struct device_node *node,
}
IRQCHIP_DECLARE(andestech_nceplic100, "andestech,nceplic100", plic_edge_init);
+IRQCHIP_DECLARE(thead_c900_plic, "thead,c900-plic", plic_edge_init);
--
2.35.1
WARNING: multiple messages have this Message-ID (diff)
From: Samuel Holland <samuel@sholland.org>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Prabhakar <prabhakar.csengg@gmail.com>,
Marc Zyngier <maz@kernel.org>,
Sagar Kadam <sagar.kadam@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>
Cc: Guo Ren <guoren@kernel.org>, Thomas Gleixner <tglx@linutronix.de>,
Geert Uytterhoeven <geert+renesas@glider.be>,
linux-renesas-soc@vger.kernel.org,
Biju Das <biju.das.jz@bp.renesas.com>,
Samuel Holland <samuel@sholland.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: [PATCH v3 4/4] irqchip/sifive-plic: Fix T-HEAD PLIC edge trigger handling
Date: Thu, 30 Jun 2022 05:02:41 -0500 [thread overview]
Message-ID: <20220630100241.35233-5-samuel@sholland.org> (raw)
In-Reply-To: <20220630100241.35233-1-samuel@sholland.org>
The T-HEAD PLIC ignores additional edges seen while an edge-triggered
interrupt is being handled. Because of this behavior, the driver needs
to complete edge-triggered interrupts in the .irq_ack callback before
handling them, instead of in the .irq_eoi callback afterward. Otherwise,
it could miss some interrupts.
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
Changes in v3:
- Rebased on top of the RZ/Five patches
drivers/irqchip/irq-sifive-plic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index 90e44367bee9..b3a36dca7f1b 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -474,7 +474,6 @@ static int __init plic_init(struct device_node *node,
IRQCHIP_DECLARE(sifive_plic, "sifive,plic-1.0.0", plic_init);
IRQCHIP_DECLARE(riscv_plic0, "riscv,plic0", plic_init); /* for legacy systems */
-IRQCHIP_DECLARE(thead_c900_plic, "thead,c900-plic", plic_init); /* for firmware driver */
static int __init plic_edge_init(struct device_node *node,
struct device_node *parent)
@@ -483,3 +482,4 @@ static int __init plic_edge_init(struct device_node *node,
}
IRQCHIP_DECLARE(andestech_nceplic100, "andestech,nceplic100", plic_edge_init);
+IRQCHIP_DECLARE(thead_c900_plic, "thead,c900-plic", plic_edge_init);
--
2.35.1
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next prev parent reply other threads:[~2022-06-30 10:03 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-30 10:02 [PATCH v3 0/4] Add PLIC support for Renesas RZ/Five SoC / Fix T-HEAD PLIC edge flow Samuel Holland
2022-06-30 10:02 ` Samuel Holland
2022-06-30 10:02 ` [PATCH v3 1/4] dt-bindings: interrupt-controller: sifive,plic: Document Renesas RZ/Five SoC Samuel Holland
2022-06-30 10:02 ` Samuel Holland
2022-07-01 14:37 ` [irqchip: irq/irqchip-next] " irqchip-bot for Lad Prabhakar
2022-06-30 10:02 ` [PATCH v3 2/4] irqchip/sifive-plic: Add support for " Samuel Holland
2022-06-30 10:02 ` Samuel Holland
2022-07-01 14:37 ` [irqchip: irq/irqchip-next] " irqchip-bot for Lad Prabhakar
2022-06-30 10:02 ` [PATCH v3 3/4] dt-bindings: interrupt-controller: Require trigger type for T-HEAD PLIC Samuel Holland
2022-06-30 10:02 ` Samuel Holland
2022-07-01 14:37 ` [irqchip: irq/irqchip-next] " irqchip-bot for Samuel Holland
2022-06-30 10:02 ` Samuel Holland [this message]
2022-06-30 10:02 ` [PATCH v3 4/4] irqchip/sifive-plic: Fix T-HEAD PLIC edge trigger handling Samuel Holland
2022-06-30 23:43 ` Guo Ren
2022-06-30 23:43 ` Guo Ren
2022-07-01 14:37 ` [irqchip: irq/irqchip-next] " irqchip-bot for Samuel Holland
2022-07-01 14:28 ` [PATCH v3 0/4] Add PLIC support for Renesas RZ/Five SoC / Fix T-HEAD PLIC edge flow Marc Zyngier
2022-07-01 14:28 ` Marc Zyngier
2022-07-13 3:19 ` Palmer Dabbelt
2022-07-13 3:19 ` Palmer Dabbelt
2022-07-13 7:00 ` Conor.Dooley
2022-07-13 7:00 ` Conor.Dooley
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