From: Prabhakar <prabhakar.csengg@gmail.com> To: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Geert Uytterhoeven <geert+renesas@glider.be>, Magnus Damm <magnus.damm@gmail.com>, Conor Dooley <conor.dooley@microchip.com> Cc: Heiko Stuebner <heiko@sntech.de>, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>, Atish Patra <atishp@rivosinc.com>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Prabhakar <prabhakar.csengg@gmail.com>, Biju Das <biju.das.jz@bp.renesas.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Subject: [PATCH v4 04/10] dt-bindings: soc: renesas: renesas.yaml: Document Renesas RZ/Five SoC Date: Tue, 20 Sep 2022 19:48:58 +0100 [thread overview] Message-ID: <20220920184904.90495-5-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw) In-Reply-To: <20220920184904.90495-1-prabhakar.mahadev-lad.rj@bp.renesas.com> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Document Renesas RZ/Five (R9A07G043) SoC. More info about RZ/Five SoC: https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzfive-risc-v-general-purpose-microprocessors-risc-v-cpu-core-andes-ax45mp-single-10-ghz-2ch-gigabit-ethernet Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> --- v3 -> v4 * No change v2 -> v3 * Dropped "(RISC-V core)" comment * Included ACK and RB tags v1 -> v2 * New patch --- Documentation/devicetree/bindings/soc/renesas/renesas.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml index 07c5e6ebd5a0..2789022b52eb 100644 --- a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml +++ b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml @@ -431,11 +431,12 @@ properties: - renesas,rzn1d400-db # RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package) - const: renesas,r9a06g032 - - description: RZ/G2UL (R9A07G043) + - description: RZ/Five and RZ/G2UL (R9A07G043) items: - enum: - renesas,smarc-evk # SMARC EVK - enum: + - renesas,r9a07g043f01 # RZ/Five - renesas,r9a07g043u11 # RZ/G2UL Type-1 - renesas,r9a07g043u12 # RZ/G2UL Type-2 - const: renesas,r9a07g043 -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Prabhakar <prabhakar.csengg@gmail.com> To: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Geert Uytterhoeven <geert+renesas@glider.be>, Magnus Damm <magnus.damm@gmail.com>, Conor Dooley <conor.dooley@microchip.com> Cc: Heiko Stuebner <heiko@sntech.de>, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>, Atish Patra <atishp@rivosinc.com>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Prabhakar <prabhakar.csengg@gmail.com>, Biju Das <biju.das.jz@bp.renesas.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Subject: [PATCH v4 04/10] dt-bindings: soc: renesas: renesas.yaml: Document Renesas RZ/Five SoC Date: Tue, 20 Sep 2022 19:48:58 +0100 [thread overview] Message-ID: <20220920184904.90495-5-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw) In-Reply-To: <20220920184904.90495-1-prabhakar.mahadev-lad.rj@bp.renesas.com> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Document Renesas RZ/Five (R9A07G043) SoC. More info about RZ/Five SoC: https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzfive-risc-v-general-purpose-microprocessors-risc-v-cpu-core-andes-ax45mp-single-10-ghz-2ch-gigabit-ethernet Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> --- v3 -> v4 * No change v2 -> v3 * Dropped "(RISC-V core)" comment * Included ACK and RB tags v1 -> v2 * New patch --- Documentation/devicetree/bindings/soc/renesas/renesas.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml index 07c5e6ebd5a0..2789022b52eb 100644 --- a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml +++ b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml @@ -431,11 +431,12 @@ properties: - renesas,rzn1d400-db # RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package) - const: renesas,r9a06g032 - - description: RZ/G2UL (R9A07G043) + - description: RZ/Five and RZ/G2UL (R9A07G043) items: - enum: - renesas,smarc-evk # SMARC EVK - enum: + - renesas,r9a07g043f01 # RZ/Five - renesas,r9a07g043u11 # RZ/G2UL Type-1 - renesas,r9a07g043u12 # RZ/G2UL Type-2 - const: renesas,r9a07g043 -- 2.25.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-09-20 18:50 UTC|newest] Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-09-20 18:48 [PATCH v4 00/10] Add support for Renesas RZ/Five SoC Prabhakar 2022-09-20 18:48 ` Prabhakar 2022-09-20 18:48 ` [PATCH v4 01/10] dt-bindings: soc: renesas: Move renesas.yaml from arm to soc Prabhakar 2022-09-20 18:48 ` Prabhakar 2022-09-22 12:54 ` Krzysztof Kozlowski 2022-09-22 12:54 ` Krzysztof Kozlowski 2022-10-28 12:44 ` Geert Uytterhoeven 2022-10-28 12:44 ` Geert Uytterhoeven 2022-09-20 18:48 ` [PATCH v4 02/10] dt-bindings: riscv: Sort the CPU core list alphabetically Prabhakar 2022-09-20 18:48 ` Prabhakar 2022-09-20 18:48 ` [PATCH v4 03/10] dt-bindings: riscv: Add Andes AX45MP core to the list Prabhakar 2022-09-20 18:48 ` Prabhakar 2022-09-20 18:48 ` Prabhakar [this message] 2022-09-20 18:48 ` [PATCH v4 04/10] dt-bindings: soc: renesas: renesas.yaml: Document Renesas RZ/Five SoC Prabhakar 2022-10-28 12:46 ` Geert Uytterhoeven 2022-10-28 12:46 ` Geert Uytterhoeven 2022-09-20 18:48 ` [PATCH v4 05/10] riscv: Kconfig.socs: Add ARCH_RENESAS kconfig option Prabhakar 2022-09-20 18:48 ` Prabhakar 2022-09-20 19:04 ` Conor Dooley 2022-09-20 19:04 ` Conor Dooley 2022-09-20 21:04 ` Lad, Prabhakar 2022-09-20 21:04 ` Lad, Prabhakar 2022-09-20 21:10 ` Conor Dooley 2022-09-20 21:10 ` Conor Dooley 2022-09-20 18:49 ` [PATCH v4 06/10] riscv: dts: renesas: Add initial devicetree for Renesas RZ/Five SoC Prabhakar 2022-09-20 18:49 ` Prabhakar 2022-09-20 18:49 ` [PATCH v4 07/10] riscv: dts: r9a07g043: Add placeholder nodes Prabhakar 2022-09-20 18:49 ` Prabhakar 2022-09-20 19:21 ` Biju Das 2022-09-20 19:21 ` Biju Das 2022-09-20 19:26 ` Biju Das 2022-09-20 19:26 ` Biju Das 2022-09-20 20:51 ` Lad, Prabhakar 2022-09-20 20:51 ` Lad, Prabhakar 2022-09-21 5:22 ` Biju Das 2022-09-21 5:22 ` Biju Das 2022-09-21 7:49 ` Geert Uytterhoeven 2022-09-21 7:49 ` Geert Uytterhoeven 2022-09-20 18:49 ` [PATCH v4 08/10] riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK Prabhakar 2022-09-20 18:49 ` Prabhakar 2022-09-20 18:49 ` [PATCH v4 09/10] MAINTAINERS: Add entry for Renesas RISC-V architecture Prabhakar 2022-09-20 18:49 ` Prabhakar 2022-09-20 18:49 ` [PATCH v4 10/10] riscv: configs: defconfig: Enable Renesas RZ/Five SoC Prabhakar 2022-09-20 18:49 ` Prabhakar 2022-09-20 19:20 ` [PATCH v4 00/10] Add support for " Conor Dooley 2022-09-20 19:20 ` Conor Dooley 2022-09-20 19:24 ` Geert Uytterhoeven 2022-09-20 19:24 ` Geert Uytterhoeven 2022-09-20 19:37 ` Conor Dooley 2022-09-20 19:37 ` Conor Dooley 2022-09-20 20:43 ` Lad, Prabhakar 2022-09-20 20:43 ` Lad, Prabhakar
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