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From: AngeloGioacchino Del Regno  <angelogioacchino.delregno@collabora.com>
To: sboyd@kernel.org
Cc: mturquette@baylibre.com, matthias.bgg@gmail.com,
	angelogioacchino.delregno@collabora.com, wenst@chromium.org,
	miles.chen@mediatek.com, nfraprado@collabora.com,
	rex-bc.chen@mediatek.com, chun-jie.chen@mediatek.com,
	jose.exposito89@gmail.com, yangyingliang@huawei.com,
	msp@baylibre.com, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 09/10] clk: mediatek: mt8186-mfg: Propagate rate changes to parent
Date: Mon, 24 Oct 2022 12:23:06 +0200	[thread overview]
Message-ID: <20221024102307.33722-10-angelogioacchino.delregno@collabora.com> (raw)
In-Reply-To: <20221024102307.33722-1-angelogioacchino.delregno@collabora.com>

Propagate the rate changes to MFG_BG3D's parent on MT8186 to allow
for proper GPU DVFS.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/clk/mediatek/clk-mt8186-mfg.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt8186-mfg.c b/drivers/clk/mediatek/clk-mt8186-mfg.c
index f1f92216f894..0142d741053a 100644
--- a/drivers/clk/mediatek/clk-mt8186-mfg.c
+++ b/drivers/clk/mediatek/clk-mt8186-mfg.c
@@ -16,8 +16,9 @@ static const struct mtk_gate_regs mfg_cg_regs = {
 	.sta_ofs = 0x0,
 };
 
-#define GATE_MFG(_id, _name, _parent, _shift)			\
-	GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
+#define GATE_MFG(_id, _name, _parent, _shift)				\
+	GATE_MTK_FLAGS(_id, _name, _parent, &mfg_cg_regs, _shift,	\
+		       &mtk_clk_gate_ops_setclr, CLK_SET_RATE_PARENT)
 
 static const struct mtk_gate mfg_clks[] = {
 	GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "top_mfg", 0),
-- 
2.37.2


WARNING: multiple messages have this Message-ID (diff)
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: sboyd@kernel.org
Cc: mturquette@baylibre.com, matthias.bgg@gmail.com,
	angelogioacchino.delregno@collabora.com, wenst@chromium.org,
	miles.chen@mediatek.com, nfraprado@collabora.com,
	rex-bc.chen@mediatek.com, chun-jie.chen@mediatek.com,
	jose.exposito89@gmail.com, yangyingliang@huawei.com,
	msp@baylibre.com, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 09/10] clk: mediatek: mt8186-mfg: Propagate rate changes to parent
Date: Mon, 24 Oct 2022 12:23:06 +0200	[thread overview]
Message-ID: <20221024102307.33722-10-angelogioacchino.delregno@collabora.com> (raw)
In-Reply-To: <20221024102307.33722-1-angelogioacchino.delregno@collabora.com>

Propagate the rate changes to MFG_BG3D's parent on MT8186 to allow
for proper GPU DVFS.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/clk/mediatek/clk-mt8186-mfg.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt8186-mfg.c b/drivers/clk/mediatek/clk-mt8186-mfg.c
index f1f92216f894..0142d741053a 100644
--- a/drivers/clk/mediatek/clk-mt8186-mfg.c
+++ b/drivers/clk/mediatek/clk-mt8186-mfg.c
@@ -16,8 +16,9 @@ static const struct mtk_gate_regs mfg_cg_regs = {
 	.sta_ofs = 0x0,
 };
 
-#define GATE_MFG(_id, _name, _parent, _shift)			\
-	GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
+#define GATE_MFG(_id, _name, _parent, _shift)				\
+	GATE_MTK_FLAGS(_id, _name, _parent, &mfg_cg_regs, _shift,	\
+		       &mtk_clk_gate_ops_setclr, CLK_SET_RATE_PARENT)
 
 static const struct mtk_gate mfg_clks[] = {
 	GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "top_mfg", 0),
-- 
2.37.2


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  parent reply	other threads:[~2022-10-24 10:24 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-24 10:22 [PATCH 00/10] MTK: Undesired set_rate on main PLLs and GPU DVFS AngeloGioacchino Del Regno
2022-10-24 10:22 ` AngeloGioacchino Del Regno
2022-10-24 10:22 ` [PATCH 01/10] clk: mediatek: clk-mtk: Allow specifying flags on mtk_fixed_factor clocks AngeloGioacchino Del Regno
2022-10-24 10:22   ` AngeloGioacchino Del Regno
2022-10-24 21:57   ` Chen-Yu Tsai
2022-10-24 21:57     ` Chen-Yu Tsai
2022-10-24 10:22 ` [PATCH 02/10] clk: mediatek: mt8186-topckgen: Drop flags for main/univpll fixed factors AngeloGioacchino Del Regno
2022-10-24 10:22   ` AngeloGioacchino Del Regno
2022-10-24 21:58   ` Chen-Yu Tsai
2022-10-24 21:58     ` Chen-Yu Tsai
2022-10-24 10:23 ` [PATCH 03/10] clk: mediatek: mt8183: Compress top_divs array entries AngeloGioacchino Del Regno
2022-10-24 10:23   ` AngeloGioacchino Del Regno
2022-10-24 22:02   ` Chen-Yu Tsai
2022-10-24 22:02     ` Chen-Yu Tsai
2022-10-24 10:23 ` [PATCH 04/10] clk: mediatek: mt8183: Drop flags for sys/univpll fixed factors AngeloGioacchino Del Regno
2022-10-24 10:23   ` AngeloGioacchino Del Regno
2022-10-24 22:05   ` Chen-Yu Tsai
2022-10-24 22:05     ` Chen-Yu Tsai
2022-10-24 10:23 ` [PATCH 05/10] clk: mediatek: mt8173: Drop flags for main/sys/univpll " AngeloGioacchino Del Regno
2022-10-24 10:23   ` AngeloGioacchino Del Regno
2022-10-24 22:06   ` Chen-Yu Tsai
2022-10-24 22:06     ` Chen-Yu Tsai
2022-10-24 10:23 ` [PATCH 06/10] clk: mediatek: mt6795-topckgen: " AngeloGioacchino Del Regno
2022-10-24 10:23   ` AngeloGioacchino Del Regno
2022-10-24 22:09   ` Chen-Yu Tsai
2022-10-24 22:09     ` Chen-Yu Tsai
2022-10-24 10:23 ` [PATCH 07/10] clk: mediatek: mt8192: Drop flags for main/univpll " AngeloGioacchino Del Regno
2022-10-24 10:23   ` AngeloGioacchino Del Regno
2022-10-24 22:10   ` Chen-Yu Tsai
2022-10-24 22:10     ` Chen-Yu Tsai
2022-10-24 10:23 ` [PATCH 08/10] clk: mediatek: mt8195-topckgen: " AngeloGioacchino Del Regno
2022-10-24 10:23   ` AngeloGioacchino Del Regno
2022-10-24 22:10   ` Chen-Yu Tsai
2022-10-24 22:10     ` Chen-Yu Tsai
2022-10-24 10:23 ` AngeloGioacchino Del Regno [this message]
2022-10-24 10:23   ` [PATCH 09/10] clk: mediatek: mt8186-mfg: Propagate rate changes to parent AngeloGioacchino Del Regno
2022-10-24 22:11   ` Chen-Yu Tsai
2022-10-24 22:11     ` Chen-Yu Tsai
2022-10-24 10:23 ` [PATCH 10/10] clk: mediatek: mt8186-topckgen: Add GPU clock mux notifier AngeloGioacchino Del Regno
2022-10-24 10:23   ` AngeloGioacchino Del Regno
2022-10-24 22:12   ` Chen-Yu Tsai
2022-10-24 22:12     ` Chen-Yu Tsai
2022-11-29  7:03 ` [PATCH 00/10] MTK: Undesired set_rate on main PLLs and GPU DVFS Chen-Yu Tsai
2022-11-29  7:03   ` Chen-Yu Tsai

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