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From: Suraj Kandpal <suraj.kandpal@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v5 8/8] drm/i915: Code styling fixes
Date: Mon,  7 Nov 2022 13:04:32 +0530	[thread overview]
Message-ID: <20221107073432.1352991-9-suraj.kandpal@intel.com> (raw)
In-Reply-To: <20221107073432.1352991-1-suraj.kandpal@intel.com>

From: Swati Sharma <swati2.sharma@intel.com>

Removed extra newlines and did few styling fixes.

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_debugfs.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 2ccaf698cbfb..5e0e8d1ffadc 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -1438,7 +1438,6 @@ static ssize_t wm_latency_write(struct file *file, const char __user *ubuf,
 	return len;
 }
 
-
 static ssize_t pri_wm_latency_write(struct file *file, const char __user *ubuf,
 				    size_t len, loff_t *offp)
 {
@@ -1788,13 +1787,13 @@ static ssize_t i915_dsc_fec_support_write(struct file *file,
 					  const char __user *ubuf,
 					  size_t len, loff_t *offp)
 {
-	bool dsc_enable = false;
-	int ret;
 	struct drm_connector *connector =
 		((struct seq_file *)file->private_data)->private;
 	struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector));
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+	bool dsc_enable = false;
+	int ret;
 
 	if (len == 0)
 		return 0;
@@ -1811,6 +1810,7 @@ static ssize_t i915_dsc_fec_support_write(struct file *file,
 	intel_dp->force_dsc_en = dsc_enable;
 
 	*offp += len;
+
 	return len;
 }
 
-- 
2.25.1


  parent reply	other threads:[~2022-11-07  7:36 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-14 15:26 [Intel-gfx] [PATCH v4 0/4] Enable YCbCr420 for VDSC Suraj Kandpal
2022-10-14 15:26 ` [Intel-gfx] [PATCH v4 1/4] drm/i915/dp: Check if DSC supports the given output_format Suraj Kandpal
2022-10-14 15:26 ` [Intel-gfx] [PATCH v4 2/4] drm/i915: Adding the new registers for DSC Suraj Kandpal
2022-10-14 15:26 ` [Intel-gfx] [PATCH v4 3/4] drm/i915: Enable YCbCr420 for VDSC Suraj Kandpal
2022-10-14 15:26 ` [Intel-gfx] [PATCH v4 4/4] drm/i915: Fill in native_420 field Suraj Kandpal
2022-10-14 16:16 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable YCbCr420 for VDSC Patchwork
2022-10-14 16:16 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-10-14 16:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-10-14 17:55 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-10-17  4:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable YCbCr420 for VDSC (rev2) Patchwork
2022-10-17  5:02 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-10-17 13:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable YCbCr420 for VDSC (rev3) Patchwork
2022-10-17 13:24 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-10-17 15:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-10-18  0:08 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-10-19 15:41 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2022-11-07  7:26 ` [Intel-gfx] [PATCH v5 0/8] Enable YCbCr420 for VDSC Suraj Kandpal
2022-11-07  7:26   ` [Intel-gfx] [PATCH v5 1/8] drm/dp_helper: Add helper to check if the sink supports given format with DSC Suraj Kandpal
2022-11-07  7:26   ` [Intel-gfx] [PATCH v5 2/8] drm/i915/dp: Check if DSC supports the given output_format Suraj Kandpal
2022-11-07  7:26   ` [Intel-gfx] [PATCH v5 3/8] drm/i915: Adding the new registers for DSC Suraj Kandpal
2022-11-07  7:26   ` [Intel-gfx] [PATCH v5 4/8] drm/i915: Enable YCbCr420 for VDSC Suraj Kandpal
2022-11-07  7:26   ` [Intel-gfx] [PATCH v5 5/8] drm/i915: Fill in native_420 field Suraj Kandpal
2022-11-07  7:26   ` [Intel-gfx] [PATCH v5 6/8] drm/i915/dsc: Add debugfs entry to validate DSC YCbCr420 Suraj Kandpal
2022-11-07  7:26   ` [Intel-gfx] [PATCH v5 7/8] drm/i915/dsc: Allow DSC only with YCbCr420 format when forced from debugfs Suraj Kandpal
2022-11-07  7:26   ` [Intel-gfx] [PATCH v5 8/8] drm/i915: Code styling fixes Suraj Kandpal
2022-11-07  7:34 ` [Intel-gfx] [PATCH v5 0/8] Enable YCbCr420 for VDSC Suraj Kandpal
2022-11-07  7:34   ` [Intel-gfx] [PATCH v5 1/8] drm/dp_helper: Add helper to check if the sink supports given format with DSC Suraj Kandpal
2022-11-07  7:34   ` [Intel-gfx] [PATCH v5 2/8] drm/i915/dp: Check if DSC supports the given output_format Suraj Kandpal
2022-11-07  7:34   ` [Intel-gfx] [PATCH v5 3/8] drm/i915: Adding the new registers for DSC Suraj Kandpal
2022-11-07  7:34   ` [Intel-gfx] [PATCH v5 4/8] drm/i915: Enable YCbCr420 for VDSC Suraj Kandpal
2022-11-07  7:34   ` [Intel-gfx] [PATCH v5 5/8] drm/i915: Fill in native_420 field Suraj Kandpal
2022-11-07  7:34   ` [Intel-gfx] [PATCH v5 6/8] drm/i915/dsc: Add debugfs entry to validate DSC YCbCr420 Suraj Kandpal
2022-11-07  7:34   ` [Intel-gfx] [PATCH v5 7/8] drm/i915/dsc: Allow DSC only with YCbCr420 format when forced from debugfs Suraj Kandpal
2022-11-07  7:34   ` Suraj Kandpal [this message]
2022-11-07  8:30 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Enable YCbCr420 for VDSC (rev3) Patchwork
2022-11-07  8:46 ` [Intel-gfx] [PATCH 0/8] Enable YCbCr420 for VDSC Suraj Kandpal
2022-11-07  8:46   ` [Intel-gfx] [PATCH 1/8] drm/dp_helper: Add helper to check if the sink supports given format with DSC Suraj Kandpal
2022-11-07  8:46   ` [Intel-gfx] [PATCH 2/8] drm/i915/dp: Check if DSC supports the given output_format Suraj Kandpal
2022-11-07  8:46   ` [Intel-gfx] [PATCH 3/8] drm/i915: Adding the new registers for DSC Suraj Kandpal
2022-11-07  8:46   ` [Intel-gfx] [PATCH 4/8] drm/i915: Enable YCbCr420 for VDSC Suraj Kandpal
2022-11-07  8:46   ` [Intel-gfx] [PATCH 5/8] drm/i915: Fill in native_420 field Suraj Kandpal
2022-11-07  8:46   ` [Intel-gfx] [PATCH 6/8] drm/i915/dsc: Add debugfs entry to validate DSC YCbCr420 Suraj Kandpal
2022-11-07  8:46   ` [Intel-gfx] [PATCH 7/8] drm/i915/dsc: Allow DSC only with YCbCr420 format when forced from debugfs Suraj Kandpal
2022-11-07  8:46   ` [Intel-gfx] [PATCH 8/8] drm/i915: Code styling fixes Suraj Kandpal
2022-11-07  7:17 [Intel-gfx] [PATCH v5 0/8] Enable YCbCr420 for VDSC Suraj Kandpal
2022-11-07  7:18 ` [Intel-gfx] [PATCH v5 8/8] drm/i915: Code styling fixes Suraj Kandpal
2022-11-07  7:39 [Intel-gfx] [PATCH v5 0/8] Enable YCbCr420 for VDSC Suraj Kandpal
2022-11-07  7:39 ` [Intel-gfx] [PATCH v5 8/8] drm/i915: Code styling fixes Suraj Kandpal

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